The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA
DETAILED ACTION
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-5, 7, 9, 12-14 and 18-20 are rejected under 35 U.S.C. 103 as being unpatentable over Kim et al. (2018/0033830) in view of Lee (5,811,874).Regarding claims 1 and 20, Kim et al. teach in figure 5B and related text a display panel, including a display area DA and a non-display area NDA surrounding the display area, comprising:
a substrate SUB (see figure 6B);
a plurality of scan lines GL and a plurality of data lines DL disposed over the substrate, wherein the plurality of data lines DL is disposed in the display area, the plurality of data lines extends along a first direction and is arranged along a second direction, and the plurality of scan lines GL extends along the second direction and is arranged along the first direction, wherein the first direction and the second direction intersect; and
at least one dummy signal line SL-D disposed in the non-display area, wherein the at least one dummy signal line is parallel to the plurality of data lines DL, the at least one dummy signal line includes a first dummy signal line SL-D that is closest to an outer edge of the non-display area NDA among the at least one dummy signal line, and along the second direction, one end of at least one scan line GL of the plurality of scan lines is located between the first dummy signal line SL-D and the plurality of data lines DL.
Kim et al. do not teach a conductive metal portion located in the non-display area, the conductive metal portion disposed at least partially surrounding the display area, wherein the conductive metal portion includes a plurality of openings, and the plurality of openings penetrates the conductive metal portion along a thickness direction of the conductive metal portion.
Lee teaches in figure 5d and related text a conductive metal portion (guard ring 112) surrounding the active area, the conductive metal portion disposed at least partially surrounding the active area, wherein the conductive metal portion 112 includes a plurality of openings 122, and the plurality of openings penetrates the conductive metal portion along a thickness direction of the conductive metal portion.
Lee and Kim et al. are analogous art because they are directed to semiconductor devices and one of ordinary skill in the art would have had a reasonable expectation of success to modify Li because they are from the same field of endeavor.
It would have been obvious to a person of ordinary skill in the art, before the effective filling date of the claimed invention, to form a conductive metal portion located in the non-display area, the conductive metal portion disposed at least partially surrounding the display area, wherein the conductive metal portion includes a plurality of openings, and the plurality of openings penetrates the conductive metal portion along a thickness direction of the conductive metal portion, as taught by Lee, in Kim et al.’s device in order to provide better protection to the device.
Regarding claim 2, Kim et al. teach in figure 5B and related text a scan line of the plurality of scan lines includes a first terminal and a second terminal opposite to each other along the second direction; the first terminal (end point of connection) is located between the first dummy signal line SL-D and the plurality of data lines DL. Kim et al. do not teach that a distance between the first terminal and the first dummy signal line is D, with D >=30 microns.
It would have been obvious to a person of ordinary skill in the art, before the effective filling date of the claimed invention, to form a distance between the first terminal and the first dummy signal line is D, with D >=30 microns in Kim et al.’s device in order to adjust the electrical characteristics of the device.Regarding claim 3, Kim et al. teach in figure 5B and related text that the first terminal and the first dummy signal line are located in the non-display area on a same side of the display area; or the first terminal is located in the display area.Regarding claim 4, Kim et al. teach in figure 5B and related text that the first terminal of each scan line of the plurality of scan lines is located between the first dummy signal line and the plurality of data lines.
Regarding claims 5 and 12, prior art teaches that the conductive portion is located on a side of the first dummy signal line away from the display area; and the conductive portion receives a fixed potential signal (see paragraph [0081]).
Kim et al. do not teach using metal and do not teach that a width, along the second direction, of the conductive portion is larger than a line width of a scan line of the plurality of scan lines.
It would have been obvious to a person of ordinary skill in the art, before the effective filling date of the claimed invention, to use metal and to form a width, along the second direction, of the conductive portion is larger than a line width of a scan line of the plurality of scan lines, in Kim et al.’s device in order to improve the electrical conductivity of the device.
Regarding claim 7, Kim et al. teach in figure 5B and related text the conductive metal portion and the plurality of scan lines are disposed on a same layer.
Regarding claim 9, Kim et al. teach in figure 5B and related text that the non-display area includes a first non-display area on a side of the display area arranged along the second direction, and a second non-display area on a side of the display area arranged along the first direction; the scan line includes a first terminal and a second terminal (see above definition) oppositely disposed along the second direction, and the first terminal is located in the first non-display area; the conductive metal portion includes a first conductive metal portion located in the first non-display area and a second conductive metal portion located in the second non-display area; in the first non-display area, the first conductive metal portion is disposed on a side of the first dummy signal line away from the first terminal; and a width of the first conductive metal portion is smaller than a width of the second conductive metal portion (since the first and second portion are arbitrarily chosen).
Regarding claim 12, Kim et al. teach in figure 5B and related text that a data line DL of the plurality of data lines includes a first end and a second end oppositely arranged along the first direction, and the display panel includes a third non-display area and a fourth non-display area (arbitrarily chosen) arranged on two sides of the display area along the first direction, wherein the third non-display area includes a binding area, the binding area includes a plurality of conductive bonding pads PD, and the fourth non-display area includes a plurality of detection bonding pads (another PD); and
the first dummy signal line SL-D is electrically connected to a detection bonding pad of the plurality of detection bonding pads in the fourth non-display area.
Kim et al. do not teach that an area of the detection bonding pad connected to the first dummy signal line is larger than an area of the detection bonding pad connected to the data line.
It would have been obvious to a person of ordinary skill in the art, before the effective filling date of the claimed invention, to form an area of the detection bonding pad connected to the first dummy signal line is larger than an area of the detection bonding pad connected to the data line, in Kim et al.’s device in order to improve the electrical conductivity of the device.
Regarding claim 13, Kim et al. teach in figure 5B and related text a plurality of sub-pixels PX arranged in an array along the first direction and the second direction, wherein: among the sub-pixels located in a same row along the second direction, a part of the sub- pixels is electrically connected to one scan line GL of the plurality of scan lines, and another part of the sub-pixels is electrically connected to another scan line of the plurality of the scan lines; and a scan line GL of the plurality of scan lines includes a first terminal (end point of connection) and a second terminal opposite to each other along the second direction, wherein the first ends of two scan lines connected to a same row of sub-pixels are each located between the first dummy signal line DL and the second ends.
Regarding claim 14, Kim et al. teach in figure 5B and related text a gate driving chip GDC disposed in the non-display area, wherein: a scan line of the plurality of scan lines includes a first terminal and a second terminal opposite to each other along the second direction, wherein the first terminal is located between the first dummy signal line and the plurality of data lines, and the second terminal is electrically connected to the gate driving chip.
Regarding claim 18, Kim et al. teach in figure 9A and related text that the non-display area NDA includes a first non-display area located on at least one side of the display area DA along the second direction; along a direction perpendicular to a plane where the substrate is located, a first insulating layer 30 is disposed between a film layer where the plurality of scan lines GL is located and a layer where the at least one dummy signal line DL-D is located; and in the first non-display area, the first insulating layer has a thickness of S1 (above GDL-T), and in the display area, the first insulating layer has a thickness of S2 (at the edge of layer 30), wherein S1>S2.
Regarding claim 19, Kim et al. do not teach that the film layer where the at least one dummy signal line is located has a thickness of S0, wherein S1-S2.
It would have been obvious to a person of ordinary skill in the art, before the effective filling date of the claimed invention, to form the film layer where the at least one dummy signal line is located has a thickness of S0, wherein S1-S2., in Kim et al.’s device in order to improve the electrical conductivity of the device.
Allowable Subject Matter
Claims 6 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
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O.N. /ORI NADAV/
5/19/2026 PRIMARY EXAMINER
TECHNOLOGY CENTER 2800
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