Prosecution Insights
Last updated: April 19, 2026
Application No. 18/221,578

DISPLAY PANEL AND DISPLAY DEVICE

Non-Final OA §102§103§112
Filed
Jul 13, 2023
Examiner
NADAV, ORI
Art Unit
2811
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Shanghai Avic Opto Electronics Co. Ltd.
OA Round
1 (Non-Final)
60%
Grant Probability
Moderate
1-2
OA Rounds
3y 11m
To Grant
81%
With Interview

Examiner Intelligence

Grants 60% of resolved cases
60%
Career Allow Rate
417 granted / 693 resolved
-7.8% vs TC avg
Strong +21% interview lift
Without
With
+20.6%
Interview Lift
resolved cases with interview
Typical timeline
3y 11m
Avg Prosecution
67 currently pending
Career history
760
Total Applications
across all art units

Statute-Specific Performance

§101
0.4%
-39.6% vs TC avg
§103
52.6%
+12.6% vs TC avg
§102
14.2%
-25.8% vs TC avg
§112
29.5%
-10.5% vs TC avg
Black line = Tech Center average estimate • Based on career data from 693 resolved cases

Office Action

§102 §103 §112
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA DETAILED ACTION Election/Restrictions Applicant’s election without traverse of the embodiment of figure 4 and the “combination” in the reply filed on 12/19/2025 is acknowledged. Claim Rejections - 35 USC § 112 The following is a quotation of the first paragraph of 35 U.S.C. 112(a): (a) IN GENERAL.—The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor or joint inventor of carrying out the invention. The following is a quotation of the first paragraph of pre-AIA 35 U.S.C. 112: The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor of carrying out his invention. Claim 18 is rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), first paragraph, as failing to comply with the written description requirement. The claim(s) contains subject matter which was not described in the specification in such a way as to reasonably convey to one skilled in the relevant art that the inventor or a joint inventor, or for applications subject to pre-AIA 35 U.S.C. 112, the inventor(s), at the time the application was filed, had possession of the claimed invention. There is no support in the elected embodiment of figure 4 for the claimed limitation of “a film layer”, as recited in claim 18. It is noted that the non-elected embodiment of figure 12 recites the element “film layer”. The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph: The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention. Claims 6 and 12 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. The claimed limitation of “the substrate”, as recited in claim 6, is unclear as to which substrate applicants refer. The claimed limitation of “a detection bonding pad of the plurality of the plurality”, as recited in claim 12, is grammatically incorrect and unclear. Claim Rejections - 35 USC § 102 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claim(s) 1, 13-14 and 20 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Kim et al. (2018/0033830).Regarding claims 1 and 20, Kim et al. teach in figure 5B and related text a display panel, including a display area DA and a non-display area NDA surrounding the display area, comprising: a substrate SUB (see figure 6B); a plurality of scan lines GL and a plurality of data lines DL disposed over the substrate, wherein the plurality of data lines DL is disposed in the display area, the plurality of data lines extends along a first direction and is arranged along a second direction, and the plurality of scan lines GL extends along the second direction and is arranged along the first direction, wherein the first direction and the second direction intersect; and at least one dummy signal line SL-D disposed in the non-display area, wherein the at least one dummy signal line is parallel to the plurality of data lines DL, the at least one dummy signal line includes a first dummy signal line SL-D that is closest to an outer edge of the non-display area NDA among the at least one dummy signal line, and along the second direction, one end of at least one scan line GL of the plurality of scan lines is located between the first dummy signal line SL-D and the plurality of data lines DL. Regarding claim 13, Kim et al. teach in figure 5B and related text a plurality of sub-pixels PX arranged in an array along the first direction and the second direction, wherein: among the sub-pixels located in a same row along the second direction, a part of the sub- pixels is electrically connected to one scan line GL of the plurality of scan lines, and another part of the sub-pixels is electrically connected to another scan line of the plurality of the scan lines; and a scan line GL of the plurality of scan lines includes a first terminal (end point of connection) and a second terminal opposite to each other along the second direction, wherein the first ends of two scan lines connected to a same row of sub-pixels are each located between the first dummy signal line DL and the second ends. Regarding claim 14, Kim et al. teach in figure 5B and related text a gate driving chip GDC disposed in the non-display area, wherein: a scan line of the plurality of scan lines includes a first terminal and a second terminal opposite to each other along the second direction, wherein the first terminal is located between the first dummy signal line and the plurality of data lines, and the second terminal is electrically connected to the gate driving chip. Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 2-5, 7, 9, 12, 18 and 19 are rejected under 35 U.S.C. 103 as being unpatentable over Park et al. (2016/0322453) in view of Noh et al. (2018/0033849).Regarding claim 2, Kim et al. teach in figure 5B and related text a scan line of the plurality of scan lines includes a first terminal and a second terminal opposite to each other along the second direction; the first terminal (end point of connection) is located between the first dummy signal line SL-D and the plurality of data lines DL. Kim et al. do not teach that a distance between the first terminal and the first dummy signal line is D, with D >=30 microns. It would have been obvious to a person of ordinary skill in the art, before the effective filling date of the claimed invention, to form a distance between the first terminal and the first dummy signal line is D, with D >=30 microns in Kim et al.’s device in order to adjust the electrical characteristics of the device. Regarding claim 3, Kim et al. teach in figure 5B and related text that the first terminal and the first dummy signal line are located in the non-display area on a same side of the display area; or the first terminal is located in the display area.Regarding claim 4, Kim et al. teach in figure 5B and related text that the first terminal of each scan line of the plurality of scan lines is located between the first dummy signal line and the plurality of data lines. Regarding claims 5 and 12, Kim et al. teach in figure 5B and related text a conductive portion (a portion of element SL-D) located in the non-display area NDA, wherein: the conductive metal portion is disposed at least partially surrounding the display area DA, and in the non-display area, the conductive portion is located on a side of the first dummy signal line away from the display area; and the conductive portion receives a fixed potential signal (see paragraph [0081]). Kim et al. do not teach using metal and do not teach that a width, along the second direction, of the conductive portion is larger than a line width of a scan line of the plurality of scan lines. It would have been obvious to a person of ordinary skill in the art, before the effective filling date of the claimed invention, to use metal and to form a width, along the second direction, of the conductive portion is larger than a line width of a scan line of the plurality of scan lines, in Kim et al.’s device in order to improve the electrical conductivity of the device. Regarding claim 7, Kim et al. teach in figure 5B and related text the conductive metal portion and the plurality of scan lines are disposed on a same layer. Regarding claim 9, Kim et al. teach in figure 5B and related text that the non-display area includes a first non-display area on a side of the display area arranged along the second direction, and a second non-display area on a side of the display area arranged along the first direction; the scan line includes a first terminal and a second terminal (see above definition) oppositely disposed along the second direction, and the first terminal is located in the first non-display area; the conductive metal portion includes a first conductive metal portion located in the first non-display area and a second conductive metal portion located in the second non-display area; in the first non-display area, the first conductive metal portion is disposed on a side of the first dummy signal line away from the first terminal; and a width of the first conductive metal portion is smaller than a width of the second conductive metal portion (since the first and second portion are arbitrarily chosen). Regarding claim 12, Kim et al. teach in figure 5B and related text that a data line DL of the plurality of data lines includes a first end and a second end oppositely arranged along the first direction, and the display panel includes a third non-display area and a fourth non-display area (arbitrarily chosen) arranged on two sides of the display area along the first direction, wherein the third non-display area includes a binding area, the binding area includes a plurality of conductive bonding pads PD, and the fourth non-display area includes a plurality of detection bonding pads (another PD); and the first dummy signal line SL-D is electrically connected to a detection bonding pad of the plurality of the plurality of detection bonding pads in the fourth non-display area. Kim et al. do not teach that an area of the detection bonding pad connected to the first dummy signal line is larger than an area of the detection bonding pad connected to the data line. It would have been obvious to a person of ordinary skill in the art, before the effective filling date of the claimed invention, to form an area of the detection bonding pad connected to the first dummy signal line is larger than an area of the detection bonding pad connected to the data line, in Kim et al.’s device in order to improve the electrical conductivity of the device. Regarding claim 18, Kim et al. teach in figure 9A and related text that the non-display area NDA includes a first non-display area located on at least one side of the display area DA along the second direction; along a direction perpendicular to a plane where the substrate is located, a first insulating layer 30 is disposed between a film layer where the plurality of scan lines GL is located and a film layer where the at least one dummy signal line DL-D is located; and in the first non-display area, the first insulating layer has a thickness of S1 (above GDL-T), and in the display area, the first insulating layer has a thickness of S2 (at the edge of layer 30), wherein S1>S2. Regarding claim 19, Kim et al. do not teach that the film layer where the at least one dummy signal line is located has a thickness of S0, wherein S1-S2. It would have been obvious to a person of ordinary skill in the art, before the effective filling date of the claimed invention, to form the film layer where the at least one dummy signal line is located has a thickness of S0, wherein S1-S2., in Kim et al.’s device in order to improve the electrical conductivity of the device. Allowable Subject Matter Claims 6 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. Any inquiry concerning this communication or earlier communications from the examiner should be directed to ORI NADAV whose telephone number is 571-272-1660. The examiner can normally be reached between the hours of 7 AM to 4 PM (Eastern Standard Time) Monday through Friday. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Lynne Gurley can be reached on 571-272-1670. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of an application may be obtained from the Patent Application Information Retrieval (PAIR) system. Status information for published applications may be obtained from either Private PAIR or Public PAIR. Status information for unpublished applications is available through Private PAIR only. For more information about the PAIR system, see http://pair-direct.uspto.gov. Should you have questions on access to the Private PAIR system, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). O.N. /ORI NADAV/ 2/6/2026 PRIMARY EXAMINER TECHNOLOGY CENTER 2800
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Prosecution Timeline

Jul 13, 2023
Application Filed
Jan 19, 2026
Non-Final Rejection — §102, §103, §112 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
60%
Grant Probability
81%
With Interview (+20.6%)
3y 11m
Median Time to Grant
Low
PTA Risk
Based on 693 resolved cases by this examiner. Grant probability derived from career allow rate.

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