Prosecution Insights
Last updated: April 19, 2026
Application No. 18/221,781

DISPLAY APPARATUS

Non-Final OA §102§103
Filed
Jul 13, 2023
Examiner
SHEKER, RHYS PONIENTE
Art Unit
2813
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Samsung Display Co., Ltd.
OA Round
1 (Non-Final)
85%
Grant Probability
Favorable
1-2
OA Rounds
3y 3m
To Grant
91%
With Interview

Examiner Intelligence

Grants 85% — above average
85%
Career Allow Rate
41 granted / 48 resolved
+17.4% vs TC avg
Moderate +6% lift
Without
With
+5.8%
Interview Lift
resolved cases with interview
Typical timeline
3y 3m
Avg Prosecution
45 currently pending
Career history
93
Total Applications
across all art units

Statute-Specific Performance

§103
59.2%
+19.2% vs TC avg
§102
20.7%
-19.3% vs TC avg
§112
20.1%
-19.9% vs TC avg
Black line = Tech Center average estimate • Based on career data from 48 resolved cases

Office Action

§102 §103
DETAILED ACTION This Office Action is in response to the Applicant Election filed on 11/26/2025. Currently, claims 1-23 are pending in the application. Currently, claims 9-11 and 13-18 are withdrawn. Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Election/Restrictions Applicant’s election without traverse of Species I (Fig. 5) in the reply filed on 11/26/2025 is acknowledged. Claims 9-11 and 13-18 are withdrawn from further consideration pursuant to 37 CFR 1.142(b) as being drawn to a non-selected invention, there being no allowable generic or linking claim. Claims 1-8, 12, and 19-23 are examined in this Office action. Information Disclosure Statement The information disclosure statements (IDS) submitted on 07/13/2023 is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statements are being considered by the Examiner. Priority Receipt is acknowledged of papers submitted under 35 U.S.C. 119(a)-(d), which papers have been placed of record in the file. Drawings The drawings are objected to under 37 CFR 1.83(a). The drawings must show every feature of the invention specified in the claims. Therefore, the auxiliary layer (see claim 20) must be shown or the feature(s) canceled from the claim(s). No new matter should be entered. Corrected drawing sheets in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection(s) to the drawings will not be held in abeyance. Claim Rejections - 35 USC § 102 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale or otherwise available to the public before the effective filing date of the claimed invention. (a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention. Claims 1-3, 12, 22, and 23 are rejected under 35 U.S.C. 102(a)(2) as being anticipated by YAMAZAKI et al. (US Pub. No. 2024/0324392). Regarding independent claim 1, Yamazaki teaches a display apparatus (Fig. 4) comprising: a substrate (Figs. 1A & 4, 51, ¶¶ [0065] & [0082], the Examiner notes that substrate 51 is not pictured in the view of Fig. 4) including a first emission area (Fig. 4, area overlapping 550R, ¶ [0079]), a second emission area (Fig. 4, area overlapping 550G, ¶ [0079]), a third emission area (Fig. 4, area overlapping 550B, ¶ [0079]), and a sensing area (Fig. 4, area overlapping 560, ¶ [0079]); a first organic light-emitting diode (Fig. 4, 550R, ¶ [0079]) disposed on the substrate (Fig. 1A, ¶ [0082]), corresponding to the first emission area, and emitting a first light (¶¶ [0052] & [0079]); a second organic light-emitting diode (Fig. 4, 550G, ¶ [0079]) disposed on the substrate, corresponding to the second emission area, and emitting a second light (¶¶ [0052] & [0079]); a third organic light-emitting diode (Fig. 4, 550B, ¶ [0079]) disposed on the substrate, overlapping the third emission area, and emitting a third light (¶¶ [0052] & [0079]); and a photo detector (Fig. 4, 560, ¶ [0079]) disposed on the substrate and overlapping the sensing area, wherein the first organic light-emitting diode includes a first pixel electrode (Fig. 4, 501R, ¶ [0080]), a first lower emission layer (Fig. 4, lower 523R, ¶ [0084]) disposed on the first pixel electrode, a first upper emission layer (Fig. 4, upper 523R, ¶ [0102]) disposed on the first lower emission layer, and an opposite electrode (Fig. 4, 525R + 525G + 525B + 524, ¶ [0084]) disposed on the first upper emission layer, the second organic light-emitting diode includes a second pixel electrode (Fig. 4, 501G, ¶ [0080]), a second lower emission layer (Fig. 4, lower 523G, ¶ [0084]) disposed on the second pixel electrode, a second upper emission layer (Fig. 4, upper 523G, ¶ [0102]) disposed on the second lower emission layer, and the opposite electrode (Fig. 4, 525R + 525G + 525B + 524, ¶ [0084]) disposed on the second upper emission layer, the third organic light-emitting diode includes a third pixel electrode (Fig. 4, 501B, ¶ [0080]), a third lower emission layer (Fig. 4, lower 523B, ¶ [0084]) disposed on the third pixel electrode, a third upper emission layer (Fig. 4, upper 523B, ¶ [0102]) disposed on the third lower emission layer, and the opposite electrode (Fig. 4, 525R + 525G + 525B + 524, ¶ [0084] disposed on the third upper emission layer, and the photo detector includes a fourth pixel electrode (Fig. 4, 501PD, ¶ [0081]), an active layer (Fig. 4, 543, ¶ [0143]) disposed on the fourth pixel electrode, and the opposite electrode (Fig. 4, 525R + 525G + 525B + 524, ¶ [0084] disposed on the active layer. Regarding claim 2, Yamazaki teaches the display apparatus of claim 1, and Yamazaki teaches a charge generation layer (Fig. 4, 531R + 531G + 531B, ¶¶ [0080]-[0082] & [0089]) disposed on the first lower emission layer (Fig. 4, lower 523R, ¶ [0084]), the second lower emission layer (Fig. 4, lower 523G, ¶ [0084]), and the third lower emission layer (Fig. 4, lower 523B, ¶ [0084]) and simultaneously disposed under the first upper emission layer (Fig. 4, upper 523R, ¶ [0102]), the second upper emission layer (Fig. 4, upper 523G, ¶ [0102]), and the third upper emission layer (Fig. 4, upper 523B, ¶ [0102]). Regarding claim 3, Yamazaki teaches the display apparatus of claim 2, and Yamazaki teaches the active layer (Fig. 4, 543, ¶ [0143]) includes a lower active layer (Fig. 4, lower 543, ¶ [0143]) and an upper active layer (Fig. 4, upper 543, ¶ [0143]) disposed on the lower active layer, the lower active layer is arranged on a same layer as the first lower emission layer, the second lower emission layer, and the third lower emission layer (Fig. 4, lower 543, lower 523R, lower 523G, and lower 523B are all arranged on top of the lower 522 layer, ¶ [0085]), and the upper active layer is arranged on a same layer as the first upper emission layer, the second upper emission layer, and the third upper emission layer (Fig. 4, upper 543, upper 523R, upper 523G, and upper 523B are all arranged on top of the upper 522 layer, ¶ [0085]). Regarding claim 12, Yamazaki teaches the display apparatus of claim 3, and Yamazaki teaches a first common layer (Fig. 4, lower 522, ¶ [0084]) disposed on the first pixel electrode (Fig. 4, 501R, ¶ [0080]), the second pixel electrode (Fig. 4, 501G, ¶ [0080]), the third pixel electrode (Fig. 4, 501B, ¶ [0080]), and the fourth pixel electrode (Fig. 4, 501PD, ¶ [0081]) and under the first lower emission layer (Fig. 4, lower 523R, ¶ [0084]), the second lower emission layer (Fig. 4, lower 523G, ¶ [0084]), and the third lower emission layer (Fig. 4, lower 523B, ¶ [0084]); a second common layer (Fig. 4, 524, ¶ [0085]) disposed on the first lower emission layer, the second lower emission layer, and the third lower emission layer and under the charge generation layer (Fig. 4, 531R + 531G + 531B, ¶¶ [0080]-[0082] & [0089]); a third common layer (Fig. 4, upper 522, ¶ [0084]) disposed on the charge generation layer and under the first upper emission layer, the second upper emission layer, and the third upper emission layer; and a fourth common layer (Fig. 4, upper 524, ¶ [0085]) disposed on the first upper emission layer, the second upper emission layer, and the third upper emission layer, and under the opposite electrode (Fig. 4, 525R + 525G + 525B + 524, ¶ [0084]). Regarding claim 22, Yamazaki teaches the display apparatus of claim 1, and Yamazaki teaches that the active layer (Fig. 4, 543, ¶ [0143]) has a double- layer structure (¶ [0150] teaches that 543 can be a stacked n-type semiconductor and p-type semiconductor) that comprises a p-type semiconductor layer including a p-type organic semiconductor (¶¶ [0146]-[0147]) and an n-type semiconductor layer including an n-type organic semiconductor (¶¶ [0144]-[0145]). Regarding claim 23, Yamazaki teaches the display apparatus of claim 1, and Yamazaki teaches that the active layer (Fig. 4, 543, ¶ [0143]) includes a mixed layer (¶ [0150] teaches that 543 can be a co-evaporated n-type semiconductor and p-type semiconductor) in which a p-type organic semiconductor (¶¶ [0146]-[0147]) is mixed with an n-type organic semiconductor (¶¶ [0144]-[0145]). Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 4, 5, 7, and 8 are rejected under 35 U.S.C. 103 as being obvious over YAMAZAKI et al. (US Pub. No. 2024/0324392) and further in view of KIMURA et al. (US Pub. No. 2024/0196675). Regarding claim 4, Yamazaki teaches the display apparatus of claim 3. However, Yamazaki does not explicitly teach that wavelength ranges of detectable light in the lower active layer and the upper active layer are different from each other (the Examiner notes that Yamazaki does teach an embodiment where their light receiving elements are capable of detecting infrared light (Fig. 7B, ¶ [0156])). However, Kimura is a pertinent art that teaches that wavelength ranges of detectable light in the lower active layer (Fig. 45A, 43PS, ¶ [0321] teaches an organic semiconductor active layer, which would correspond to one of Yamazaki’s active layers) and the upper active layer (Fig. 45A, 43IRS, ¶ [0336] teaches an organic semiconductor active layer, which would correspond to the other one of Yamazaki’s active layers) are different from each other (Fig. 45A, ¶ [0334] teaches light receiving devices 12IRS and 12PS, corresponding to Yamazaki’s light receiving units 542_1 and 542_2, capable of receiving infrared light and visible light). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify Yamazaki’s light receiving devices to be capable of receiving visible light and infrared light according to the teaching of Kimura (Fig. 45A) in order to detect a user’s touch input in different lighting scenarios (Kimura ¶¶ [0358]-[0364]). Regarding claim 5, Yamazaki modified by Kimura teaches the display apparatus of claim 4, and Yamazaki teaches a near-infrared ray emitting portion (Fig. 7B, 550IR, ¶¶ [0155] & [0262]-[0263]) configured to emit near-infrared rays having a wavelength greater than or equal to about 750 nm and less than or equal to about 1000 nm (see ¶ [0155]). Regarding claim 7, Yamazaki modified by Kimura teaches the display apparatus of claim 5, and Yamazaki teaches that the lower active layer (Fig. 4, lower 543, ¶ [0143]) absorbs near-infrared rays having a wavelength greater than or equal to about 750 nm and less than or equal to about 1000 nm (¶¶ [0143]-[0150] teaches that Yamazaki’s active layers can have a same or similar structure as well as include the same or similar organic semiconductor materials as Applicant’s active layers and would therefore be capable of absorbing light within the claimed wavelength), and the upper active layer (Fig. 4, upper 543, ¶ [0143]) absorbs visible rays having a wavelength greater than or equal to about 495 nm and less than or equal to about 570 nm (¶¶ [0143]-[0150] teaches that Yamazaki’s active layers can have a same or similar structure as well as include the same or similar organic semiconductor materials as Applicant’s active layers and would therefore be capable of absorbing light within the claimed wavelength). Regarding claim 8, Yamazaki modified by Kimura teaches the display apparatus of claim 4, and Yamazaki teaches that the lower active layer (Fig. 4, lower 543, ¶ [0143]) and the upper active layer (Fig. 4, upper 543, ¶ [0143]) absorb visible rays having a wavelength greater than or equal to about 495 nm and less than or equal to about 570 nm (¶¶ [0143]-[0150] teaches that Yamazaki’s active layers can have a same or similar structure as well as include the same or similar organic semiconductor materials as Applicant’s active layers and would therefore be capable of absorbing light within the claimed wavelength). Claim 6 is rejected under 35 U.S.C. 103 as being obvious over YAMAZAKI et al. (US Pub. No. 2024/0324392) and further in view of KIMURA et al. (US Pub. No. 2024/0196675) and further in view of SUN et al. (US Pub. No. 2023/0232672). Regarding claim 6, Yamazaki modified by Kimura teaches the display apparatus of claim 5. However, Yamazaki modified by Kimura does not explicitly teach that the near-infrared ray emitting portion is arranged on a lower surface of the substrate. However, Sun is a pertinent art that teaches the near-infrared ray emitting portion (Fig. 7A, 11, ¶ [0127]) is arranged on a lower surface of the substrate (Fig. 7A, 212, ¶ [0053]). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify Yamazaki modified by Kimura’s infrared light emitter to be under the substrate according to the teaching of Sun (Fig. 7A) in order to detect distance based on infrared light while increasing screen-to-body ratio (Sun ¶¶ [0048]-[0050] & [0127]). Claims 19 and 20 are rejected under 35 U.S.C. 103 as being obvious over YAMAZAKI et al. (US Pub. No. 2024/0324392) in view of KAWAKAMI et al. (US Pub. No. 2025/0275469). Regarding claim 19 , Yamazaki teaches the display apparatus of claim 2.However, Yamazaki does not explicitly teach that the charge generation layer includes an n-type charge generation layer and a p-type charge generation layer disposed on the n-type charge generation layer. However, Kawakami is a pertinent art that teaches that the charge generation layer (Fig. 1E, 106, ¶ [0277]) includes an n-type charge generation layer (¶ [0277] teaches that 106 can include an electron injection buffer layer, which is n-type) and a p-type charge generation layer (¶ [0277] teaches that 106 can include a P-type layer stacked with the electron injection buffer layer) disposed on (the Examiner notes that it would be obvious that Kawakami’s p-type layer would be on a top or bottom surface of their electron injection buffer layer in a stacked structure) the n-type charge generation layer. Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify Yamazaki’s charge generation layer to have a stacked structure according to the teaching of Kawakami (Fig. 1E) in order to inhibit an increase in driving voltage (Kawakami ¶ [0277]). Regarding claim 20, Yamazaki teaches the display apparatus of claim 12. However, Yamazaki does not explicitly teach an auxiliary layer arranged between the first upper emission layer and the third common layer, between the second upper emission layer and the third common layer, or between the third upper emission layer and the third common layer, wherein each of the first upper emission layer, the second upper emission layer, and the third upper emission layer contacts the auxiliary layer. However, Kawakami is a pertinent art that teaches an auxiliary layer (Fig. 1D 1E, 112-2, ¶ [0074] teaches that Kawakami’s hole transport layer 112 can have a stacked structure including an electron blocking layer) arranged between the first upper emission layer and the third common layer (Fig. 1D, 112-1, ¶ [0073] teaches a first hole transport layer that would correspond to Yamazaki’s original hole transport layer 522), between the second upper emission layer and the third common layer, or between the third upper emission layer and the third common layer, wherein each of the first upper emission layer, the second upper emission layer, and the third upper emission layer contacts the auxiliary layer (Yamazaki’s hole transport layers 522 would be modified to have a stacked structure with multiple layers according to the teaching of Kawakami and would therefore fulfill these limitations). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify Yamazaki’s hole transport layers according to the teaching of Kawakami (Fig. 1D) in order to increase emission efficiency (Kawakami ¶¶ [0073]-[0074]). Claims 21 is rejected under 35 U.S.C. 103 as being obvious over YAMAZAKI et al. (US Pub. No. 2024/0324392) in view of AKIYAMA et al. (US Pub. No. 2013/0075761). Regarding claim 21, Yamazaki teaches the display apparatus of claim 3. However, Yamazaki does not explicitly teach that a thickness of each of the lower active layer and the upper active layer is between about 300 A and about 700 A. However, Akiyama recognizes that the thickness of a light receiving active layer impacts light sensitivity (¶ [0081]). Akiyama further recognizes the need to prevent a drop in light sensitivity (¶ [0081]). Therefore, the thickness of the a light receiving active layer is an art recognized variable. One of ordinary skill in the art would have had a reasonable expectation of success to arrive within the range of the claim 1 limitations, in order to achieve the desired balance between the impact of the active layer on light sensitivity and the need for preventing a drop in light sensitivity as taught by Akiyama. MPEP 2144.05. Furthermore, the Applicant has not presented persuasive evidence of the criticality of the claimed range (i.e., the claimed range achieves unexpected results relative to the prior art range). Cited Prior Art The Examiner has pointed out particular references contained in the prior art of record within the body of this action for the convenience of the Applicant. Although the specified citations are representative of the teachings in the art and are applied to the specific limitations within the individual claim, other passages and figures may apply. Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. US Pub No. 2025/0042877 by Hayashi et al discloses a display device. The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. US Pub No. 2024/0206216 by Kubota et al discloses a display device. Any inquiry concerning this communication or earlier communications from the examiner should be directed to RHYS P. SHEKER whose telephone number is (703)756-1348. The examiner can normally be reached Monday - Friday 7:30 am to 5 pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Steven B Gauthier can be reached on 571-270-0373. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /R.P.S./ Examiner, Art Unit 2813 /KHAJA AHMAD/ Primary Examiner, Art Unit 2813
Read full office action

Prosecution Timeline

Jul 13, 2023
Application Filed
Dec 29, 2025
Non-Final Rejection — §102, §103
Mar 24, 2026
Interview Requested
Mar 31, 2026
Applicant Interview (Telephonic)
Mar 31, 2026
Examiner Interview Summary

Precedent Cases

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Prosecution Projections

1-2
Expected OA Rounds
85%
Grant Probability
91%
With Interview (+5.8%)
3y 3m
Median Time to Grant
Low
PTA Risk
Based on 48 resolved cases by this examiner. Grant probability derived from career allow rate.

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