DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithsTaN[0044 of Lim]ding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 1-10, 21-23 is/are rejected under 35 U.S.C. 103 as being unpatentable over Chinthakindi (USPGPUB DOCUMENT: 20070176295, hereinafter Chinthakindi) in view of Lim (USPGPUB DOCUMENT: 2012/0049997, hereinafter Lim) and Yagi (USPGPUB DOCUMENT: 2015/0162396, hereinafter Yagi).
Re claim 1 Chinthakindi discloses in Fig 3 a semiconductor device comprising: a substrate[0004]; a metal layer(112) formed on the substrate[0004]; a dielectric layer(122) formed on the substrate[0004] and covering the metal layer(112); a first contact hole(hole of 104/102) formed in the dielectric layer(122), a bottom of the first contact hole(hole of 104/102) exposing a surface of the metal layer(112); a conductive layer(104/102) filled in the first contact hole(hole of 104/102); a thin film resistor layer(106) formed on a portion of the dielectric layer(122), and a cover layer(128) located on the thin film resistor layer(106).
Chinthakindi does not discloses a bottom of the thin film resistor layer(106) contacting a top surface of the conductive layer(104/102); a thin film resistor layer formed on the conductive layer,
Lim discloses in Fig 19 a bottom of the thin film resistor layer(202) contacting a top surface of the conductive layer(208);
It would have been obvious to one of ordinary skill in the art before the effective filling date of the invention to apply the teachings of Lim to the teachings of Chinthakindi in order to achieve tight tolerances with respect to resisTaN[0044 of Lim]ce and size to better attain precise, stable resisTaN[0044 of Lim]ces [0004, Lin].
Chinthakindi does not discloses a thin film resistor layer formed on the conductive layer,
Yagi discloses a thin film resistor layer(23/20) formed on the conductive layer(30/33),
It would have been obvious to one of ordinary skill in the art before the effective filling date of the invention to apply the teachings of Yagi to the teachings of Chinthakindi in order to further shortening manufacturing time and reducing costs for manufacturing masks [0007, Yagi].
Re claim 2 Chinthakindi and Lim and Yagi disclose the semiconductor device according to claim 1, further comprising: a second contact hole formed in the dielectric layer(122) and the cover layer(128) and penetrating the dielectric layer(122) and the cover layer(128), a bottom of the second contact hole exposing the surface of the metal layer(112).
Re claim 3 Chinthakindi and Lim and Yagi disclose the semiconductor device according to claim 2, further comprising: a second conductive layer(104/102) filled in the second contact hole.
Re claim 4 Chinthakindi and Lim and Yagi disclose the semiconductor device according to claim 3, further comprising: a second metal layer(112) formed on the cover layer(128), a bottom surface of the second metal layer(112) contacting a top of the second conductive layer(104/102).
Re claim 5 Chinthakindi and Lim and Yagi disclose the semiconductor device according to claim 1, wherein the substrate[0004] includes: a base substrate[0004]; a storage device; and a logic device formed on the base substrate[0004].
Re claim 6 Chinthakindi and Lim and Yagi disclose the semiconductor device according to claim 5, wherein the dielectric layer(122) is formed on the storage device and the logic device.
Re claim 7 Chinthakindi and Lim and Yagi disclose the semiconductor device according to claim 1, wherein a material of the metal layer(112) is aluminum, copper, and nickel[0067 of Lim].
Re claim 8 Chinthakindi and Lim and Yagi disclose the semiconductor device according to claim 1, further comprising: a protective layer(128 of Lim) formed on the metal layer(112).
Re claim 9 Chinthakindi and Lim and Yagi disclose the semiconductor device according to claim 1, wherein a material of the dielectric layer(122) includes silicon oxide, silicon nitride[0017 of Lim], silicon nitride boride, silicon oxycarbide, or silicon oxynitride.
Re claim 10 Chinthakindi and Lim and Yagi disclose the semiconductor device according to claim 1, wherein a material of the thin film resistor layer(106) includes CrSi, SiCCr, TaN[0044 of Lim], or NiCr.
Re claim 21 Chinthakindi and Lim and Yagi disclose the semiconductor device according to claim 1, further comprising: an anti-reflective layer on the thin film resistor layer(126 of Lim).
Re claim 22 Chinthakindi and Lim and Yagi disclose the semiconductor device according to claim 21, wherein: a material of the anti-reflective layer is SiON(126 of Lim).
Re claim 23 Chinthakindi and Lim and Yagi disclose the semiconductor device according to claim 21, wherein: the cover layer(105 of Lim) is formed on the anti-reflective layer and the dielectric layer, covering the anti-reflective layer(126 of Lim).
Response to Arguments
Applicant’s arguments with respect to claim 1-10, 21-23 have been considered but are moot because the arguments do not apply to any of the references being used in the current rejection.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
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/PATRICIA D VALENZUELA/Primary Examiner, Art Unit 2812
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