DETAILED ACTION
Notice of Pre-AIA or AIA Status
1. The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Amendment
2. Applicant’s amendment to the claims, filed on December 11, 2025, is acknowledged. Entry of amendment is accepted and made of record.
Response to Arguments/Remarks
3. Applicant’s arguments/remarks, see pgs. 6-11, with respect to the immediate allowance of the current application have been fully considered but are not persuasive.
Pertaining to the Applicant’s arguments/remarks, pgs. 6-8, regarding Whitefield:
The arguments state the Whitefield prior art does not disclose methods which are compatible with the Weeks prior art due to the spin coating, dipping, or other growth techniques of the carbon nanotube layer:
The Examiner notes that the primary reference Weeks already discloses the PVD to form the fuse and Whitefield is only relied on for the material of the fuse to be carbon nanotube material. Should the Applicant’s arguments be interpreted to mean that it is impossible for carbon nanotube material to be formed by PVD, see evidentiary reference Delaunay et al. (US 6,787,200 B1) column 2 lines 14-18 which states that “processes for producing carbon nanotubes by PVD processes”. Moreover Whitefield discloses an open ended process in [0043] “… or other growth or deposition techniques” meaning that the argued spin coating or dipping are not the sole methods capable of manufacturing the carbon nanotube.
Pertaining to the argument that a carbon nanotube is not a film due to the rolled-up sheets of carbon. The Examiner notes that the claim as currently recited is not so specific such as to preclude the carbon nanotube material from being a film because the element 5 as seen in Weeks with a change in material would still be a sheetlike structure with a longer length than vertical thickness interpreted to be a film. Should the Applicant desire to preclude a tube structure they may specify such in the claims.
The Examiner agrees that the references do not anticipate the claims nor do they refer to each other for the specific combination provided by the Examiner such that not all of the technical details involved in manufacturing the combined structure of the prior arts will be present.
However, the Examiner notes that the combination of prior art will not contain every technical detail for the specific obviousness combination provided in the Office action as they are separate Applications. However, MPEP 2143 Examples of Basic Requirements of a Prima Facie Case of Obviousness. I. (B) Simple substitution of one known element for another to obtain predictable results and (G) Some teaching, suggestion, or motivation in the prior art that would have led one of ordinary skill to modify the prior art reference or to combine prior art reference teachings to arrive at the claimed invention, in particular are provided for which there is a preponderance of evidence that the combination would have been obvious to one of ordinary skill in the art.
0000.
All arguments directed towards the same as addressed above are responded in kind.
Note by the Examiner
4. For clarity, the reference to specific claim numbers are presented in bold. Cited claim limitations are presented in bold the first time they are associated with a particular prior art disclosing the cited limitations, and subsequent reference to the already disclosed claim limitations are presented un-bolded. Certain elements from prior art which are not required by the claims are also presented un-bolded if they are particularly pertinent to understanding how the references are being combined. Item-to-item matching and Examiner explanations for 102 &/or 103 rejections have been provided in parenthesis.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
5. Claim 1, 3-5, 13-14, and 16 are rejected under 35 U.S.C. 103 as being unpatentable over Weeks (US 2010/0013045 A1), hereinafter as W1, in view of Whitefield et al. (US 2006/0258122 A1), hereinafter as W2
6. Regarding Claim 1, W1 discloses a method of forming an electronic device (see Figs. 1a-l and [0048] “a method of fabricating a fuse device”), the method comprising:
depositing, by physical vapor deposition (see [0058] “the material used for the conductive layer 2 is TiN (Titanium Nitride), deposited by a DC Magnetron reactive sputter process. This deposition process can be done in many different types of PVD system”), a film (see Fig. 1c element 2) on a surface of a layer (top surface of layer element 1) formed in a back end of line of complementary metal-oxide semiconductor processing of the electronic device (see [0001, 0105] “encapsulated fuse devices for use in, for example, the integration into Back End Of Line (BEOL) Complementary Metal Oxide Semiconductor (CMOS) devices”);
forming a hard mask above the film (see Figs. 1c-d and [0060-0062] “The patterning is done by the usual technique of applying a photo-resist mask, etching the mask pattern into the conductive layer 3, and then removing the photo-resist mask layer”);
etching the film using the hard mask to form a pattern for the film (see Figs. 1c-d and [0060-0062]);
sealing the etched film after forming the etched film, forming a sealed structure (see Fig. 1l and [0101] “depositing a silicon nitride passivation layer and to close and seal the release etch holes. This seals the free-standing TiN element inside a cavity”); and
arranging the sealed structure as a portion of a component of the electronic device (see Fig. 1l the sealed element 5 structure is a portion of a fuse component of the integrated circuit electronic device comprising at least CMOS devices).
W1 does not disclose the film is a carbon film.
W2 discloses the film is a carbon film (see Figs. 1-14 and [0040] “formation of fuses using a carbon nanotube layer that is compatible with existing integrated circuit fabrication methods” and [0045] “carbon nanotube fuse 24”).
The material of the fuse film as taught by W2 is incorporated as a material of the fuse film of W1.
It would have been obvious to one having ordinary skill in the art at the time the invention was effectively filed to incorporate the teachings of W2 with W1 because the combination allows for an alternate approach for making fuses that is potentially cheaper and more reliable, while still being compatible with existing integrated circuit processes (see W2 [0040]); and the combination is simple substitution of one known element for another to obtain predictable results – simple substitution of one known fuse material for another in a similar device for which it is provided as an alternate compatible material to obtain predictable results (see W2 [0040]).
7. Regarding Claim 3, W1, W2 disclose the method of claim 1, wherein the method includes forming a dielectric (see W1 Fig. 1 and [0101] “silicon nitride passivation layer”) on the carbon film as a protective layer in forming the sealed carbon structure and maintaining portions of the dielectric on the carbon film in the electronic device in completed format (see W2 Fig. 11 and [0101]).
8. Regarding Claim 4, W1, W2 disclose the method of claim 1, wherein the sealed carbon structure is a fuse (see W1), a resistor, or a gate of an insulated gate field-effect transistor.
9. Regarding Claim 5, W1 discloses a method of forming an electronic device (see Figs. 1a-l and [0048] “a method of fabricating a fuse device”), the method comprising:
sputtering (see [0058] “the material used for the conductive layer 2 is TiN (Titanium Nitride), deposited by a DC Magnetron reactive sputter process. This deposition process can be done in many different types of PVD system”) a film (see Fig. 1c element 2) on a surface (see Fig. 1c surface of element 1) above a level of circuitry (circuitry, including at least unshown CMOS, below element 1, see [0048] “CMOS with 5 levels of metal interconnects”) after forming the circuitry and vias (vias shown within at least element IMD3) between the surface and the level of circuitry;
forming a hard mask (see Figs. 1c-d and [0060-0062] “The patterning is done by the usual technique of applying a photo-resist mask, etching the mask pattern into the conductive layer 3, and then removing the photo-resist mask layer”) above the film (see Figs. 1c-d and [0060-0062]);
etching the carbon film using the hard mask (see Figs. 1c-d and [0060-0062]) to form a fuse pattern (see Figs. 1a-l and [0048] “a method of fabricating a fuse device”) for the film; and
sealing the etched film after forming the etched film as a fuse (see Fig. 1l and [0101] “depositing a silicon nitride passivation layer and to close and seal the release etch holes. This seals the free-standing TiN element inside a cavity”).
W1 does not disclose the film is carbon.
W2 discloses the film is a carbon film (see Figs. 1-14 and [0040] “formation of fuses using a carbon nanotube layer that is compatible with existing integrated circuit fabrication methods” and [0045] “carbon nanotube fuse 24”).
The material of the fuse film as taught by W2 is incorporated as a material of the fuse film of W1.
It would have been obvious to one having ordinary skill in the art at the time the invention was effectively filed to incorporate the teachings of W2 with W1 because the combination allows for an alternate approach for making fuses that is potentially cheaper and more reliable, while still being compatible with existing integrated circuit processes (see W2 [0040]); and the combination is simple substitution of one known element for another to obtain predictable results – simple substitution of one known fuse material for another in a similar device for which it is provided as an alternate compatible material to obtain predictable results (see W2 [0040]).
10. Regarding Claim 13, W1, W2 disclose the method of claim 5, wherein sealing the etched carbon film includes forming a dielectric spacer (see Fig. 1h the element IMD4 is further corresponded as comprised by the sealing) along a vertical side of the etched carbon film.
11. Regarding Claim 14, W1, W2 disclose the method of claim 5, wherein the method includes forming the hard mask to a thickness correlated to thickness of the sputtered carbon film (the hard mask is inherently formed correlated, related, to the thickness of the carbon film because the hard mask must have sufficient thickness in order to ensure only the desired areas of the sputtered carbon film are removed and that the portion of the sputtered carbon film under the hard mask has sufficient protection in order to result in the structure seen in W1 Fig. 1d).
12. Regarding Claim 16, W1, W2 disclose the method of claim 5, wherein the method includes structuring the circuitry with components to operate the fuse as a permanent data component (see [0001, 0105] “encapsulated fuse devices for use in, for example, the integration into Back End Of Line (BEOL) Complementary Metal Oxide Semiconductor (CMOS) devices”; note, the fuse is integrated and is considered a permanent data component in communication with the circuitry in the same manner as the Applicant’s invention).
13. Claim 2 is rejected under 35 U.S.C. 103 as being unpatentable over Weeks (US 2010/0013045 A1), hereinafter as W1, in view of Whitefield et al. (US 2006/0258122 A1), hereinafter as W2, Mu (CN 106809825 A, see attached translation document), hereinafter as M1
14. Regarding Claim 2, W1, W2 disclose the method of claim 1.
W1, W2 do not disclose wherein the method includes performing the physical vapor deposition at temperatures substantially lower than processing temperatures used in forming circuitry to which the carbon film is coupled.
M1 discloses wherein the method includes performing the physical vapor deposition at temperatures substantially lower than processing temperatures used in forming circuitry to which the carbon film is coupled (see pg. 5 “5. vacuum sputtering carbon. the titanium oxide layer of the polyurethane film after etching is carried out vacuum sputtering plating carbon. wherein the vacuum degree is 100Pa, temperature is 200 °C”; note, the Applicant’s specification discloses a temperature lower than 400 °C which is disclosed by M1).
The temperature for depositing the carbon as taught by M1 is incorporated as a temperature for depositing the carbon of W1, W2.
It would have been obvious to one having ordinary skill in the art at the time the invention was effectively filed to incorporate the teachings of M1 with W2 because the combination is simple substitution of one known element for another to obtain predictable results – simple substitution of one known method of forming carbon for another to obtain predictable results (see M1 pg. 5).
15. Claims 7 and 11 are rejected under 35 U.S.C. 103 as being unpatentable over Weeks (US 2010/0013045 A1), hereinafter as W1, in view of Whitefield et al. (US 2006/0258122 A1), hereinafter as W2, in view of Hirota (US 2009/0061329 A1), hereinafter as H1
16. Regarding Claim 7, W1, W2 disclose the method of claim 5.
W1, W2 do not disclose wherein the method includes forming an etch stop on the carbon film on which the hard mask is formed.
H1 discloses wherein the method includes forming an etch stop on the carbon film on which the hard mask is formed (see Figs. 1-4 carbon film element 103 has an etch stop element 104 and a hard mask element 105,106 for a process which includes patterning of the carbon film element 103; see [0042] “conductive carbon film 103”, see Fig. 3 and [0054] dry etching stopped at the etch stop element 104, and see Fig. 4 and [0055] “patterned intermediate layer 105 as a mask”).
The etch stop layer in between the hard mask and the carbon film for which the carbon film is patterned as taught by H1 is incorporated as an etch stop layer in between the hard mask and the carbon film for which the carbon film is patterned of W1.
It would have been obvious to one having ordinary skill in the art at the time the invention was effectively filed to incorporate the teachings of H1 with W1 because the combination can be formed with a desired thickness without affect alignment for relevant exposure and sufficient resistance for targeted etching (see H1 and [0050]), and the combination is simple substitution of one known element for another to obtain predictable results – simple substitution of one known number of layers over a conductive carbon element for patterning for another to obtain predictable results (see H1 Figs. 1-4)
17. Regarding Claim 11, W1, W2 disclose the method of claim 5.
W1, W2 do not disclose wherein etching the carbon film using the hard mask includes forming a patterned photoresist above the hard mask and etching the hard mask.
H1 discloses wherein etching the carbon film using the hard mask includes forming a patterned photoresist (see Figs. 1-2 patterned photoresist element 106) above the hard mask and etching the hard mask (see Figs. 2-3 hard mask element 105 is etched; see [0052-0054]).
The patterned photoresist used to etch the hard mask as taught by H1 is incorporated as a patterned photoresist used to etch the hard mask of W1.
It would have been obvious to one having ordinary skill in the art at the time the invention was effectively filed to incorporate the teachings of H1 with W1 because the combination can be formed with a desired thickness without affect alignment for relevant exposure and sufficient resistance for targeted etching (see H1 and [0053-0054]), and the combination is simple substitution of one known element for another to obtain predictable results – simple substitution of one known method of forming a pattern in an etching process of a conductive carbon layer for another to obtain predictable results (see H1 Figs. 1-4).
Allowable Subject Matter
18. Claims 17-20 are allowed
Claims 6, 8-10, and 15 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is an examiner’s statement of reason for indicating allowable subject matter:
The prior art made of record, either singularly or in combination, does not disclose or suggest at least the claim limitations of:
19. Claim 6, “annealing the sputtered carbon film at a temperature and for a time until resistance of the carbon film is within a specified range of resistance values” – as instantly claimed and in combination with the additionally claimed limitations.
20. Claim 8, “forming the etch stop includes depositing a silicon nitride and forming the hard mask includes forming an oxide” – as instantly claimed and in combination with the additionally claimed limitations.
21. Claim 9, “sputtering the carbon film on a conductive landing formed on two vias of the vias formed between the surface from the level of circuitry” – as instantly claimed and in combination with the additionally claimed limitations.
All claims depending on the current claim incorporate the same allowable subject matter.
22. Claim 15, “etching the carbon film using the hard mask to form a fuse pattern includes forming a pattern of array of fuses, with each fuse contacting two vias between the surface from the level of circuitry” – as instantly claimed and in combination with the additionally claimed limitations.
23. Claim 17, “forming carbon fuses as data storage components of the memory cells, each carbon fuse formed by: depositing, by physical vapor deposition, a carbon film on a surface of a layer above a level of the circuitry, access transistors, access lines, and data lines after forming vias between the surface and the level of the circuitry, access transistors, access lines, and data lines; forming a hard mask above the carbon film; etching the carbon film using the hard mask to form a fuse pattern for the carbon film; and sealing the etched carbon film after forming the etched carbon film as a fuse” – as instantly claimed and in combination with the additionally claimed limitations.
All claims depending on the current claim incorporate the same allowable subject matter.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure; pertinent prior art(s) and most relevant portion(s) is provided:
Delaunay et al. (US 6,787,200 B1) column 2 lines 14-18
THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to SAMUEL PARK whose telephone number is (303)297-4277. The examiner can normally be reached Normal Schedule: M-F Sometime between 6:30 a.m. - 7:00 p.m..
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Steven H. Loke can be reached at (571) 272-1657. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/SAMUEL PARK/Examiner, Art Unit 2818