Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-3 and 6-10 are rejected under 35 U.S.C. 103 as being unpatentable over Inaishi et al. [US 2008/0027701 A1].
Taking claim 1 as exemplary of claims 1 and 7-10 [0069, 0099], Inaishi et al. teach an element search method [0108], comprising:
acquiring an element search instruction carrying an element identifier information of a target element [0041 target, 0051 means for inputting design instruction information, input by the input means, 0208 based on an ID to acquire information];
determining an element prediction type matching the target element based on the element identifier information [0041 keywords, 0043 keywords are set to articles having the same type and function, 0155-0156 design instructions and keywords];
searching for the target element on a search panel according to the element prediction type to acquire element attribute information of the target element [0119, 0157];
determining a target layer of the target element in a Printed Circuit Board (PCB) layout based on the element attribute information [0036 multiple layer printed circuit board, the interrelation between items are automatically displayed, 0019], opening the target element at the target layer [0055 controlling the display condition, 0168], and highlighting the opened target element [0054 highlighting a target item, 0089, 0166-0167].
However, Inaishi et al. do not explicitly recite “opening” or “opened.” Yet, it can be understood that the result of highlighting a target element is obtained through opening and opened such as depicted in FIG. 10, from the determined target layer of the target element to the identifiably displayed or highlighted target article or item, or in consideration of scripts and files in the computer system [0121]. Thus, the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains because a target article can be quickly found and the result does not depend on the skill of the operator, time loss is lightened [0044].
As per claim 2, the method according to claim 1, wherein the element search instruction further carries trigger information [FIG. 7 search conditions allocated, 0208 priority/condition setting]; the method further comprises: before determining the element prediction type matching the target element based on the element identifier information [as input cited above], determining whether the trigger information matches predefined trigger information [0043 extraction condition, 0163 extraction conditions, 0208 priority/condition setting]; determining whether the element identifier information meets a search requirement when the trigger information matches the predefined trigger information [0209]; when the element identifier information meets the search requirement, performing the step of determining the element prediction type matching the target element based on the element identifier information [0041 keywords, 0043 keywords are set to articles having the same type and function, 0155-0156 design instructions and keywords].
As per claim 3, although Inaishi et al. teach wherein disassembling the element identifier information when the element identifier information includes the preset symbol [FIG. 8 depicts an exemplary extraction condition by name begins with which is interpreted as disassembling, 0043 predetermined storage region is interpreted to include preset symbols], and determining the element prediction type matching the target element according to a disassembly result [a disassembly result is interpreted as of a name that beings with in accordance with 0041 keywords, 0043 keywords are set to articles having the same type and function, 0155-0156 design instructions and keywords]; Inaishi et al. do not appear to teach the determining the element prediction type matching the target element based on the element identifier information comprises: directly determining the element prediction type matching the target element according to the element identifier information when the element identifier information excludes a preset symbol. Yet, priority/condition setting would provide a user with the ability to exclude a preset symbol similarly to the extraction condition depicted in FIG. 8 as name begins with which may exclude the remainder of a name considered a preset symbol. Thus, with a target article quickly found by a search function based on character string [0119], the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains because automatically omitting information achieves the shortening of the design period [0046].
As per claim 6, although Inaishi et al. teach wherein the element attribute information comprises element position information [0003 design instructions inherently include location] and scaling and highlighting the opened target element before highlighting the target element at the target layer [0055 zooming up or the like, prescript and postscript for controlling the display condition, FIG. 10], the reference does not appear to teach the opening the target element at the target layer and highlighting the opened target element comprises: opening the target element at the target layer based on the element position information. Yet, the circuit diagrams in FIGS. 6, 9-10 clearly depict element position information. Thus, the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains because using element position information results in highlighting target elements at their locations in the circuit design with accuracy.
Claim 4 is rejected under 35 U.S.C. 103 as being unpatentable over Inaishi et al. [US 2008/0027701 A1] as applied to claim 1 above, and further in view of Q. Hui et al. [“Method for the Implementation of PCB Verification with Graphics”].
Q. Hui et al. teach searching for well known types of elements in a printed circuit board [Figure 2, page 7, note the highlighted portions throughout the document]. Thus, Q. Hui et al. provide sufficient subject matter regarding the well-known elements of a printed circuit board such that wherein the searching for the target element on the search panel according to the element prediction type comprises: searching for a symbol element on the search panel according to the element identifier information when the element prediction type is a symbol type; searching for a character layer number element on the search panel according to the element identifier information when the element prediction type is a character layer number type; searching for a Nets connection element on the search panel according to the element identifier information when the element prediction type is a Nets connection type; disassembling the element identifier information on the search panel to obtain a disassembly result when the element prediction type is a pin type, and searching for a pin element according to the disassembly result; searching for at least one initial copper foil element on the search panel according to the element identifier information when the element prediction type is a copper foil type, and determining a target copper foil element according to an area of each initial copper foil element; searching for a differential pair element on the search panel according to the element identifier information when the element prediction type is a differential pair type; searching for a footprint element on the search panel according to the element identifier information when the element prediction type is a footprint type would have been obvious over the combination of references. Therefore, the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains because it can shorten the design period and increase the design efficiency [Abstract].
Claim 5 is rejected under 35 U.S.C. 103 as being unpatentable over Inaishi et al. [US 2008/0027701 A1] in view of Q. Hui et al. as applied to claim 4 above, and further in view of Zhao Bing [CN114707457A].
Zhao Bing teaches searching and locating the position of a PCB metal wire in multiple layers [see the entire document, particularly the highlighted portions]. Thus, the reference provides sufficient subject matter regarding the well-known layers of a printed circuit board such that wherein the element attribute information comprises element mirroring information; the target layer comprises a top layer, a bottom layer or an inner layer; and the determining the target layer of the target element in the PCB layout based on the element attribute information comprises: when the element prediction type is the symbol type, determining that the symbol element is located at the top layer of the PCB layout when element mirroring information of the symbol element is a first mark, and determining that the symbol element is located at the bottom layer of the PCB layout when the element mirroring information of the symbol element is a second mark; when the element prediction type is the character layer number type, determining that the character layer number element is located at the top layer of the PCB layout when element mirroring information of the character layer number element is the first mark, and determining that the character layer number element is located at the bottom layer of the PCB layout when the element mirroring information of the character layer number element is the second mark; directly determining the target layer of the Nets connection element as one of the top layer, the bottom layer, or the inner layer when the element prediction type is the Nets connection type; when the element prediction type is the pin type, determining that the pin element is located at the top layer of the PCB layout when element mirroring information of the pin element is the first mark, and determining that the pin element is located at the bottom layer of the PCB layout when the element mirroring information of the pin element is the second mark; when the element prediction type is the copper foil type, determining that the target copper foil element is located at the top layer of the PCB layout when element mirroring information of the target copper foil element is the first mark, and determining that the target copper foil element is located at the bottom layer of the PCB layout when the element mirroring information of the target copper foil element is the second mark; directly determining the target layer of the differential pair element as one of the top layer, the bottom layer, or the inner layer when the element prediction type is the differential pair type; when the element prediction type is the footprint type, determining that the footprint element is located at the top layer of the PCB layout when element mirroring information of the footprint element is the first mark, and determining that the footprint element is located at the bottom layer of the PCB layout when the element mirroring information of the footprint element is the second mark would have been obvious over the combination of references. Therefore, the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains because it is convenient for viewing, comprehensive information, high efficiency, and no omission [page 3, 4th paragraph, beneficial effects].
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Ginetti [US 10,878,164 B1] disclose rendering a representation with emphasis (entire document). CN104112031A discloses finding and filtering pins through layers of printed circuit boards (entire document). CN112685992A discloses quickly finding cross-plane wiring and highlighting on a display, including stacking information and coordinates (entire document).
Any inquiry concerning this communication or earlier communications from the examiner should be directed to LEIGH M GARBOWSKI whose telephone number is (571)272-1893. The examiner can normally be reached M-F 9-5 EST.
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/LEIGH M GARBOWSKI/Primary Examiner, Art Unit 2851
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