DETAILED ACTION
This action is responsive to communication filed 08/07/2023.
Information Disclosure Statement
The information disclosure statements (IDS) submitted on 7/27/2023, 8/30/2024, 8/6/2025, and 12/10/2025 are acknowledged. The submissions are in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statements are being considered by the examiner.
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1-3, 5-9, 14, and 16-20 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Then et al. (WO 2019066878 A1).
Regarding claim 1, Then et al. (see, e.g., FIG. 1) discloses a structure comprising: a gate structure (112); a first field plate (118) on a first side of the gate structure; and a second field plate (120) on a second side of the gate structure independent from the first field plate.
Regarding claim 2, Then et al. discloses the structure of claim 1, wherein the first field plate is electrically isolated from the second field plate (pg. 5, lines 25-29).
Regarding claim 3, Then et al. discloses the structure of claim 2, wherein the first field plate and the second field plate are electrically isolated from the gate structure (pg. 5, lines 25-29).
Regarding claim 5, Then et al. (see, e.g., FIG. 3H) discloses the structure of claim 1, wherein the first field plate and the second field plate comprise a same metal material (368 and pg. 10, lines 16-19) and are planar with each other (pg. 5, lines 1-4).
Regarding claim 6, Then et al. (see, e.g., FIG. 1) discloses the structure of claim 1, wherein the gate structure comprises sidewall spacers which isolate the first field plate and the second field plate from the gate structure (170).
Regarding claim 7, Then et al. (see, e.g., FIG. 1) discloses the structure of claim 1, wherein the first field plate is on a source side (114) of the gate structure and the second field plate is on a drain side (116) of the gate structure.
Regarding claim 8, Then et al. discloses the structure of claim 7, wherein the first field plate and the second field plate have independently controlled voltage potential (pg. 5, lines 14-18).
Regarding claim 9, Then et al. (see, e.g., FIG. 1) discloses the structure of claim 1, wherein the first field plate and the second field plate are symmetrically positioned about the gate structure (dSG, dDG, and pg. 4, lines 7-10).
Regarding claim 14, Then et al. (see, e.g., FIG. 1) discloses a structure comprising: a gate structure (112); a first field plate (120) on a drain side (116) and electrically isolated from the gate structure (pg. 5, lines 25-29); and a second field plate (118) on a source side (114) of and electrically isolated from the first field plate and the gate structure (pg. 5, lines 25-29).
Regarding claim 16, Then et al. (see, e.g., FIG. 1) discloses the structure of claim 14, wherein the first field plate and the second field plate are symmetrically positioned about the gate structure (dSG, dDG, and pg. 4, lines 7-10).
Regarding claim 17, Then et al. discloses the structure of claim 14, wherein the first field plate and the second field plate are on a same level (pg. 5, lines 1-6).
Regarding claim 18, Then et al. (see, e.g., FIG. 3H) discloses the structure of claim 17, wherein the first field plate and the second field plate are planar (pg. 5, lines 1-4) and made of a same material (368).
Regarding claim 19, Then et al. discloses the structure of claim 14, wherein the first field plate and the second field plate have independently controlled potentials (pg. 5, lines 14-18).
Regarding claim 20, Then et al. (see, e.g., FIG. 3G and 3H) discloses a method comprising: forming a gate structure (360); forming a first field plate on a first side of the gate structure (362); and forming a second field plate on a second side of the gate structure, independent from the first (364).
Claims 1 and 10-13 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Yifeng (EP 1921669 A1).
Regarding claim 1, Yifeng (see, e.g., FIG. 4) discloses a structure comprising: a gate structure (24 and 34); a first field plate on a first side of the gate structure (44); and a second field plate on a second side of the gate structure independent from the first field plate (32).
Regarding claim 10, Yifeng discloses the structure of claim 1, wherein the gate structure comprises a T-shape (see annotated Fig. 4) and the first field plate and the second field plate are under a horizontal portion (see annotated Fig. 4) of the T-shape gate structure ([0050] and [0052]).
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Regarding claim 11, Yifeng discloses the structure of claim 1, wherein the horizontal portion of the T-shape gate structure extends further than the first field plate and the second field plate (While FIG. 4 does not show that the gate structure extends further than the second field plate 32, paragraph [0044] defines the distance from the gate to the second field plate as being between 0.05-0.5 µm and paragraph [0050] defines the distance that the horizontal portion of the T-shaped gate extends as being between 0-3 µm. Therefore an embodiment is disclosed wherein the horizontal portion of the T-shape gate structure extends further than the second field plate).
Regarding claim 12, Yifeng discloses the structure of claim 1, wherein the gate structure (24 and 34) comprises a high-electron-mobility transistor ([0021]) contacting a semiconductor material (18).
Regarding claim 13, Yifeng discloses the structure of claim 12, wherein the first field plate (44) and the second field plate (32) are on an insulator material (28) above the semiconductor material (18).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim 4 is rejected under 35 U.S.C. 103 as being unpatentable over Then et al. (WO 2019066878 A1), as applied to claim 3 above, and in further in view of Yifeng (EP 1921669 A1).
Regarding claim 4, Then et al. teaches the structure of claim 3 as put forth in a prior anticipation rejection. However, Then et al. fails to teach that the first and second field plate are under a portion of the gate structure.
Yifeng teaches that the first and second field plates are under a portion of the gate structure ([0052]).
Yifeng teaches that a T-shaped gate structures with field plates under the overhangs is advantageous by reducing peak electric field, gate-to-source capacitance, and gate-to-drain capacitance while increasing gate conductance ([0021] and [0027]). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to incorporate a T-shaped overhang above the first and second field plates as described by Yifeng to the gate structure as described by Then et al in order to increase gate conductance.
Claims 14 and 15 are rejected under 35 U.S.C. 103 as being unpatentable over Yifeng (EP 1921669 A1), in view of Then et al. (WO 2019066878 A1).
Regarding claim 14, Yifeng teaches a structure comprising: a gate structure (24 and 34); a first field plate (32) on a drain side of the gate structure; and a second field plate (44) on a source side of the first field plate and gate structure. However, Yifeng fails to teach that the first field plate is electrically isolated from the gate structure and that the second field plate is electrically isolated from the first field plate and gate structure.
Then et al. teaches that the first field plate is electrically isolated from the gate structure and that the second field plate is electrically isolated from the first field plate and gate structure (pg. 5, lines 25-29).
Then et al. teaches that having the first field plate is electrically isolated from the gate structure and that the second field plate is electrically isolated from the first field plate and gate structure is advantageous because the first and second field plates can be biased to a potential different than the gate, ground, or each other (pg. 5, lines 14-18). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to incorporate the electrical isolation of the field plates as described by Then et al. to the structure as described by Yifeng in order to independently bias the field plates.
Regarding claim 15, Yifeng teaches the structure of claim 14, wherein the gate structure (24 and 34) comprises a high-electron-mobility transistor ([0021]) contacting a semiconductor material (18).
Conclusion
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/AIDAN D BANKLER/Examiner, Art Unit 2817
/Kretelia Graham/Supervisory Patent Examiner, Art Unit 2817 January 8, 2026