DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Election/Restrictions
Applicant’s election without traverse of Invention I in the reply filed on November 10, 2025 is acknowledged.
Claims 11-20 are withdrawn from further consideration pursuant to 37 CFR 1.142(b) as being drawn to a nonelected invention, there being no allowable generic or linking claim. Election was made without traverse in the reply filed on November 10, 2025.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claims 1, 9-10 are rejected under 35 U.S.C. 102(a)(2) as being anticipated by Zhang et al (US Publication no. 2024/0071809).
Regarding claim 1, Zhang discloses a semiconductor device, comprising: a substrate Fig 7, 10 having a surface; a plurality of active areas Fig 7, 11 disposed on the surface of the substrate Fig 7, wherein each of the plurality of active areas comprises a semiconductor layer ¶0075, and the semiconductor layer and the substrate have a first interface therebetween Fig 17;a shallow trench isolation Fig 17, 12 disposed on the substrate and surrounding the plurality of active areas Fig 17, 11; and a plurality of buried gates Fig 18, each being buried in one of the plurality of active areas and disposed above the first interface ¶0117-0120.
Regarding claim 9, Zhang discloses wherein a cross section of each of the plurality of active areas is wider at top and narrower at bottom Fig 6-18.
Regarding claim 10, Zhang discloses wherein the cross-section of each of the plurality of active areas comprises sidewalls of different slopes Fig 6-18.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim 2 is rejected under 35 U.S.C. 103 as being unpatentable over Zhang et al (US Publication no. 2024/0071809) in view of Lee et al (US Publication No. 2023/0378166).
Regarding claim 2, Zhang discloses all the limitations but silent on the type of material for the semiconductor layer.
Whereas Lee discloses wherein the semiconductor layer contains heteroatoms distributed in a concentration gradient manner ¶0021.
Zhang and Lee are analogous art because they are directed to semiconductor devices having metal gates and one of ordinary skill in the art would have had a reasonable expectation of success to modify Zhang because they are from the same field of endeavor.
Therefore, it would have been obvious to one having ordinary skill of the art before the effective filing date of the claimed invention to modify the device and incorporate the teachings of Lee to improve device performance and since it has been held to be within the general skill of a worker in the art to select a known material on the basis of its suitability for the intended use as a matter of design choice. In re Leshin, 125 USPQ 416 (1960).
Claim 3, 5-8 are rejected under 35 U.S.C. 103 as being unpatentable over Zhang et al (US Publication no. 2024/0071809) in view of Lee et al (US Publication No. 2023/0378166) and Kondo (US Publication No. 2022/0093727).
Regarding claim 3, Zhang discloses all the limitations but silent on the sublayers.
Whereas Kondo discloses wherein the semiconductor layer comprises a first semiconductor sub-layer and a second semiconductor sub-layer Fig 1, 103, which are stacked in sequence and have a second interface therebetween, and the second interface has an arc shaped cross section or a hexagon shaped cross section Fig 1.
Zhang, Lee, and Kondo are analogous art because they are directed to semiconductor devices having metal gates and one of ordinary skill in the art would have had a reasonable expectation of success to modify Zhang because they are from the same field of endeavor.
Therefore, it would have been obvious to one having ordinary skill of the art before the effective filing date of the claimed invention to modify the device and incorporate the teachings of Kondo to improve device performance ¶0017.
Regarding claim 5, Zhang, Lee, and Kondo teach the limitations of claim 3. However, Kondo discloses wherein a channel of one of the plurality of buried gates overlaps the second interface Fig 1 and Fig 3. Zhang, Lee, and Kondo are analogous art because they are directed to semiconductor devices having metal gates and one of ordinary skill in the art would have had a reasonable expectation of success to modify Zhang because they are from the same field of endeavor.
Therefore, it would have been obvious to one having ordinary skill of the art before the effective filing date of the claimed invention to modify the device and incorporate the teachings of Kondo to improve device performance ¶0017.
Regarding claim 6, Zhang, Lee, and Kondo teach the limitations of claim 3. However, Kondo discloses wherein a channel of one of the plurality of buried gates is disposed above the second interface Fig 1 and Fig 3. Zhang, Lee, and Kondo are analogous art because they are directed to semiconductor devices having metal gates and one of ordinary skill in the art would have had a reasonable expectation of success to modify Zhang because they are from the same field of endeavor.
Therefore, it would have been obvious to one having ordinary skill of the art before the effective filing date of the claimed invention to modify the device and incorporate the teachings of Kondo to improve device performance ¶0017.
Regarding claim 7, Zhang, Lee, and Kondo teach the limitations of claim 3. However, Kondo discloses wherein a channel of one of the plurality of buried gates is disposed between the first interface and the second interface Fig 1 and Fig 3. Zhang, Lee, and Kondo are analogous art because they are directed to semiconductor devices having metal gates and one of ordinary skill in the art would have had a reasonable expectation of success to modify Zhang because they are from the same field of endeavor. Therefore, it would have been obvious to one having ordinary skill of the art before the effective filing date of the claimed invention to modify the device and incorporate the teachings of Kondo to improve device performance ¶0017.
Regarding claim 8, Zhang, Lee, and Kondo teach the limitations of claim 3. However, Kondo discloses: at least one gate line disposed on the substrate between adjacent two of the plurality of buried gates; and a plurality of plugs disposed on the plurality of active areas and alternately arranged with the at least one gate line, wherein each of the plurality of plugs sequentially overlaps a corresponding one of the plurality of active areas and the shallow trench isolation in a direction normal to the substrate Fig 1 and Fig 3. Zhang, Lee, and Kondo are analogous art because they are directed to semiconductor devices having metal gates and one of ordinary skill in the art would have had a reasonable expectation of success to modify Zhang because they are from the same field of endeavor. Therefore, it would have been obvious to one having ordinary skill of the art before the effective filing date of the claimed invention to modify the device and incorporate the teachings of Kondo to improve device performance ¶0017.
Allowable Subject Matter
Claim 4 is objected to as being dependent upon a rejected base claim but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
After further search and consideration, it is determined that the prior art of record neither anticipates nor renders obvious the claimed subject matter of the instant application as a whole either taken alone or in combination, in particular, prior art of record does not teach or suggest “wherein a lattice constant of the first semiconductor sub-layer is smaller than that of the second semiconductor sub-layer, and a concentration of the heteroatoms in the first semiconductor sub-layer is greater than a concentration of the heteroatoms in the second semiconductor sub-layer”, as recited in claim 4.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
Zhang et al (US Publication no. 2022/0319908).
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/CHRISTINE A ENAD/Primary Examiner, Art Unit 2811