DETAILED ACTION
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
The Applicant's amendment filed on April 8, 2026 was received. Claims 1 and 11-12 were amended. No claim was canceled. No claim was added.
The text of those sections of Title 35. U.S.C. code not included in this action can be found in the prior Office Action Issued January 8, 2026.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The claim rejections under 35 U.S.C. 103 as being unpatentable over Utsuno (US20210151348) in view of Blanquart (US20200013612) on claims 1-12 are withdrawn, as the claims have been amended.
Claims 1-2 and 8-12 are rejected under 35 U.S.C. 103 as being unpatentable over Lu (US20050153519).
Regarding claim 1, Lu teaches a method of forming dielectric layer that fills the trenches with different pattern density on the surface of a substrate (paragraphs 0001 and 0010), wherein the substrate comprises a lower density pattern region first recesses, such as 5, 6 and 8 (one of the first recesses) is formed at relatively low density pattern region (paragraph 0029, figure 1) and a high-density pattern region where second recesses, such as wide opening 7, are formed at relatively high density (paragraph 0029, figure 1). Lu teaches to supply a first dielectric layer 48 to a thickness that is bigger than the thickness h (the depth of the recesses) (paragraphs 0050, 0053-0054, figure 8), wherein the dielectric layer is silicon oxide formed by high density plasma chemical vapor deposition (HDP CVD) which involves supplying a silicon containing gas (material precursor) and He gas (carrier gas) to the surface of the substrate and apply a RF power (RF is high frequency) to the gas to form plasma (paragraph 0053) (a first layer is formed in the first recesses of the low density patter region so as to be higher than the top of the first recesses and a second layer is formed in the second recesses of the high-density pattern region so as to be higher than the top of the second recesses). Lu teaches to etch the dielectric layer 48 by supplying an etching gas and an inert gas (carrier gas) to the first and second layers and apply a high-frequency voltage to the gases to form plasma, wherein the first layer is etched so as to be higher than the top of the first recesses (figure 9, paragraphs 0056- 0058). Lu teaches to performed a apply an addition thickness (third layer and fourth layer) of the dielectric material on the etched dielectric layer (first and second layer), wherein the dielectric layer is silicon oxide formed by high density plasma chemical vapor deposition (HDP CVD) which involves supplying a silicon containing gas (material precursor) and He gas (carrier gas) to the surface of the substrate and apply a RF power (RF is high frequency) to the gas to form plasma (paragraphs 0059 and 0061 and figure 10) and the thickness of the addition layer is above all the recesses (figure 10, paragraph 0062) (a third layer is formed on the first layer formed on the low-density pattern region and a fourth layer is formed in the second recesses of the high density pattern region so as to be higher than the top of the second recesses). While Lu does not explicitly teach the heights of the first layer and second layer after etching steps and the or the difference of the height of the top of the first layer and a top of the second layer, Lu teaches the widths of the recesses governs the thickness of the layers, specifically, when the widths of the first recesses become closer to widths of the second recesses, the thickness difference between the first and second layers become smaller (paragraph 0035), and the plasma etching attack the higher portions of the dielectric layer over the first recess (first layer) at a faster rate than over the second recess (second layer) (paragraph 0056) to reduce the thickness variation between the final dielectric layer (thickness of first layer plus third layer vs thickness of second layer plus fourth layer) (paragraph 0060, 0016 and 0035). Therefore, it would have been within the skill of the ordinary artisan to adjust and optimize the height of the first layer after etching and the height of the second layer after etching and the difference of a height of the top of the first layer and a top of the second layer in the process based of the relative widths of the first recesses and second recesses to yield the desired effect of the reduction of difference in thickness in the final layer. Discovery of optimum value of result effective variable in known process is ordinarily within skill of art. In re Boesch, CCPA 1980, 617 F. 2d 272, 205 USPQ215. It is noted that Applicant has not established the criticality of the claimed range.
Regarding claim 2, Lu teaches the widths of the recesses governs the thickness of the layers, specifically, when the widths of the first recesses become closer to widths of the second recesses, the thickness difference between the first and second layers become smaller (paragraph 0035), and the plasma etching attack the higher portions of the dielectric layer over the first recess (first layer) at a faster rate than over the second recess (second layer) (paragraph 0056) to reduce the thickness variation between the final dielectric layer (thickness of first layer plus third layer vs thickness of second layer plus fourth layer) (paragraph 0060, 0016 and 0035), and the etch back has does not uncover the USG layer 47 which is part of the substrate features (figure 9, paragraph. 0056). Therefore, it would have been within the skill of the ordinary artisan to adjust and optimize the height of the second layer after etching in relation to the depth of the recesses the process to yield the desired effect of the reduction of difference in thickness in the final layer without uncover the substrate features after the etching. Discovery of optimum value of result effective variable in known process is ordinarily within skill of art. In re Boesch, CCPA 1980, 617 F. 2d 272, 205 USPQ215. It is noted that Applicant has not established the criticality of the claimed range.
Regarding claim 8, Lu teaches the widths of the recess is about 0.1 to 10 microns and depth is about 0.3 to 0.4 microns (paragraph 0003), which overlaps with the claimed ranges.
Regarding claim 9, Lu teaches the frequency of the high-frequency voltage is RF (paragraphs 0053 and 0056), which overlaps with the claimed range. In the case where the claimed ranges “overlap or lie inside ranges disclosed by the prior art" a prima facie case of obviousness exist. In re Wertheim, 541 F.2d 257, 191USPQ 90 (CCPA 1976); In re Woodruff, 919 F.2d 1575, 16 USPQ2d 1934 (Fed. Cir. 1990); In re Geisler,116 F.3d 1465, 1469-71, 43 USPQ2d 1362, 1365-66 (Fed. Cir. 1997). See MPEP 2144.05.
Regarding claim 10, Lu teaches the layer is silicon oxide (paragraphs 0053 and 0061).
Regarding claim 11, Lu teaches the widths m1, m2, m3 (the substrate features), x, y (widths of first recesses) are equivalent (paragraph 0051, figure 8), which indicate the area ratio of the first recesses of the low-density pattern region is around 50%.
Regarding claim 12, Lu further teaches the z is more than 10 times the size of other widths m2 and m3 (paragraph 0051, figure 8), which indicate the area ratio of the second recesses of the high-density pattern region exceeds 70%.
Claims 3-7 are rejected under 35 U.S.C. 103 as being unpatentable over Lu (US20050153519) as applied to claims 1-2 and 8-12 above, and further in view of Utsuno (US20210151348).
Regarding claim 3, Lu teaches all the limitations of this claim, except the etching gas. However, Utsuno teaches a method for filling a recess on a surface of a substate for a semiconductor device (abstract, paragraphs 0003 and 0008) with a plasma CVD method (pargraph 0027), wherein a material precursor gas and a carrier gas are suppled to recess on the substate, a high frequency voltage is applied to the gases to form plasma, a first layer is formed in the first recesses to be higher than the top of the recesses (paragraph 0038-0041, 0055, 0066, see figure 3d). Utsuno teaches to etch the first layer such that a surface until a surface of the second carbon layer within the recess is below the top surface or not below the top surface (paragraphs 0056 and 0058). Utsuno teaches a second step to supply a material precursor and a carrier gas to the surface of the substate to be processed on the side where the recesses are provided, and apply a high frequency voltage to the gases to form plasma, a third layer is formed on the layer formed on the pattern region so as to be higher than the top of the second recess (paragraph 0038-0041, 0059, 0066, see figure 3f). Thus, Lu and Utsuno teaches a similar gap filling method for semiconductor by plasma CVD. Utsuno further teaches dielectric material and carbon are functionally equivalent material to be formed in the trenches of the semiconductor (paragraph 0003). Therefore, it would have been obvious to one of ordinary skill in the art to substitute carbon for dielectric material as gap filling material in plasma CVD method of making a semiconductor device as disclosed by Lu. It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to use the claimed etching gas such as oxygen or hydrogen as suggested by Utsuno in the method of Lu because Utsuno teaches oxygen or hydrogen are used as etching gas for carbon material (paragraph 0052, 0058).
Regarding claim 4, Utsuno teaches the layer is carbon layer (paragraph 0008), and the precursor gas is CxHyNz, wherein x is 2 or more, y is natural number, including 2 or more, and z is zero), which is the same structure as the claimed structure (I) (paragraph 0040).
Regarding claim 5, Utsuno teaches the first step and second step are performed while heating the substrate at a temperature of about 20ºC to about 100ºC (paragraphs 0036, 0055, 0057, 0059), which overlaps with the claimed range. In the case where the claimed ranges “overlap or lie inside ranges disclosed by the prior art" a prima facie case of obviousness exist. In re Wertheim, 541 F.2d 257, 191USPQ 90 (CCPA 1976); In re Woodruff, 919 F.2d 1575, 16 USPQ2d 1934 (Fed. Cir. 1990); In re Geisler,116 F.3d 1465, 1469-71, 43 USPQ2d 1362, 1365-66 (Fed. Cir. 1997). See MPEP 2144.05.
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention heat the substrate to the claimed process temperatures as suggested by Utsuno in the method of Lu because Utsuno teaches such temperature ranges are suitable for depositing carbon by plasma CVD.
Regarding claim 6, Utsuno teaches the etching step is preformed while heating the substrate to be processed at a temperature of about 20ºC to about 100ºC (paragraphs 0054, 0057), which overlaps with the claimed range. In the case where the claimed ranges “overlap or lie inside ranges disclosed by the prior art" a prima facie case of obviousness exist. In re Wertheim, 541 F.2d 257, 191USPQ 90 (CCPA 1976); In re Woodruff, 919 F.2d 1575, 16 USPQ2d 1934 (Fed. Cir. 1990); In re Geisler,116 F.3d 1465, 1469-71, 43 USPQ2d 1362, 1365-66 (Fed. Cir. 1997). See MPEP 2144.05. It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to heat the substrate to the claimed process temperatures as suggested by Utsuno in the method of Lu because Utsuno teaches such temperature is suitable for etching carbon material.
Regarding claim 7, Utsuno teaches the first step and second step are performed under a pressure of 200 to 1250 pa (paragraphs 0057 and 0059), which overlaps with the claimed range. In the case where the claimed ranges “overlap or lie inside ranges disclosed by the prior art" a prima facie case of obviousness exist. In re Wertheim, 541 F.2d 257, 191USPQ 90 (CCPA 1976); In re Woodruff, 919 F.2d 1575, 16 USPQ2d 1934 (Fed. Cir. 1990); In re Geisler,116 F.3d 1465, 1469-71, 43 USPQ2d 1362, 1365-66 (Fed. Cir. 1997). See MPEP 2144.05. It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to perform the first step and second step under the claimed pressure range as suggested by Utsuno in the method of Lu because Utsuno teaches such pressure range is suitable for forming carbon layer by plasma CVD.
Response to Arguments
Applicant’s arguments with respect to claims 1-12 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
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/N.V.L/Examiner, Art Unit 1717
/Dah-Wei D. Yuan/Supervisory Patent Examiner, Art Unit 1717
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