DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Status of Claims
Applicant’s amendment of claims 1, 8, 10, 12-13 and 17, and cancellation of claim 7, and submission of new claim 21 in “Claims - 01/22/2026” is acknowledged.
This office action claims 1-6 and 8-21 were presented for further prosecution.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Notes: when present, semicolon separated fields within the parenthesis (; ;) represent, for example, as (1C; Fig 11; [0093]) = (element 1C; Figure No. 11; Paragraph No. [0093]). For brevity, the texts “Element”, “Figure No.” and “Paragraph No.” shall be excluded, though; additional clarification notes may be added within each field. The number of fields may be fewer or more than three indicated above. These conventions are used throughout this document.
Claims 1-6, 9, 12-16 are rejected under 35 U.S.C. 103 as being unpatentable over HIRAO; Naoki et al., (US 20240355965 A1) hereinafter Hirao; in view of LAI; Yu-Hung et al. (US 20220173273 A1) hereinafter Lai; in further view of KIM; Sungkyoon et al. (US 20110233589 A1) hereinafter Kim.
1. Hirao teaches a semiconductor light emitting device (1C; Fig 11; [0060,0093]) for display pixels (P of 100; Fig 26; [0114]) comprising (see the entire document, Fig 11, along with, any features related to the implementations as described in Figs 1-10 and 12- 31, specifically, as cited below):
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Hirao Figure 11
a light emitting structure ({13,12,11} of 1C) including a first conductivity type semiconductor layer (13; [0147]; p-type, first cited [0065]), a second conductivity type semiconductor layer (11; n-type, first cited [0061]), and an active layer (12) disposed therebetween;
a second electrode layer (14) disposed under the light emitting structure ({13,12,11} of 1C),
wherein the light emitting structure ({13,12,11} of 1C) comprises a rounded semiconductor layer (13L; [0156]) in which an upper surface (13S2) thereof is partially rounded (at 13L).
But, Hirao does not expressly disclose, a passivation layer disposed on the light emitting structure ({13,12,11} of 1C); and
However, in the analogous art, Lai discloses a micro light-emitting diode structure ([0002]), wherein (figs 4-5.6A) an insulating material 60 is formed on a portion of top surface and side surface of the first-type semiconductor layer 21, the side surfaces of the light-emitting layer 31 and the second-type semiconductor layer 41; as further detailed in (Fig 5; [0044]) a portion of the insulating material 60 is removed and forms an insulating layer 61; that is, , the insulating layer 61 coverers the side surface of the light-emitting layer 31, the side surface of the second-type semiconductor layer 41, and the side surface 21S2 of the first-type semiconductor layer 21, but not cover the portion of top surface 21T;. and in Fig 6a structure disloses a passivation underlying electrode (72).
Therefore, it would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to incorporate insulation layer 61 of Lai into Hirao’s as passivation layer underlying electrode 15 and thereby, the combination of (Hirao and Lai) have passivation layer as claimed; since. this inclusion, at least will effectively avoid the possibility of side leakage current prone to occur like traditional micro light-emitting diodes (Lai [0056]).
But, the combination of (Hirao and Lai) yet to disclose, wherein the second electrode layer (14)comprises a light-transmitting electrode layer disposed on a bottom surface of the light emitting structure ({13,12,11} of 1C).
However, in the analogous art, as reference in claim 1 rejection above,, Kim discloses a light-emitting device ([0003]), wherein (fig 4, [0098-0101]) the top and bottom of the light-emitting device 400 are reversed compared to structure disclosed in (Fig 1a; ([0049]). wherein the light-emitting structure 415 on the substrate 410 and including a top (first) semiconductor layer 420, an active layer 430 and a bottom (second) semiconductor layer 440; a light-transmitting electrode layer 450; and a first reflective layer 460; a bottom (second) electrode pad 442 is on the bottom (second) semiconductor layer 450.
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Kim Figure 4
Therefore, it would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to incorporate Kim’s light-transmitting electrode layer (450) into Hirao’s device, and thereby, the combination of (Hirao, Lai and Kim) includes the bottom electrode layer (14) comprises a light-transmitting electrode layer (Kim 450) disposed on the light emitting structure ({13,12,11} of 1C) and a first reflective layer (Kim 460) on the light-transmitting electrode layer (Kim 450); since. this inclusion, at least will effectively increase the light transmitting efficiency.
2. The semiconductor light emitting device for display pixels according to claim 1, the combination of (Hirao, Lai and Kim) further teaches, wherein the light emitting structure ({13,12,11} of 1C) comprises the rounded semiconductor layer (13L; Fig 11) on a side surface of a portion of an upper portion of the first conductivity type semiconductor layer (13).
3. The semiconductor light emitting device for display pixels according to claim 1, the combination of (Hirao, Lai and Kim) further teaches, wherein the light emitting structure ({13,12,11} of 1C) comprises the rounded semiconductor layer (13L Fig 11) on a portion of a side surface and an upper surface of the first conductivity type semiconductor layer (13).
4. The semiconductor light emitting device for display pixels according to claim 1, the combination of (Hirao, Lai and Kim) further teaches, wherein the light emitting structure ({13,12,11} of 1C) further comprises a protruding semiconductor layer (13L at 132S and at 15; Fig 11) that extends further in a horizontal direction on both sides of the rounded semiconductor layer (13L) than side surfaces of the round semiconductor layer (13).
5. The semiconductor light emitting device for display pixels according to claim 4, the combination of (Hirao, Lai and Kim) further teaches, wherein the protruding semiconductor layer (underlying 132S) comprises the first conductive type semiconductor layer (13L), the active layer (12), and the second conductive type semiconductor layer (11).
6. The semiconductor light emitting device for display pixels according to claim 5, the combination of (Hirao, Lai and Kim) further teaches, wherein the horizontal width of the active layer (12) is formed to correspond (depicted in Fig 11) to a maximum horizontal width of the light emitting structure ({13,12,11} of 1C); Fig 11).
9. The semiconductor light emitting device for display pixels according to claim 4, the combination of (Hirao, Lai and Kim) further teaches, wherein a horizontal width of the protruding semiconductor layer (13) is equal (Fig 11) to a horizontal width of the second electrode layer (14).
12. The semiconductor light emitting device for display pixels according to claim 1, the combination of (Hirao, Lai and Kim) further teaches, wherein a width of the light emitting structure according to a height changes nonlinearly.
13. The semiconductor light emitting device for display pixels according to claim 4, the combination of (Hirao, Lai and Kim) further teaches, wherein the passivation layer (Lai 61) extends from a side surface of the first conductive type semiconductor layer (13L) to a portion of an upper surface of the protruding semiconductor layer (13).
14. The semiconductor light emitting device for display pixels according to claim 2, the combination of (Hirao, Lai and Kim) further teaches, wherein the passivation layer (Lai 60/61 Fig 4/5) is rounded along a side surface of the first conductivity type semiconductor layer (13L).
15. The semiconductor light emitting device for display pixels according to claim 14, the combination of (Hirao, Lai and Kim) further teaches, wherein a portion of an upper surface of the first conductivity type semiconductor layer (13L) is exposed by the passivation layer (Lai 61 Fig 5) .
16. The semiconductor light emitting device for display pixels according to claim 15, the combination of (Hirao, Lai and Kim) further teaches, wherein an upper surface of the passivation layer (Lai 61 Fig 5) and an exposed upper surface (13L) of the first conductivity type semiconductor layer are positioned at a same height (Fig 11 and (Lai 61 Fig 5).
Claims 8 rejected under 35 U.S.C. 103 as being unpatentable over HIRAO; Naoki et al., (US 20240355965 A1) hereinafter Hirao; in view of LAI; Yu-Hung et al. (US 20220173273 A1) hereinafter Lai; and KIM713; Sungkyoon et al. (US 20110233589 A1) hereinafter Kim; in further view of Wang L (CN 101737691 A) hereinafter Wang;
8. The semiconductor light emitting device for display pixels according to claim 1, while the combination of (Hirao, Lai and kim) further teaches, wherein the second electrode layer (14) comprises a reflective layer (Kim 460) disposed on the light-transmitting electrode layer ((Kim 450), but does not expressly disclose , a magnetic layer disposed on the reflective layer (Kim 460), and an adhesive layer disposed on the magnetic layer.
However, in the analogous art, Wang discloses a light-transmitting layer (1) made of transparent and soft material a reflecting layer (3) is made of materials with high reflecting capacity; a magnetic layer (5) is made of magnetic soft organic material and a and an adhesive layer disposed under the magnetic layer and an adhesive layer 6. and surface of a light source (2) i.e. LED, wherein
Therefore, it would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to incorporate Wangs’s magnetic layer and an adhesive layer 6 into into modified Hirao’s device, and thereby, the combination of (Hirao, Lai, Kim and Wang) includes the second electrode layer (14) comprises a light-transmitting electrode layer (Kim 450) disposed on the light emitting structure ({13,12,11} of 1C) and a first reflective layer (Kim 460), on the light-transmitting electrode layer (Kim 450) , a magnetic layer (Wang 5) disposed on the reflective layer (Kim 460), and an adhesive layer (Wang 6) disposed on the magnetic layer (Wang 5); since. this inclusion, at least will effectively make second electrode a self adessive layer and increase the light transmitting efficiency.
Claims 10 is rejected under 35 U.S.C. 103 as being unpatentable over HIRAO; Naoki et al., (US 20240355965 A1) hereinafter Hirao; in view of LAI; Yu-Hung et al. (US 20220173273 A1) hereinafter Lai, and KIM; Sungkyoon et al. (US 20110233589 A1) hereinafter Kim; in further view of Lee; Seonuk et al. (US 20230240098 A1) hereinafter Lee;
10. The semiconductor light emitting device for display pixels according to claim 1, the combination of (Hirao, Lai and kim) does not expressly disclose, wherein a surface of the light-transmitting electrode layer (Kim 450) is hydrophilic.
However, in the analogous art, Lee discloses a display apparatus ([0002]), wherein (fig 1a, [145]) the surface of the light-transmitting electrode layer (565) is hydrophilic.
Therefore, it would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to select’s light-transmitting electrode layer (565) for modified Hirao’s device, and thereby, the combination of (Hirao, Lai, Kim and Lee) have a surface of the light-transmitting electrode layer (Kim 450) is hydrophilic; since. this selection, at least, will make better bonding as hydrophilicity attract each other (Lee [0147]).
Claims 11 is rejected under 35 U.S.C. 103 as being unpatentable over HIRAO; Naoki et al., (US 20240355965 A1) hereinafter Hirao; in view of LAI; Yu-Hung et al. (US 20220173273 A1) hereinafter Lai, KIM; Sungkyoon et al. (US 20110233589 A1) hereinafter Kim, and Lee; Seonuk et al. (US 20230240098 A1) hereinafter Lee; in further view of KIM SANG HYO (KR 101899925 B1) hereinafter KimSang
11. The semiconductor light emitting device for display pixels according to claim 10, the combination of (Hirao, Lai, Kim and Lee) does not expressly disclose, wherein the light-transmitting electrode layer (Kim 450) is treated with 02 plasma or Ar plasma.
However, in the analogous art, KimSang discloses a color conversion sensor array comprises a substrate having light transparency (Abstract), wherein step (a) may further include the step of surface-treating the substrate having the light-transmitting property with an oxygen plasma and surface-modifying the substrate with a hydrophilic substrate.
Therefore, it would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to use KimSang’s surface treatment for modified Hirao light-transmitting electrode layer, and thereby, the combination of (Hirao, Lai, Kim; Lee and KimSang) have the light-transmitting electrode layer (Kim 150) is treated with 02 plasma; since. this treatment, at least, will make the layer hydrophilic (KimSnag) that make better bonding as hydrophilicity attract each other (Lee [0147]).
Claims 17-20 are rejected under 35 U.S.C. 103 as being unpatentable over HIRAO; Naoki et al., (US 20240355965 A1) hereinafter Hirao; in view of TOKUNAGA; Hirofumi et al. US 20230223493 A1) hereinafter Tokunaga ; and in further view of LAI; Yu-Hung et al. (US 20220173273 A1) hereinafter Lai, in further view of KIM; Sungkyoon et al. (US 20110233589 A1) hereinafter Kim.
17. Hirao teaches a display device (100/110 Fig 26-27; [0114-0116]) including a semiconductor light emitting device (1C; Fig 11; [0060,0093]) comprising (see the entire document, Figs 26-27,11, along with, any features related to the implementations as described in Figs 1-10,12-25. 28-31 specifically, as cited below):
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Hirao Figures 26 and 11
a substrate (120);
a plurality of assembled wires (1021, 1022; Fig 27; [0116]) spaced apart (by 1R, 1G,1B) from each other on the substrate (120);
and a semiconductor light emitting device (1C) disposed in the assembly (see below for hole), wherein the semiconductor light emitting device comprises a light emitting structure ({13,12,11} of 1C) including a first conductivity type semiconductor layer (13; [0147]; p-type, first cited [0065]), a second conductivity type semiconductor layer (11; n-type, first cited [0061]), and an active layer (12) disposed therebetween;
a second electrode layer (14) disposed under the light emitting structure ({13,12,11} of 1C),
wherein the light emitting structure ({13,12,11} of 1C) comprises a rounded semiconductor layer (13L; [0156]) in which an upper surface (top of 13S2) thereof is partially rounded (at 13L).
wherein the light emitting structure comprises a rounded semiconductor layer in which an upper surface thereof is partially rounded.
But, Hirao does not expressly disclose,
a barrier wall disposed on the plurality of assembly wires and having an assembly hole (accommodating LED 1R,1G,1B in P display pixel);
a passivation layer disposed on the light emitting structure (1C)
However, in the analogous art, Tokunaga discloses an LED element substrate and an image display device. (0002]) wherein (Figs 3, 4; [0094) a barrier wall (12B, B2) disposed on the plurality of assembly wires and having an assembly hole (13) that accommodates LED 30 with more details in [0126\ as “he LED element substrate including the holes in Example 11, a substrate, in which a substrate in Example 11 including a through hole designed to have a hole configuration shown in the following table was disposed on an LED arrangement surface in the comparative model so that the LED was accommodated in the hole”.
Therefore, it would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to incorporate barrier layer and hole of Tokunaga into Hirao’s display device as a barrier wall disposed on the plurality of assembly wires (2021,2022) and having an assembly hole (13) and thereby, the combination of (Hirao and Tokunaga) have barrier layer and accommodating hole as claimed; since. this inclusion, at least, will provide a high front luminance and a large contrast ratio (Tokunaga [0131]).
But, the combination of (Hirao and Tokunaga) does not expressly disclose, a passivation layer disposed on the light emitting structure ({13,12,11} of 1C);
However, in the analogous art, Lai discloses a micro light-emitting diode structure ([0002]), wherein (figs 4-5.6A; []) an insulating material 60 is formed on a portion of top surface and side surface of the first-type semiconductor layer 21, the side surfaces of the light-emitting layer 31 and the second-type semiconductor layer 41; as further detailed in (Fig 5; [0044]) a portion of the insulating material 60 is removed and forms an insulating layer 61; that is, , the insulating layer 61 coverers the side surface of the light-emitting layer 31, the side surface of the second-type semiconductor layer 41, and the side surface 21S2 of the first-type semiconductor layer 21, but not cover the portion of top surface 21T;. and in Fig 6a structure disloses a passivation underlying electrode (72).
Therefore, it would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to incorporate insulation layer 61 of Lai into modified Hirao’s as passivation layer underlying electrode 15 and thereby, the combination of (Hirao, Tokunaga and Lai) have passivation layer as claimed; since. this inclusion, at least will effectively avoid the possibility of side leakage current prone to occur like traditional micro light-emitting diodes (Lai [0056]).
But, the combination of (Hirao, Tokunaga and Lai) yet to disclose, wherein the second electrode layer (14) comprises a light-transmitting electrode layer disposed on a bottom surface of the light emitting structure ({13,12,11} of 1C).
However, in the analogous art, Kim discloses a light-emitting device ([0003]), wherein (fig 4, [0098-0101]) the top and bottom of the light-emitting device 400 are reversed compared to structure disclosed in (Fig 1a; ([0049]). wherein the light-emitting structure 415 on the substrate 410 and including a top (first) semiconductor layer 420, an active layer 430 and a bottom (second) semiconductor layer 440; a light-transmitting electrode layer 450; and a first reflective layer 460; a bottom (second) electrode pad 442 is on the bottom (second) semiconductor layer 450.
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Kim Figure 4
Therefore, it would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to incorporate Kim’s light-transmitting electrode layer (450) into Hirao’s device, and thereby, the combination of (Hirao, Tokunaga, Lai and Kim) includes the bottom electrode layer (14) comprises a light-transmitting electrode layer (Kim 450) disposed on the light emitting structure ({13,12,11} of 1C) and a first reflective layer (Kim 460) on the light-transmitting electrode layer (Kim 450); since. this inclusion, at least will effectively increase the light transmitting efficiency.
18. The display device including the semiconductor light emitting device according to claim 17, (Hirao, Tokunaga, Lai and Kim) further teaches, wherein the passivation layer (Lai 60/61; Figs 4/5) is rounded along a side surface of the first conductivity type semiconductor layer (13) .
19. The display device including the semiconductor light emitting device according to claim 17, the combination of (Hirao, Tokunaga, Lai and Kim) further teaches, wherein a portion of the upper surface of the first conductivity type semiconductor layer (13L) is exposed by the passivation layer (Lai 61) , and
wherein the display device further comprising a panel wiring ((1021, 1022; Fig 27; [0116] in view of Lai 72) connected to the exposed first conductivity type semiconductor layer (13L in view of Lai 61).
20. The display device including the semiconductor light emitting device according to claim 17, the combination of (Hirao, Tokunaga, Lai and Kim) further teaches, wherein the light emitting structure further comprises a protruding semiconductor layer (13) extending in a horizontal direction on both sides of the round semiconductor layer (13L at 132S and at 15; Fig 11).
Claims 17-20 are rejected under 35 U.S.C. 103 as being unpatentable over HIRAO; Naoki et al., (US 20240355965 A1) hereinafter Hirao; in view of TOKUNAGA; Hirofumi et al. US 20230223493 A1) hereinafter Tokunaga ; and in further view of LAI; Yu-Hung et al. (US 20220173273 A1) hereinafter Lai, in further view of KIM; Sungkyoon et al. (US 20110233589 A1) hereinafter Kim and Wang L (CN 101737691 A) hereinafter Wang;
21.The display device including the semiconductor light emitting device according to claim 17, while the combination of (Hirao, Tokunaga, Lai and Kim) further teaches wherein the second electrode layer comprises a reflective layer (Kim 460) disposed under the light-transmitting electrode layer(Kim 450), but does not disclose a magnetic layer disposed under the reflective layer (Kim 460), and an adhesive layer disposed under the magnetic layer, and wherein the light-transmitting electrode layer is thinner than the adhesive layer..
However, in the analogous art, Wang discloses a light-transmitting layer (1) made of transparent and soft material a reflecting layer (3) is made of materials with high reflecting capacity; a magnetic layer (5) is made of magnetic soft organic material and an adhesive layer disposed under the magnetic layer and an adhesive layer 6. and surface of a light source (2) i.e. LED.
Therefore, it would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to incorporate Wangs’s magnetic layer 5 and adhesive layer 6 into modified Hirao’s device, and thereby, the combination of (Hirao, Tokunaga, Lai, Kim and Wang) includes a magnetic layer (Wang 5) disposed under the reflective layer (Kim 460), and an adhesive layer (Wang 6) disposed under the magnetic layer, and wherein the light-transmitting electrode layer (Kim 450) is thinner than the adhesive layer (Wang 6), since. this inclusion, at least will effectively make second electrode a self adhesive layer and increase the light transmitting efficiency.
Response to Arguments
Applicant's arguments “Remarks - 01/22/2026 - Applicant Arguments/Remarks Made in an Amendment, have been fully considered, but they are not persuasive because of the following:
Applicant’s amendment of claims 1, 8, 10, 12-13 and 17, and cancellation of claim 7, and submission of new claim 21 in “Claims - 01/22/2026 ” changed the scope of the inventions significantly, and necessitated the shift in new grounds of rejection detailed in section I-VI, supra. The shift in grounds of rejection renders Applicant’s arguments moot.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any extension fee pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to MOAZZAM HOSSAIN whose telephone number is (571)270-7960. The examiner can normally be reached on M-F: 8:30AM - 6:00 PM.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Julio J. Maldonado can be reached on 571-272-1864. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/MOAZZAM HOSSAIN/Primary Examiner, Art Unit 2898
March 16, 2026