DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1-3, 6-9 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Wang et al. (US 2021/0098332 A1 hereinafter referred to as “Wang”).
With respect to claim 1, Wang discloses, in Figs.1A-12, an integrated circuit package, comprising: a carrier substrate (600); and an electronic integrated circuit chip (210) having a first face/(upper surface of 210) fastened onto a first face/(lower surface of 600) of the carrier substrate (600) by an adhesive interface (200,400, 500) (see Par.[0024] wherein the integrated circuit 210 may be bonded to the substrate 100 in a flip-chip manner; see Par.[0036] wherein the heat spreader 600 carrier for a package structure 10); wherein said adhesive interface comprises: a crown (220) formed by a first adhesive material that is and fastened on a periphery of the first face/(upper surface of 210) of the electronic chip (210) and defining an internal housing, said crown/(adhesive underlaying 220) having an outer peripheral side surface vertically aligned with an outer peripheral side surface of the electronic integrated circuit chip (210); and a second adhesive material (400) different than the first adhesive material (220) contained within the internal housing (see Par.[0028] wherein the components 220 may be mounted by high temperature (e.g., an oxide-oxide bonding, a metal-metal bonding, or the like) or by an adhesive layer (e.g., a die attach film, a liquid-type film over wire, or the like) on the integrated circuit 210; see Par.[0031]-[0032] wherein the thermal conductive gel 400 has fluidity, and thus the thermal conductive gel 400 may fill up the gaps GP between the components 220).
With respect to claim 2, Wang discloses, in Figs.1A-12, the package, wherein the first adhesive material (200) is an adhesive film, and wherein the second adhesive material (400) is a glue (see Par.[0028] wherein the components 220 may be mounted by high temperature (e.g., an oxide-oxide bonding, a metal-metal bonding, or the like) or by an adhesive layer (e.g., a die attach film, a liquid-type film over wire, or the like) on the integrated circuit 210; see Par.[0031]-[0032] wherein the thermal conductive gel 400 has fluidity, and thus the thermal conductive gel 400 may fill up the gaps GP between the components 220).
With respect to claim 3, Wang discloses, in Figs.1A-12, the package, wherein the first adhesive material (220) is a filling material, and wherein the second adhesive material (400) is a glue (see Par.[0028] wherein the components 220 may be mounted by high temperature (e.g., an oxide-oxide bonding, a metal-metal bonding, or the like) or by an adhesive layer (e.g., a die attach film, a liquid-type film over wire, or the like) on the integrated circuit 210; see Par.[0031]-[0032] wherein the thermal conductive gel 400 has fluidity, and thus the thermal conductive gel 400 may fill up the gaps GP between the components 220).
With respect to claim 6, Wang discloses, in Figs.1A-12, the package, wherein the crown includes at least one lateral opening extending from an inner side surface at the internal housing to the outer peripheral side surface of the crown (see Par.[0028] wherein the components 220 may be mounted by high temperature (e.g., an oxide-oxide bonding, a metal-metal bonding, or the like) or by an adhesive layer (e.g., a die attach film, a liquid-type film over wire, or the like) on the integrated circuit 210; see Par.[0031]-[0032] wherein the thermal conductive gel 400 has fluidity, and thus the thermal conductive gel 400 may fill up the gaps GP between the components 220).
With respect to claim 7, Wang discloses, in Figs.1A-12, a method for manufacturing at least one integrated circuit package, comprising steps performed in the following order: a) fastening a crown (220) formed of a first adhesive material on a periphery of a first face of an electronic integrated circuit chip (210), wherein said crown defines an internal housing (see Step of Fig.1); b) disposing a second adhesive material (400) different than the first material within said internal housing, the crown formed of the first adhesive material and the second adhesive material forming an adhesive interface (see Step of Fig.1B); and c) fastening said first face of the electronic integrated circuit chip (210) onto a first face of a carrier substrate (600) via the adhesive interface (see Step Fig.1D; see Par.[0028] wherein the components 220 may be mounted by high temperature (e.g., an oxide-oxide bonding, a metal-metal bonding, or the like) or by an adhesive layer (e.g., a die attach film, a liquid-type film over wire, or the like) on the integrated circuit 210; see Par.[0031]-[0032] wherein the thermal conductive gel 400 has fluidity, and thus the thermal conductive gel 400 may fill up the gaps GP between the components 220).
With respect to claim 8, Wang discloses, in Figs.1A-12, the method, wherein the first adhesive material is an adhesive film, and wherein the second adhesive material is a glue (see Par.[0028] wherein the components 220 may be mounted by high temperature (e.g., an oxide-oxide bonding, a metal-metal bonding, or the like) or by an adhesive layer (e.g., a die attach film, a liquid-type film over wire, or the like) on the integrated circuit 210; see Par.[0031]-[0032] wherein the thermal conductive gel 400 has fluidity, and thus the thermal conductive gel 400 may fill up the gaps GP between the components 220).
With respect to claim 9, Wang discloses, in Figs.1A-12, the method, wherein the first adhesive material is a filling material, and wherein the second adhesive material is a glue (see Par.[0028] wherein the components 220 may be mounted by high temperature (e.g., an oxide-oxide bonding, a metal-metal bonding, or the like) or by an adhesive layer (e.g., a die attach film, a liquid-type film over wire, or the like) on the integrated circuit 210; see Par.[0031]-[0032] wherein the thermal conductive gel 400 has fluidity, and thus the thermal conductive gel 400 may fill up the gaps GP between the components 220).
Claims 1-3, 6 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Kim et al. (US 2013/0037967 A1 hereinafter referred to as “Kim”).
With respect to claim 1, Kim discloses, in Figs.1-5, an integrated circuit package, comprising: a carrier substrate (110, 130); and an electronic integrated circuit chip (120) having a first face/(lower surface) fastened onto a first face/(upper surface) of the carrier substrate (110, 130) by an adhesive (140) interface (see Par.[0034] wherein a base substrate 110, a mounting member 120, a metal seed layer 130, and an adhesive layer 140); wherein said adhesive interface comprises: a crown (143) formed by a first adhesive material that is and fastened on a periphery of the first face of the electronic chip (120) and defining an internal housing, said crown (120) having an outer peripheral side surface vertically aligned with an outer peripheral side surface of the electronic integrated circuit chip (120); and a second adhesive material (141) different than the first adhesive material (143) contained within the internal housing (see Par.[0040] wherein the ductile adhesive 143 may be made of a material having ductility higher than that of the thermally conductive adhesive 141; since the ductile adhesive 143 is formed at the outer circumference of the thermally conductive adhesive 141, a crack such as exfoliation, or the like, grown in the interior of the adhesive layer 140 or grown from the exterior to the interior between the metal seed layer 130 and the adhesive layer 140 can be prevented from being generated).
With respect to claim 2, Kim discloses, in Figs.1-5, the package, wherein the first adhesive material (143) is an adhesive film, and wherein the second adhesive material (141) is a glue (see Par.[0040] wherein the ductile adhesive 143 may be made of a material having ductility higher than that of the thermally conductive adhesive 141; since the ductile adhesive 143 is formed at the outer circumference of the thermally conductive adhesive 141, a crack such as exfoliation, or the like, grown in the interior of the adhesive layer 140 or grown from the exterior to the interior between the metal seed layer 130 and the adhesive layer 140 can be prevented from being generated).
With respect to claim 3, Kim discloses, in Figs.1-5, the package, wherein the first adhesive material (143) is a filling material, and wherein the second adhesive material (141) is a glue (see Par.[0040] wherein the ductile adhesive 143 may be an adhesive made of silicon or an adhesive made of an epoxy resin).
With respect to claim 6, Kim discloses, in Figs.1-5, the package, wherein the crown includes at least one lateral opening extending from an inner side surface at the internal housing to the outer peripheral side surface of the crown (see Fig.1).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 4-5 are rejected under 35 U.S.C. 103 as being unpatentable over Kim.
With respect to claim 4, Kim discloses, in Figs.1-5, the package, wherein the second adhesive material covers at least between greater portion of a surface of said first face of the electronic integrated circuit chip. However, Kim does not explicitly disclose adhesive material covers at least between 80% and 90% of a surface of said first face of the electronic integrated circuit chip.
Even though Kim does not disclose adhesive material covers at least between 80% and 90% of a surface of said first face of the electronic integrated circuit chip, the said range is predictable by simple engineering optimization motivated by a design choice such as In cases like the present, where patentability is said to be based upon particular chosen dimensions or upon another variable recited within the claims, applicant must show that the chosen dimensions are critical. As such, the claimed dimensions appear to be an obvious matter of engineering design choice and thus, while being a difference, does not serve in any way to patentably distinguish the claimed invention from the applied prior art. In re Woodruff, 919 F.2d 1575, 1578, 16 USPQ2d 1934, 1936 (Fed. Cir. 1990); In re Kuhle, 526 F2d. 553,555,188 USPQ 7, 9 (CCPA 1975).
With respect to claim 5, Kim discloses, in Figs.1-5, the package, wherein the internal housing exposes at least greater portion of a surface of said first face of the electronic integrated circuit chip and the second adhesive substantially covers said surface which is exposed. However, Kim does not
explicitly disclose the internal housing exposes at least between 80% and 90% of a surface of said first face of the electronic integrated circuit chip.
Even though Kim does not disclose adhesive material covers at least between 80% and 90% of a surface of said first face of the electronic integrated circuit chip, the said range is predictable by simple engineering optimization motivated by a design choice such as In cases like the present, where patentability is said to be based upon particular chosen dimensions or upon another variable recited within the claims, applicant must show that the chosen dimensions are critical. As such, the claimed dimensions appear to be an obvious matter of engineering design choice and thus, while being a difference, does not serve in any way to patentably distinguish the claimed invention from the applied prior art. In re Woodruff, 919 F.2d 1575, 1578, 16 USPQ2d 1934, 1936 (Fed. Cir. 1990); In re Kuhle, 526 F2d. 553,555,188 USPQ 7, 9 (CCPA 1975).
Claims 10-11 are rejected under 35 U.S.C. 103 as being unpatentable over Wang.
With respect to claim 10, Wang discloses, in Figs.1-12, the method, wherein the second adhesive material covers at least between greater portion of a surface of said first face of the electronic integrated circuit chip. However, Wang does not explicitly disclose adhesive material covers at least between 80% and 90% of a surface of said first face of the electronic integrated circuit chip.
Even though Wang does not disclose adhesive material covers at least between 80% and 90% of a surface of said first face of the electronic integrated circuit chip, the said range is predictable by simple engineering optimization motivated by a design choice such as In cases like the present, where patentability is said to be based upon particular chosen dimensions or upon another variable recited within the claims, applicant must show that the chosen dimensions are critical. As such, the claimed dimensions appear to be an obvious matter of engineering design choice and thus, while being a difference, does not serve in any way to patentably distinguish the claimed invention from the applied prior art. In re Woodruff, 919 F.2d 1575, 1578, 16 USPQ2d 1934, 1936 (Fed. Cir. 1990); In re Kuhle, 526 F2d. 553,555,188 USPQ 7, 9 (CCPA 1975).
With respect to claim 11, Wang discloses, in Figs.1-12, the method, wherein the internal housing exposes at least greater portion of a surface of said first face of the electronic integrated circuit chip and the second adhesive substantially covers said surface which is exposed. However, Kim does not explicitly disclose the internal housing exposes at least between 80% and 90% of a surface of said first face of the electronic integrated circuit chip.
Even though Wang does not disclose adhesive material covers at least between 80% and 90% of a surface of said first face of the electronic integrated circuit chip, the said range is predictable by simple engineering optimization motivated by a design choice such as In cases like the present, where patentability is said to be based upon particular chosen dimensions or upon another variable recited within the claims, applicant must show that the chosen dimensions are critical. As such, the claimed dimensions appear to be an obvious matter of engineering design choice and thus, while being a difference, does not serve in any way to patentably distinguish the claimed invention from the applied prior art. In re Woodruff, 919 F.2d 1575, 1578, 16 USPQ2d 1934, 1936 (Fed. Cir. 1990); In re Kuhle, 526 F2d. 553,555,188 USPQ 7, 9 (CCPA 1975).
Allowable Subject Matter
Claims 13-18 are allowed.
The following is a statement of reasons for the indication of allowable subject matter:
With respect to claim 13, none of the prior art of record teaches, suggests, or renders obvious, either alone or in combination, a method, comprising: thinning the semiconductor wafer by a first thickness starting from an initial face of the semiconductor wafer so as to obtain a thinned semiconductor wafer having a first face; forming a layer of a first adhesive material on the first face of the thinned semiconductor wafer; locally etching the layer of the first adhesive material so as to form local crowns; disposing a second adhesive material in each internal housing. Claims 14-18 are also allowed because of their dependency to the allowed base claim 14.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Examiner’s Telephone/Fax Contacts
Any inquiry concerning this communication or earlier communications from the examiner should be directed to MOULOUCOULAYE INOUSSA whose telephone number is (571)272-0596. The examiner can normally be reached Monday-Friday (10-18).
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/Mouloucoulaye Inoussa/ Primary Examiner, Art Unit 2818