Prosecution Insights
Last updated: April 19, 2026
Application No. 18/229,700

Three-Dimensional Chip Comprising Heat Transfer Means

Non-Final OA §102§103
Filed
Aug 03, 2023
Examiner
LIU, BENJAMIN T
Art Unit
2893
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Nokia Technologies Oy
OA Round
1 (Non-Final)
74%
Grant Probability
Favorable
1-2
OA Rounds
3y 1m
To Grant
87%
With Interview

Examiner Intelligence

Grants 74% — above average
74%
Career Allow Rate
511 granted / 687 resolved
+6.4% vs TC avg
Moderate +13% lift
Without
With
+12.6%
Interview Lift
resolved cases with interview
Typical timeline
3y 1m
Avg Prosecution
48 currently pending
Career history
735
Total Applications
across all art units

Statute-Specific Performance

§101
0.1%
-39.9% vs TC avg
§103
56.9%
+16.9% vs TC avg
§102
32.8%
-7.2% vs TC avg
§112
9.2%
-30.8% vs TC avg
Black line = Tech Center average estimate • Based on career data from 687 resolved cases

Office Action

§102 §103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Election/Restrictions Claims 11-14 withdrawn from further consideration pursuant to 37 CFR 1.142(b) as being drawn to a nonelected process, there being no allowable generic or linking claim. Election was made without traverse in the reply filed on 1/21/2026. Applicant’s election without traverse of claims 1-10 in the reply filed on 1/21/2026 is acknowledged. Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claims 1-2, 4-8, and 10 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Koontz et al. (US 8,921,992) (“Koontz”). With regard to claim 1, fig. 1C of Koontz discloses a three-dimensional chip, comprising: a plurality of integrated circuit layers (104, 108, 112) wherein the plurality of integrated circuit layers (104, 108, 112) comprises at least one of one or more electronic components (“electronic components”, col. 4 ll. 36-37) or one or more photonic components and are arranged in a stack (“stacked wafer assembly”, col. 4 ll. 12-13); one or more microfluidic channel layers 156 positioned between integrated circuit layers (104, 108, 112) wherein the microfluidic channel layers 156 comprise microfluidic channels (120, 116a, 116b) and the microfluidic channels (120, 116a, 116b) are configured to enable working fluid (“fluid”, col. 5 ll. 39) to flow through the microfluidic channels 120 to provide passive heat transfer for the at least one of one or more electronic components (“electronic components”, col. 4 ll. 36-37) or one or more photonic components in the integrated circuit layers (104, 108, 112); and wherein the microfluidic channels 120 comprise one or more portions 120 that extend along a microfluidic channel layer 156 and one or more portions 116b that extend through a microfluidic channel layer 156. With regard to claim 2, fig. 1C of Koontz discloses that the three-dimensional chip 150 comprises a heat pipe 120 for the passive heat transfer (“No high-power coolant fluid pumps are required”, col. 3 ll. 30). With regard to claim 4, fig. 1C of Koontz discloses that the three-dimensional chip 150 comprises a two-phase (“2-phase”, col. 4 ll. 21) cooling system for the passive heat transfer 120. With regard to claim 5, fig. 1C of Koontz discloses that the microfluidic channel layers 156 comprise one or more vias 140 configured to enable electrical signals to be transferred between integrated circuit layers (104, 108, 112) on either side of the microfluidic channel layer 156. With regard to claim 6, fig. 1C of Koontz discloses that the microfluidic channel layers 156 comprise one or more of the vias 116b configured to enable working fluid to flow between integrated circuit layers (104, 108, 112) on either side of the microfluidic channel layer 156. With regard to claim 7, fig. 1C of Koontz discloses a heat rejection surface (“chiller”, 6 ll. 36). With regard to claim 8, fig. 1C of Koontz discloses that the microfluidic channels 120 are configured to enable heat transfer from the integrated chip layers (104, 108, 112), though through the three-dimensional chip 150 to the heat rejection surface (“chiller”, 6 ll. 36). With regard to claim 10, fig. 1C and 2 of Koontz discloses connectors 224 for connecting the three-dimensional chip 150 to a circuit board 216. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 3 and 9 are rejected under 35 U.S.C. 103 as being unpatentable over Koontz et al. (US 8,921,992) (“Koontz”) in view of Smoot et al. (US 2018/0158756) (“Smoot”). With regard to claim 3, Koontz does not disclose that the three-dimensional chip comprises an oscillating heat pipe for the passive heat transfer. However, fig. 1 of Smoot discloses the three-dimensional chip comprises an oscillating heat pipe 14 for the passive heat transfer. Therefore, it would have been obvious to one of ordinary skill in the art to form the fluid channels of Koontz with the oscillating heat pipe as taught in Smoot in order to acquire and transfer heat from the high heat flux device interfaces and spread it across the larger heat sink interfaces with minimal temperature difference between these locations. See par [0053] of Smoot. With regard to claim 9, Koontz does not disclose that the heat rejection surface is configured to be cooled with an active cooling system. However, fig. 1 of Smoot discloses that the heat rejection surface is configured to be cooled with an active (“pumped coolant (active) cooling of three-dimensional microchips can be use”, par [0045]) cooling system. Therefore, it would have been obvious to one of ordinary skill in the art to form the coolant channels of Koontz wit the pumped coolant as taught in Smoot in order to acquire and transfer heat from the high heat flux device interfaces and spread it across the larger heat sink interfaces with minimal temperature difference between these locations. See par [0053] of Smoot. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to BENJAMIN T LIU whose telephone number is (571)272-6009. The examiner can normally be reached Monday-Friday 11:00am-7:30pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Yara J Green can be reached at 571 270-3035. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /BENJAMIN TZU-HUNG LIU/ Primary Examiner, Art Unit 2893 /YARA B GREEN/ Supervisor Patent Examiner, Art Unit 2893
Read full office action

Prosecution Timeline

Aug 03, 2023
Application Filed
Aug 03, 2023
Response after Non-Final Action
Mar 08, 2026
Non-Final Rejection — §102, §103 (current)

Precedent Cases

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
74%
Grant Probability
87%
With Interview (+12.6%)
3y 1m
Median Time to Grant
Low
PTA Risk
Based on 687 resolved cases by this examiner. Grant probability derived from career allow rate.

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