Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Amendment
The amendment filed 5/27/2026 has been entered. Claims 1-15, 17-20, and 37 remain
pending in the application.
Response to Arguments
Applicant’s arguments with respect to amended Claim 1 have been fully considered and are persuasive. Thus, Examiner is withdrawing the 102a1 rejection of Claim 1, and the rejections of all the claims dependent on Claim 1 (Claims 2-13).
Since Claim 14 has been amended to incorporate the limitations of allowable Claim 16, Claim 14, and the claims dependent on it (15, 17-18) are allowed
Applicant's arguments with respect to Claim 19 have been fully considered but they are not persuasive.
Applicant first argues that it is not clear what constitutes “one end” and what constitutes “an other end” in Examiner’s 103 rejection of Claim 19
Claim 19 recites “…one end of each of the plurality of chip capacitors being joined to the interior contact surface and an other end of each of the plurality of chip capacitors being joined to the power contact”. In providing the broadest reasonable interpretation of this language consistent with the specification, Examiner first turned to the specification. In Fig. 4A, Applicant shows a diagram and labels the very edges of the capacitor as the ends. However, this is not a definition. Had Applicant explicitly defined the ends of a capacitor as the outer edges of the capacitor, then that definition would control. As it stands, Examiner contends that the terminals (metal pads) of a capacitor would fall under capacitor ends as understood by a person of ordinary skill in the art. Also, Fig. 3A of Raorane is intended to illustrate a generic passive component (Para. [0028]), not necessarily a specific capacitor that one might use in a design. Even so, the pads in Raorane (Fig. 3A) are close enough to the physical ends of the capacitor so that, in Examiner’s view, a person of ordinary skill in the art would understand them to be the ends of a capacitor. If Applicant wishes to explicitly define the ends of the capacitor in the specification or to further limit the claims, Applicant can do so.
Second, Applicant argues that even if Fig. 3A of Raorane shows two ends of a capacitor, both the two terminals extending from the bottom end are joined to the alleged interior contact surface, which, according to the Applicant, is precluded by the Claim.
In Examiner’s view, Claim 19 requires one terminal to be connected to the interior contact surface and the other end connected to the power contact. Nowhere does it state that the power contact cannot be on the interior contact surface. As mentioned in the rejection of Claim 1 in the Non-Final, Raorane, in Para. [0027], the conductive pathways attached to either end of the capacitor may allow power, ground, and other electrical signals to reach the capacitor. Thus, it is implied that the capacitor in Fig. 3A may have one terminal attached to a power source and the other terminal attached to ground or a signal. If one of the pads is a power contact and the other pad is ground, for example, and both are on the interior contact surface of the pocket, then, in Examiner’s view, Raorane Fig. 3A reads on these claim limitations.
In view of the above, Examiner is maintaining the 103 rejection of Claim 19, and, by extension, Claim 20. Further, Examiner is rejecting new Claim 37 as obvious over the cited prior art (see Claim Rejections below).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 19-20 and 37 are rejected under 35 U.S.C. 103 as being unpatentable over Raorane in view of Ong.
Regarding Claim 19, Raorane discloses a chip package assembly (Fig. 1, el. 100, Para. [0024]) comprising: a package substrate (Fig. 1, el. 102, Para. [0024]) having at least one power contact electrically connected to a power source (Para. [0029]); at least two chips electrically connected to the package substrate (Para. [0031]); a stiffening element (Fig. 3A, el. 380, Para. [0035]) jointed to the package substrate (Fig. 1, Para. [0035]) and extending at least partially around the at least two chips (Para. [0025]), the stiffening element positioned directly adjacent the at least two chips (Fig. 1), and the stiffening element further including at least one pocket (Fig. 3A, el. 382, Para. [0035]), wherein the pocket includes an interior contact surface (see annotated Fig. 3A below) and interior walls extending around and away from the interior contact surface and terminating in an opening (see annotated Fig. 3A below); and a plurality of chip capacitors disposed within the at least one pocket (Para. [0030]), one end of each of the plurality of chip capacitors being joined to the interior contact surface (Fig. 3A, Para. [0035]) and another end of each of the plurality of chip capacitors being joined to the power contact (Para. [0035]).
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Raorane does not disclose that the stiffening element is electrically connected to a ground source so that the stiffening element is a ground.
Ong disclose an assembly (Fig. 1, el. 100, Para. [0014]) comprising a package substrate (Fig. 1, el. 102, Para. [0015]), an electrically conductive stiffener with a pocket (Fig. 1, el. 116, Para. [0016]), where the stiffener is electrically connected to a ground source so that the stiffening element is ground (Para. [0021]), and a plurality of capacitors disposed within the pocket (Fig. 1, Para. [0015]), where one end of each of the plurality of capacitors is joined to an interior contact surface (Fig. 1, Para. [0021]) and the other end is joined to a power contact (Fig. 1, Para. [0021]).
It would have been obvious to one skilled in the art before the effective filing date of the claimed invention to have the stiffener of Raorane connected directly to ground, with one end of the capacitors connected directly to the interior contact surface, and the other connected to a power source, as disclosed by Ong. As disclosed by Ong, this has the benefit of providing additional electrical shielding in a multi-device package (Para. [0021]).
Regarding Claim 20, Raorane in view of Ong discloses the assembly of claim 19, wherein the stiffening element is a monolithic structure (Raorane, Para. [0025] – “In some embodiments, for example, the stiffener 180 may take the shape of a frame or outer ring along the permiter of the package substrate 102 and …..may be….rectangular”).
Regarding Claim 37, Raorane in view of Ong discloses the chip package assembly of Claim 19, further comprising a dielectric material between the one end of each of the plurality of chip capacitors and the other end of the each of the plurality of chip capacitors (Para. [0028] of Raorane discloses that the passive component may be a silicon capacitor, which has dielectric material between the two terminals).
Allowable Subject Matter
Claims 1-15 and 17-18 are allowed.
The following is a statement of reasons for the indication of allowable subject matter:
Regarding Claim 1, none of the prior art of record teaches, suggests or renders
obvious, either alone or in combination a plurality of first pads disposed at a top surface of the capacitor carrier, the plurality of first pads comprising: a plurality of first ground contacts; a plurality of first power contacts; and a plurality of second pads disposed at a bottom surface of the capacitor carrier, the plurality of second pads comprising at least one second ground contact and at least one second power contact, each of the plurality of first ground contacts and the at least one second ground contact electrically connected to a ground source and each of the plurality of first power contacts and the at least one power contact electrically connected to a power source.
Claims 2-13 are allowed because they depend on Claim 1.
Regarding Claim 14, none of the prior art of record teaches, suggests or renders
obvious, either alone or in combination wherein the CCR comprises a PCB and another PCB joined to the CCR and overlying the plurality of arrays of capacitors.
Claims 15 and 17-18 are allowed because they depend on Claim 14.
Conclusion
THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to ROHIT PARTHASARATHY whose telephone number is (571)272-2572. The examiner can normally be reached Monday-Friday 8:30a-5p.
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/ROHIT PARTHASARATHY/Examiner, Art Unit 2899 /DALE E PAGE/Supervisory Patent Examiner, Art Unit 2899
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