Prosecution Insights
Last updated: October 04, 2026
Application No. 18/230,756

SEMICONDUCTOR DEVICE AND METHOD OF MAKING

Non-Final OA §102§103
Filed
Aug 07, 2023
Priority
Apr 13, 2023 — provisional 63/459,098
Examiner
BOATMAN, CASEY PAUL
Art Unit
2893
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Taiwan Semiconductor Manufacturing Company, Ltd.
OA Round
3 (Non-Final)
84%
Grant Probability
Favorable
3-4
OA Rounds
5m
Est. Remaining
94%
With Interview

Examiner Intelligence

Grants 84% — above average
84%
Career Allowance Rate
68 granted / 81 resolved
+16.0% vs TC avg
Moderate +10% lift
Without
With
+10.4%
Interview Lift
resolved cases with interview
Typical timeline
3y 7m
Avg Prosecution
18 currently pending
Career history
99
Total Applications
across all art units

Statute-Specific Performance

§103
51.5%
+11.5% vs TC avg
§102
28.1%
-11.9% vs TC avg
§112
20.0%
-20.0% vs TC avg
Black line = Tech Center average estimate • Based on career data from 81 resolved cases

Office Action

§102 §103
Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Continued Examination Under 37 CFR 1.114 A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on July 21, 2026 has been entered. Response to Amendment Amendment to claims 1, 8-11 and 13 submitted on July 7, 2026 are acknowledged and have since been entered. Claim Interpretation Claims 1 and 13 recite the limitation "a polarity of a slope of the change is continuous" which is interpreted to mean that the concentration is either increasing or decreasing from the first interface to the second interface as described in [0045-0047] of the instant application. This is further illustrated in the examples of embodiments 1-3 shown in the drawings submitted April 13,2023 of the corresponding U.S. provisional application 63/459,098. Claim Rejections - 35 USC § 102 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention. Claim(s) 8-16 and 18-20 are rejected under 35 U.S.C. 102(a)(2) as being anticipated by Shimizu (US 20240072191 A1). Regarding Claim 8, Shimizu teaches a method of forming a semiconductor device (101, shown Fig. 1), comprising: forming a first epitaxial layer (14) over a substrate (21); forming a second epitaxial layer (15) over the first epitaxial layer; and forming a photodiode (10) in at least one of the first epitaxial layer or the second epitaxial layer (shown Fig. 1) wherein: the photodiode comprises a first doped region (13) having a first conductivity type (n-type); and the first doped region comprises a first sub-region (interpreted as a region between the middle of region 13 and upper surface 13u) having a first concentration of dopants (shown Fig. 2) and a second sub-region (interpreted as a region between a lower surface 13d and the middle of region 13) having a second concentration of dopants different than the first concentration of dopants (shown Fig. 2) interfacing with the first sub-region (see also [0105] which describes region 13 being formed by doping during epitaxial growth, wherein an interface may be defined between any two epitaxial layers), at least some of the first sub-region is in the second epitaxial layer (shown Fig. 1), and at least some of the second sub-region is in the first epitaxial layer (shown Fig. 1). Regarding Claim 9, Shimizu teaches the method of claim 8, wherein: the substrate comprises first dopants (see [0059]) having a second conductivity type (p-type) different than the first conductivity type (shown Fig. 1). Regarding Claim 10, Shimizu teaches the method of claim 9, wherein: forming the first epitaxial layer comprises forming the first epitaxial layer to comprise second dopants having the second conductivity type (shown Fig. 1). Regarding Claim 11, Shimizu teaches the method of claim 10, wherein: forming the second epitaxial layer comprises forming the second epitaxial layer to comprise third dopants having the second conductivity type (shown Fig. 1). Regarding Claim 12, Shimizu teaches the method of claim 8, wherein forming the first epitaxial layer comprises: forming the first epitaxial layer to have a first thickness that is less than a second thickness of the second epitaxial layer (shown Fig. 1). Regarding Claim 13, Shimizu teaches a semiconductor device (104, shown Fig. 7), comprising: a substrate (21); a first epitaxial layer (14) over the substrate; a second epitaxial layer (15) over the first epitaxial layer; and a photodiode (10) in at least one of the first epitaxial layer or the second epitaxial layer (shown Fig. 7), wherein the photodiode comprises: a first doped region (13); and a second doped region (12) over the first doped region (shown Fig. 7), wherein a dopant concentration of dopants within the first doped region changes from a first interface where an uppermost surface (13u, shown Fig. 8) of the first doped region interfaces with bottommost surface of the second doped region to a second interface where a bottommost surface (13d) of the first doped region interfaces with a layer underlying the first doped region and a polarity of a slope of the change is continuous (shown Fig. 8, wherein a polarity of a slope of the change between surfaces 13u and 13d is continuously negative). Regarding Claim 14, Shimizu teaches the semiconductor device of claim 13, wherein: a first thickness of the first epitaxial layer is less than a second thickness of the second epitaxial layer (shown Fig. 7). Regarding Claim 15, Shimizu teaches the semiconductor device of claim 13, wherein: a first concentration (p) of first dopants in the first epitaxial layer is greater than a second concentration (p-) of second dopants in the second epitaxial layer (shown Fig. 7). Regarding Claim 16, Shimizu teaches the semiconductor device of claim 13, wherein the photodiode comprises: a p-n junction between the first doped region and the second doped region (shown Fig. 7). Regarding Claim 18, Shimizu teaches the semiconductor device of claim 13, comprising: a p-n junction between the first doped region and a portion, of at least one of the first epitaxial layer or the second epitaxial layer (shown Fig. 7), underlying the first doped region. Regarding Claim 19, Shimizu teaches the semiconductor device of claim 13, wherein: the substrate comprises p-type dopants (see [0059] and Fig. 7); the first epitaxial layer comprises p-type dopants (shown Fig. 7); the second epitaxial layer comprises p-type dopants (shown Fig. 7); the dopants of the first doped region are n-type dopants (shown Fig. 7); and the second doped region comprises p-type dopants (shown Fig. 7). Regarding Claim 20, Shimizu teaches the semiconductor device of claim 19, wherein: a first concentration (p) of the p-type dopants in the first epitaxial layer is greater than a second concentration (p-) of the p-type dopants in the second epitaxial layer. Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows: 1. Determining the scope and contents of the prior art. 2. Ascertaining the differences between the prior art and the claims at issue. 3. Resolving the level of ordinary skill in the pertinent art. 4. Considering objective evidence present in the application indicating obviousness or nonobviousness. Claim 17 is rejected under 35 U.S.C. 103 as being unpatentable over Shimizu (US 20240072191 A1) in further view of Tkachuk (US 20130037854 A1). Regarding Claim 17, Shimizu teaches the semiconductor device of claim 13, wherein the photodiode comprises a p-n junction formed between the first doped region and the second doped region. Shimizu does not explicitly teach an intrinsic region between the first doped region and the second doped region. However, implementing an intrinsic region between the first doped region (n-type) and second doped region (p-type) resulting in a p-i-n structure in photodetection devices is known in the art to reduce dark current and improve signal-to-noise ratio compared to p-n structures (see also Tkachuk: [0053]). Thus, it would be obvious to one of ordinary skill in the art prior to the effective filing date of the instant application to modify the p-n heterostructures of the photodiode of Shimizu to further comprise an intrinsic region between the first doped region and the second doped region as suggested by Tkachuk as this would reduce dark current and improve signal-to-noise ratio (see Tkachuk: [0053]). Allowable Subject Matter Claims 1-7 are allowed. The following is an examiner’s statement of reasons for allowance: Regarding Claim 1, Shimizu teaches a semiconductor device (104, shown Fig. 7) comprising: a substrate (21) comprising first dopants (p-type dopants) having a first conductivity type (p-type); a first epitaxial layer (14) over the substrate and comprising second dopants (p-type dopants) having the first conductivity type; a second epitaxial layer (15) over the first epitaxial layer and comprising third dopants (p-type dopants) having the first conductivity type; and a photodiode (10, see [0035]) in at least one of the first epitaxial layer or the second epitaxial layer (shown Fig. 7), wherein the photodiode comprises: a first doped region (13) having a second conductivity type (n-type) different than the first conductivity type; and a second doped region (12), over the first doped region, having the first conductivity type (shown Fig. 7), wherein a dopant concentration of dopants within the second doped region changes from a first interface wherein an uppermost surface (12u, shown Fig. 8) of the second doped region interfaces with a layer overlying the second doped region to a second interface where a bottommost surface (12d, shown Fig. 8) of the second doped region interfaces with an uppermost surface of the first doped region and a polarity of a slope changes from positive to negative at a peak concentration C12 as shown in Fig. 8. It would not be obvious to one of ordinary skill in the art to modify the peak concentration C12 shown in Fig. 8 of Shimizu to be below a concentration Cy to provide a continuous negative slope as this may disrupt the design goal of providing a distinct maximum concentration greater than a peak concentration C13 in region 13 (see also [0068]). Shimizu further teaches separate embodiments (shown Figs. 1-2 and 3-4) wherein a second doped region may be interpreted as portion 15a as a p-type region over the first doped region 13. However, the dopant concentration of 15a in the embodiment of Figs. 1-2 does not change between a first interface at 12d and second interface at 13u and thus the slope of the curve is neither continuously negative nor positive in the region defined by portion 15a. The embodiment of Figs. 3-4 additionally shows a region 15a wherein a leftmost part of the slope of change is decreasing and a rightmost part of the slope is decreasing, but the middle portion is substantially equal to a concentration Cx as shown in Fig. 4, and thus a polarity of the slope is not continuous between the entirety of the region 15a. The prior art does not explicitly teach or suggest in any combination a semiconductor device comprising a substrate, first epitaxial layer and second epitaxial layer each having a first conductivity type and a photodiode in the first or second epitaxial layer having a first doped region of a second conductivity type and a second doped region of the first conductivity type, wherein a dopant concentration of dopants within the second doped region changes from a first interface wherein an uppermost surface of the second doped region interfaces with a layer overlying the second doped region to a second interface where a bottommost surface of the second doped region interfaces with an uppermost surface of the first doped region and a polarity of a slope of the change is continuous. The device of the instant application comprises a first p-n junction tuned for sensing a first range of wavelength and a second p-n junction tuned for sensing a second wave of wavelengths, thus improving power consumption, effectiveness in low-light environments, and providing higher resolution (as described in paragraph [0025] of the instant application). As such, Claim 1 is deemed patentable over the prior art. Claims 2-7 are further deemed patentable as they require all limitations of independent claim 1. Any comments considered necessary by applicant must be submitted no later than the payment of the issue fee and, to avoid processing delays, should preferably accompany the issue fee. Such submissions should be clearly labeled “Comments on Statement of Reasons for Allowance.” Response to Arguments Applicant's arguments filed July 7, 2026 have been fully considered but they are not persuasive. Regarding Claim 8, applicant argues that the cited art fails to show at least some of a portion of the third semiconductor region being in the first epitaxial layer and at least some of a different portion of the third semiconductor region being in the second epitaxial layer. Examiner notes that the embodiment of device 101 shown in Figs. 1-2 of Shimizu, as cited above, anticipates these newly cited limitations. Regarding claim 13, applicant argues that a dopant concentration in semiconductor region 13 has an increase and decrease between a first and second interface. Examiner respectfully disagrees and notes that Fig. 8 shows a dopant profile of region 13 is continuously decreasing from a concentration Cz to a concentration Cp. Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure: Kosai (US 5457331 A) teaches a dual-band infrared radiation detector with a first p-n junction between a first layer (14) and second layer (16) and a second p-n junction between a third layer (18) and fourth layer (20). Any inquiry concerning this communication or earlier communications from the examiner should be directed to CASEY PAUL BOATMAN whose telephone number is (703)756-4778. The examiner can normally be reached M-F 7:30 AM - 5:30 PM ET. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Britt Hanley can be reached at (571)270-3042. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /C.P.B./Examiner, Art Unit 2893 /Britt Hanley/Supervisory Patent Examiner, Art Unit 2893
Read full office action

Prosecution Timeline

Show 1 earlier event
Nov 13, 2023
Response after Non-Final Action
Dec 04, 2025
Non-Final Rejection mailed — §102, §103
Mar 06, 2026
Response Filed
May 07, 2026
Final Rejection mailed — §102, §103
Jul 07, 2026
Response after Non-Final Action
Jul 21, 2026
Request for Continued Examination
Jul 23, 2026
Response after Non-Final Action
Sep 02, 2026
Non-Final Rejection mailed — §102, §103 (current)

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Prosecution Projections

3-4
Expected OA Rounds
84%
Grant Probability
94%
With Interview (+10.4%)
3y 7m (~5m remaining)
Median Time to Grant
High
PTA Risk
Based on 81 resolved cases by this examiner. Grant probability derived from career allowance rate.

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