DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Election/Restrictions
Applicant's election with traverse of Group I drawn to a method, in the reply filed on 03/02/2026 is acknowledged. The traversal is on the ground(s) that there is no serious burden on the examiner. This is not found persuasive because
Group I would require a search in at least CPC H10D64/01, along with a unique text search.
Group II would not be searched as above and would instead require a search in CPC H10D62/8325.
The requirement is still deemed proper and is therefore made FINAL.
Claims 11-17 are withdrawn from further consideration pursuant to 37 CFR 1.142(b) as being drawn to a nonelected invention, there being no allowable generic or linking claim.
Claims 1-10 and 18-20 are still pending.
Priority
Receipt is acknowledged of certified copies of papers required by 37 CFR 1.55.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 5-9 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Regarding claim 5, the limitation “some of the grains of the layer” in Line L1, renders the claim indefinite because the antecedent basis is unclear as to whether “some of the grains of the layer” in Line L1 refers to new grains or some grains of the “layer of grains” previously cited in Lines L1-2. In the purpose of compact prosecution, "some of the grains of the layer " has been interpretated as some grains of the layer of grains.
Regarding claim 6, the limitation “some of the grains of the second layer” in Line L2, renders the claim indefinite because the antecedent basis is unclear as to whether “some of the grains of the second layer " (Line L2) refers to new grains or some grains of the “second layer of grains" previously cited in Line L2. In the purpose of compact prosecution, " some of the grains of the second layer" has been interpretated as some grains of the second layer of grains.
Regarding claim 7, the limitation “some of the grains” in Line L1, renders the claim indefinite because the antecedent basis is unclear as to whether “some of the grains” in Line L1 refers to new grains or some of the grains of the “layer of grains” previously cited in Lines L1-2 of claim 5. In the purpose of compact prosecution, "some of the grains " has been interpretated as some of the grains of the layer of grains.
Regarding claim 8, the limitation “wherein the irradiation is adjusted” in Line L1, renders the claim indefinite because the antecedent basis is unclear as to whether “wherein the irradiation is adjusted” in Line L1 refers to new irradiation or the “irradiating” previously cited in Line L5 of claim 1. In the purpose of compact prosecution, "wherein the irradiation is adjusted" has been interpretated as wherein the irradiating is adjusted.
Regarding claim 9, the limitation “thinning or grinding a silicon carbide semiconductor wafer” in Lines L2-3, renders the claim indefinite because the antecedent basis is unclear as to whether “thinning or grinding a silicon carbide semiconductor wafer” in Lines L2-3 refers to thinning or grinding a new silicon carbide semiconductor wafer or the thinning or grinding the “silicon carbide semiconductor substrate” previously cited in Line L2 of claim 1. In the purpose of compact prosecution, "thinning or grinding a silicon carbide semiconductor wafer" has been interpretated as thinning or grinding the silicon carbide semiconductor substrate.
The balance of claims are rejected for being dependent upon an already rejected claim.
Appropriate correction is required.
Double Patenting
The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969).
A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP § 2146 et seq. for applications not subject to examination under the first inventor to file provisions of the AIA . A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b).
The filing of a terminal disclaimer by itself is not a complete reply to a nonstatutory double patenting (NSDP) rejection. A complete reply requires that the terminal disclaimer be accompanied by a reply requesting reconsideration of the prior Office action. Even where the NSDP rejection is provisional the reply must be complete. See MPEP § 804, subsection I.B.1. For a reply to a non-final Office action, see 37 CFR 1.111(a). For a reply to final Office action, see 37 CFR 1.113(c). A request for reconsideration while not provided for in 37 CFR 1.113(c) may be filed after final for consideration. See MPEP §§ 706.07(e) and 714.13.
The USPTO Internet website contains terminal disclaimer forms which may be used. Please visit www.uspto.gov/patent/patents-forms. The actual filing date of the application in which the form is filed determines what form (e.g., PTO/SB/25, PTO/SB/26, PTO/AIA /25, or PTO/AIA /26) should be used. A web-based eTerminal Disclaimer may be filled out completely online using web-screens. An eTerminal Disclaimer that meets all requirements is auto-processed and approved immediately upon submission. For more information about eTerminal Disclaimers, refer to www.uspto.gov/patents/apply/applying-online/eterminal-disclaimer.
Claims 1-2 and 19-20 are provisionally rejected on the ground of nonstatutory double patenting as being unpatentable over claims 1 and 5-9 of copending Application No. 18/360,459 Roy et al. (US 20240055257 A1-Roy57). Although the claims at issue are not identical, they are not patentably distinct from each other because claims 1-2 of copending Application No. 18/360,459 teach each limitation of claims 1-2 and 19-20. See below table.
Application 18/231,176 Joshi et al. (US20240055256A1-Joshi56)
Application 18/360,459 Roy et al. (US 20240055257 A1-Roy57)
Claim 1
A method, comprising:
providing a crystalline silicon carbide semiconductor substrate;
depositing a metallic contact material layer onto the crystalline silicon carbide semiconductor substrate; and
irradiating, with a thermal annealing laser beam,
at least a part of the crystalline silicon carbide semiconductor substrate and
at least a part of the metallic contact material layer
to generate a contact phase portion at an interface of the metallic contact material layer and the crystalline silicon carbide semiconductor substrate.
Claim 1
A method for manufacturing a contact on a silicon carbide substrate, the method comprising:
providing a crystalline silicon carbide substrate; modifying a crystal structure in a surface area of the crystalline silicon carbide substrate such that a carbon-enriched silicon carbide portion is generated in the surface area;
forming a contact layer on the crystalline silicon carbide substrate by depositing a metallic contact material onto the surface area comprising the carbon-enriched silicon carbide portion; and
thermal annealing
at least a part of the carbon-enriched silicon carbide portion of the crystalline silicon carbide substrate and
at least a part of the contact layer, such that a ternary metallic phase portion comprising at least the metallic contact material, silicon, and carbon is generated.
Claim 1
irradiating,
with a thermal annealing laser beam
Claim 2
The method of claim 1,
wherein the modifying comprises
irradiating a surface area of the crystalline silicon carbide substrate with at least one first thermal annealing laser beam.
Claim 2
The method of claim 1,
wherein the contact phase portion comprises a metal, silicon, and carbon.
Claim 1
A method for manufacturing a contact on a silicon carbide substrate, the method comprising:
providing a crystalline silicon carbide substrate; modifying a crystal structure in a surface area of the crystalline silicon carbide substrate such that a carbon-enriched silicon carbide portion is generated in the surface area;
forming a contact layer on the crystalline silicon carbide substrate by depositing a metallic contact material onto the surface area comprising the carbon-enriched silicon carbide portion; and
thermal annealing
at least a part of the carbon-enriched silicon carbide portion of the crystalline silicon carbide substrate and
at least a part of the contact layer, such that a ternary metallic phase portion comprising at least the metallic contact material, silicon, and carbon is generated.
Claim 19
A method, comprising:
providing a crystalline silicon carbide semiconductor substrate;
depositing a metallic contact material layer onto the crystalline silicon carbide semiconductor substrate; and
irradiating
at least a part of the crystalline silicon carbide semiconductor substrate and
at least a part of the metallic contact material layer
to generate a contact phase portion at an interface of the metallic contact material layer and the crystalline silicon carbide semiconductor substrate..
Claim 1
A method for manufacturing a contact on a silicon carbide substrate, the method comprising:
providing a crystalline silicon carbide substrate;
modifying a crystal structure in a surface area of the crystalline silicon carbide substrate such that a carbon-enriched silicon carbide portion is generated in the surface area;
forming a contact layer on the crystalline silicon carbide substrate by depositing a metallic contact material onto the surface area comprising the carbon-enriched silicon carbide portion; and
thermal annealing
at least a part of the carbon-enriched silicon carbide portion of the crystalline silicon carbide substrate and
at least a part of the contact layer, such that a ternary metallic phase portion comprising at least the metallic contact material, silicon, and carbon is generated.
Claim 20
The method of claim 19,
wherein the contact phase portion comprises a metal, silicon, and carbon.
Claim 1
A method for manufacturing a contact on a silicon carbide substrate, the method comprising:
providing a crystalline silicon carbide substrate; modifying a crystal structure in a surface area of the crystalline silicon carbide substrate such that a carbon-enriched silicon carbide portion is generated in the surface area;
forming a contact layer on the crystalline silicon carbide substrate by depositing a metallic contact material onto the surface area comprising the carbon-enriched silicon carbide portion; and
thermal annealing
at least a part of the carbon-enriched silicon carbide portion of the crystalline silicon carbide substrate and
at least a part of the contact layer, such that a ternary metallic phase portion comprising at least the metallic contact material, silicon, and carbon is generated.
This is a provisional nonstatutory double patenting rejection because the patentably indistinct claims have not in fact been patented.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claim(s) 1-3, 9, and 19-20 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Okumura et al. (US 20210111251 A1-Okumura51 from IDS).
Regarding claim 1, Okumura51 discloses a method ([0025] L1) , comprising:
providing a crystalline silicon carbide semiconductor substrate (Providing a crystalline silicon carbide semiconductor 1-Fig 4A, [0030] L 5, [0025] L1-9);
depositing a metallic contact material layer onto the crystalline silicon carbide semiconductor substrate (depositing a metallic contact material layer 110-Fig 4B, [0025] L1-9, [0049]); and
irradiating, with a thermal annealing laser beam (irradiating with a thermal annealing using laser beam 50 at least a part of the crystalline silicon carbide semiconductor substrate 1 and a part of the metallic material layer 110 to generate a contact phase portion at an interface of metallic contact material layer 110 and the crystalline silicon carbide semiconductor substrate 1-Fig 4C, Fig 6a, Fig 6B , [0051] L1-10),
at least a part of the crystalline silicon carbide semiconductor substrate (irradiating with a thermal annealing using laser beam 50 at least a part of the crystalline silicon carbide semiconductor substrate 1 and a part of the metallic material layer 110 to generate a contact phase portion at an interface of metallic contact material layer 110 and the crystalline silicon carbide semiconductor substrate 1-Fig 4C, Fig ^a, Fig 6B , [0051] L1-10) and
at least a part of the metallic contact material layer ((irradiating with a thermal annealing using laser beam 50 at least a part of the crystalline silicon carbide semiconductor substrate 1 and a part of the metallic material layer 110 to generate a contact phase portion at an interface of metallic contact material layer 110 and the crystalline silicon carbide semiconductor substrate 1-Fig 4C, Fig ^a, Fig 6B , [0051] L1-10)
to generate a contact phase portion at an interface of the metallic contact material layer and the crystalline silicon carbide semiconductor substrate ( generating contact phase portion 11a at the interface 1b-Fig 6A, Fig 6B, [0051] L1-10).
Regarding claim 2, Okumura51 discloses all the elements of claim 1, as noted above.
Okumura51 further discloses a method ([0025] L1)
wherein the contact phase portion comprises a metal, silicon, and carbon (forming an alloy layer 11 of at least one of metal silicide and metal carbide so the contact phase portion 11a comprise a metal, silicon, and carbon-[0037] L2-9).
Regarding claim 3, Okumura51 discloses all the elements of claim 2, as noted above.
Okumura51 further discloses a method ([0025] L1)
wherein the metal is a transition metal comprising at least one of titanium, molybdenum, zirconium, niobium, hafnium, tantalum, vanadium, chromium, or tungsten (a metal forming the drain electrode 11, nickel (Ni), molybdenum (Mo), titanium (Ti), tungsten (W), niobium (Nb), tantalum (Ta), or the like-[0038] L1-6).
Regarding claim 9, Okumura51 discloses all the elements of claim 1, as noted above.
Okumura51 further discloses a method ([0025] L1)
wherein providing a crystalline silicon carbide semiconductor substrate comprises at least one of thinning or grinding a silicon carbide semiconductor wafer (Grinding the crystalline silicon carbide semiconductor substrate 1-[0048] L1-4).
Regarding claim 19, Okumura51 discloses a method ([0025] L1) , comprising:
providing a crystalline silicon carbide semiconductor substrate (Providing a crystalline silicon carbide semiconductor 1-Fig 4A, [0030] L 5, [0025] L1-9);
depositing a metallic contact material layer onto the crystalline silicon carbide semiconductor substrate (depositing a metallic contact material layer 110-Fig 4B, [0025] L1-9, [0049]); and
irradiating (irradiating with a thermal annealing using laser beam 50 at least a part of the crystalline silicon carbide semiconductor substrate 1 and a part of the metallic material layer 110 to generate a contact phase portion at an interface of metallic contact material layer 110 and the crystalline silicon carbide semiconductor substrate 1-Fig 4C, Fig 6a, Fig 6B , [0051] L1-10),
at least a part of the crystalline silicon carbide semiconductor substrate (irradiating with a thermal annealing using laser beam 50 at least a part of the crystalline silicon carbide semiconductor substrate 1 and a part of the metallic material layer 110 to generate a contact phase portion at an interface of metallic contact material layer 110 and the crystalline silicon carbide semiconductor substrate 1-Fig 4C, Fig ^a, Fig 6B , [0051] L1-10) and
at least a part of the metallic contact material layer ((irradiating with a thermal annealing using laser beam 50 at least a part of the crystalline silicon carbide semiconductor substrate 1 and a part of the metallic material layer 110 to generate a contact phase portion at an interface of metallic contact material layer 110 and the crystalline silicon carbide semiconductor substrate 1-Fig 4C, Fig 6A, Fig 6B , [0051] L1-10)
to generate a contact phase portion at an interface of the metallic contact material layer and the crystalline silicon carbide semiconductor substrate ( generating contact phase portion 11a at the interface 1b-Fig 6A, Fig 6B, [0051] L1-10).
Regarding claim 20, Okumura51 discloses all the elements of claim 19, as noted above.
Okumura51 further discloses a method ([0025] L1)
wherein the contact phase portion comprises a metal, silicon, and carbon (forming an alloy layer 11 of at least one of metal silicide and metal carbide so the contact phase portion 11a comprise a metal, silicon, and carbon-[0037] L2-9).
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 4-5 and 7 is/are rejected under 35 U.S.C. 103 as being unpatentable over Okumura et al. (US 20210111251 A1-Okumura51 from IDS) in view of Kushibe et al. (JP 2003101038 A-Kushibe38 from IDS with Annotated Machine translation).
Regarding claim 4, Okumura51 discloses all the elements of claim 1, as noted above.
Okumura51 does not disclose a method
wherein the contact phase portion comprises grains comprising a crystal structure having a lattice constant similar or identical to a lattice constant of the crystalline silicon carbide semiconductor substrate.
Kushibe38 teaches a method
wherein the contact phase portion comprises grains comprising a crystal structure having a lattice constant similar or identical to a lattice constant of the crystalline silicon carbide semiconductor substrate (having little lattice mismatch so having similar lattice constant-[Description] [0005] page 2 L25-27, [Description] [0005] page 3 L27-29).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the method of Okumura51, as taught by Kushibe38 for the purpose of preventing a large number of dislocations to occur near the interface between the substrate and the electrode material when subjected to heat cycle (Kushibe38: [Description] [0005] page 2 L17-20, [Description] [0005] page 3 L15-17).
Regarding claim 5, Okumura51 discloses all the elements of claim 1, as noted above.
Okumura51 further discloses a method
wherein the contact phase portion (11-Fig2) comprises a layer of grains (Layer of grain 11a and 11b of layer 11-Fig 2),
Okumura51 does not disclose a method
wherein at least some of the grains of the layer have a hexagonal crystal structure having a lattice constant similar or identical to a lattice constant of the crystalline silicon carbide semiconductor substrate.
Kushibe38 teaches a method
wherein at least some of the grains of the layer have a hexagonal crystal structure having a lattice constant similar or identical to a lattice constant of the crystalline silicon carbide semiconductor substrate (functional element has been interpretated as the contact phase portion which is provided with a SiC layer, which has a c-axis surface of hexagonal crystal structure having similar lattice constant-[Abstract] §SOLUTION, [Description] [0005] page 3 L27-29) .
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the method of Okumura51, as taught by Kushibe38 for the purpose of preventing a large number of dislocations to occur near the interface between the substrate and the electrode material when subjected to heat cycle (Kushibe38: [Description] [0005] page 2 L17-20, [Description] [0005] page 3 L15-17).
Regarding claim 7, Okumura51 and Kushibe38 combination discloses all the elements of claim 5, as noted above.
Okumura51 further discloses a method
wherein at least some of the grains comprise a transition metal carbide crystal structure intercalated with between 0% and 25% silicon (Ohmic contact layer 11 of and NiSi 11a MoC 11b- so a transition metal carbide crystal structure with 25% of silicon-[0053], Fig 2).
Claim(s) 6 is/are rejected under 35 U.S.C. 103 as being unpatentable over Okumura et al. (US 20210111251 A1-Okumura51 from IDS) in view of Kushibe et al. (JP 2003101038 A-Kushibe38 from IDS with Annotated Machine translation), and further in view of Pham et al. (US 20200044031 A1-Pham31 from IDS).
Regarding claim 6, Okumura51 and Kushibe38 combination discloses all the elements of claim 5, as noted above.
Okumura51 further discloses a method
wherein the contact phase portion comprises a second layer of grains (First layer of grain 11a and second layer of grain 11b of layer 11-Fig 2).
Okumura51 and Kushibe38 combination does not disclose a method
wherein at least some of the grains of the second layer have a hexagonal crystal structure comprising at least a metal, silicon, and carbon in a different stoichiometric ratio than the layer.
Pham31 teaches a method
wherein at least some of the grains of the second layer have a hexagonal crystal structure comprising at least a metal, silicon, and carbon in a different stoichiometric ratio than the layer (contact phase portion 875 comprising a first layer of grains 877a, and a second layer of grains 878a with carbon clusters or graphene, and graphene has a hexagonal crystal structure. Additionally, a concentration of larger graphene grains in 877a being higher than in layer 878a so having different stochiometric ratio-[0005] L13-15, Fig 7B, Fig 8A, Fig 8C).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the method of Okumura51 in view of Kushibe38 , as taught by Pham31 for the purpose of Improving the integrity of the backside contact for thinned SiC power devices (Pham31:[0062]).
Claim(s) 8 and 10 is/are rejected under 35 U.S.C. 103 as being unpatentable over Okumura et al. (US 20210111251 A1-Okumura51 from IDS) in view of Pham et al. (US 20200044031 A1-Pham31 from IDS).
Regarding claim 8, Okumura51 discloses all the elements of claim 1, as noted above.
Okumura51 does not disclose a method
wherein the irradiation is adjusted to melt the metallic contact material layer and enable diffusion of metal atoms with the crystalline silicon carbide semiconductor substrate at least partially at the interface.
Pham31 teaches a method
wherein the irradiation is adjusted to melt the metallic contact material layer and enable diffusion of metal atoms with the crystalline silicon carbide semiconductor substrate at least partially at the interface (Rapid Thermal processing or RTP enhanced by using laser at the melting point of Titanium/metallic contact material on SiC substrate so adjusting the irradiation to melt the metallic contact material at the interface- Fig 8A, Fig 8C, [0058] L1-9).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the method of Okumura51 in view of Kushibe38 , as taught by Pham31 for the purpose of Improving the integrity of the backside contact for thinned SiC power devices (Pham31:[0062]).
Regarding claim 10, Okumura51 discloses all the elements of claim 5, as noted above.
Okumura51 does not disclose a method
comprising depositing a second metal layer on the metallic contact material layer.
Pham31 teaches a method
comprising depositing a second metal layer on the metallic contact material layer (Step 316 deposition of a second metal layer/Solder metal 181 on the metallic contact material layer 175-Fig 1A, Fig 3A).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the method of Okumura51 in view of Kushibe38 , as taught by Pham31 for the purpose of Improving the integrity of the backside contact for thinned SiC power devices (Pham31:[0062]).
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
Seki et al. (US 20110287626 A1-Seki26) teaches a method (Title) comprising
providing a crystalline silicon carbide semiconductor substrate (Abstract, Fig 3);
depositing a metallic contact material layer onto the crystalline silicon carbide semiconductor (Abstract, Fig 3) substrate; and
irradiating, with a thermal annealing laser beam (Abstract, Fig 3).
Any inquiry concerning this communication or earlier communications from the examiner should be directed to NATHALIE R FAYETTE whose telephone number is (571)272-1220. The examiner can normally be reached Monday-Friday 8:30 am-6pm ET.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Christine Kim can be reached at (571) 272-8458. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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NATHALIE R. FAYETTE
Examiner
Art Unit 2812
/NATHALIE R FAYETTE/Examiner, Art Unit 2812 03/25/2026
/CHRISTINE S. KIM/Supervisory Patent Examiner, Art Unit 2812
Prosecution Insights