DETAILED ACTION
This action is responsive to the amendment received April 24, 2026.
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Drawings
The prior drawing objections are withdrawn in view of the amended claims.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claim 7 is rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claim 7 recites “…cutting with a blade, cutting with a saw…”. Forming a trench by cutting with a [saw] blade is understood to be the same well-known process as cutting with a saw [blade]. When alternatives are recited, they are understood to be different, however it is unclear how these alternatives are supposed to be different in the context of claim 7. As best understood, if one is forming a trench by cutting with a blade, this refers to using a conventional dicing saw or similar equipment that uses a saw blade and forming a trench by cutting with a saw is understood to refer to the same process.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-2, 4-9, and 13 are rejected under 35 U.S.C. 103 as being unpatentable over Ogawa et al. (US 2016/0315011) in view of Wakahara et al. (US 2020/0020585).
(Re Claim 1) Ogawa teaches a semiconductor chip splitting method using a laser, comprising (see Figs. 2-5 and 34-36):
performing a back-end-of-line (BEOL) process comprising forming wiring on a front surface of a semiconductor substrate (this corresponds to the formation of functional layer F on the front surface, discussed below, ¶¶30,70);
forming a scribing line, wherein forming the scribing line comprises:
forming an upper trench (Figs. 3, 34: trench L is formed) above the front surface of the semiconductor substrate (front surface of semiconductor wafer W/P having layer F);
forming a lower trench (Pd) in a rear surface of the semiconductor substrate along a region that is overlapped by the upper trench; and
forming a reformed portion (Fig. 35, ¶68, Pk) in the semiconductor substrate at a position overlapping the upper trench (L) and the lower trench (Pd) by emitting a laser (LB5) through the upper trench, wherein the upper trench, the lower trench, and the reformed portion together form the scribing line; and
splitting the semiconductor substrate into chips by a process comprising cutting along the scribing line (Fig. 36).
Ogawa discloses a functional layer F comprising devices and a plurality of insulating layers and notes metal may be included (¶¶30,70) however is silent regarding the inclusion of wiring. A PHOSITA looking for guidance on the formation of a functional layer comprising metal, devices, and insulating layers would be motivated to look to related art to teach details of conventional functional film structures. Related art from Wakahara similarly teaches a wafer having a functional layer 13 comprising insulating layers, metal interconnect wiring, vias, etc. (Fig. 1A and ¶¶ 31-37). In view of Wakahara, a PHOSITA would find it obvious to construct the functional layer F according to Wakahara’s functional layer 13 to provide functional interconnect wiring for the integrated circuit devices present.
(Re Claim 5) wherein the lower trench is formed in a process together with forming an align key at on the rear surface of the semiconductor substrate (as claimed, an align key may be any discernable feature that can be used to align something, including an edge, sidewall, or corner of a feature, when the blade 21 cuts through the substrate, the combination of sides, edges, and corners of the dies makes a grid that can be used as an align key).
(Re Claim 6) wherein forming the lower trench is performed by at least one of a physical method, a mechanical method, and a chemical method performed on the rear surface of the semiconductor substrate (Figs. 11-14, the saw blade 21 is physical and mechanical).
(Re Claim 7) wherein forming the lower trench is performed through a process comprising at least one of laser irradiation, cutting with a blade, cutting with a saw, wet etching or dry etching (Figs. 11-14, cutting with saw blade 21).
(Re Claim 9) wherein the reformed portion comprises a portion of the semiconductor substrate that is converted into a polycrystalline portion or an amorphous portion (Fig. 34, ¶68, modified layer Pk).
(Re Claim 13) wherein the lower trench comprises a cross-sectional structure having a quadrangular shape (Pd: quadrangular shape).
Claim 3 is rejected under 35 U.S.C. 103 as being unpatentable over Ogawa et al. (US 2016/0315011) and Wakahara et al. (US 2020/0020585) as applied above, and further in view of Choi et al. (US 2021/0305115).
(Re Claim 3) Ogawa and Wakahara are silent regarding wherein forming the upper trench comprises providing a gap fill insulating film after selectively etching and removing a region of a low dielectric constant insulating film and a region of an interlayer insulating film. Ogawa and Wakahara teach forming a trench in the functional layer F/13 comprising low-k and interlayer insulating films. Ogawa forms the trench using a laser which is known to cause damage, debris, and rough surfaces. Related art from Choi teaches etching the layers instead, and then filling the trench with a gap filling insulating layer (Figs. 5-9 and ¶¶31,42-50, trench 164 filled with 172, 182). A PHOSITA would find it obvious to etch the layers and then apply the passivation according to Choi as this process is advantageous since it removes the brittle insulating layers from the dicing regions by etching which results in less damage, debris, and roughness than laser ablation, the removal mitigates cracking and delamination that may occur when dicing, and then passivation is added to protect the exposed surfaces and increase mechanical durability (¶¶52,80).
Claims 10 and 11 are rejected under 35 U.S.C. 103 as being unpatentable over Ogawa et al. (US 2016/0315011) and Wakahara et al. (US 2020/0020585) as applied above, and further in view of Nakamura et al. (US 2006/0281226).
(Re Claim 10) wherein the scribing line comprises two lines and forms a split region.
(Re Claim 11) wherein a test element group (TEG) is disposed at the split region.
Ogawa is silent regarding wherein the laser scribing line comprises two lines and forms a split region, and wherein a test element group (TEG) is disposed at the split region. Wakahara discloses when forming the functional layer 13, test element groups (TEG) may be formed in the dicing regions (¶36). TEGs are well known in the art and provide a means for process monitoring and device testing during fabrication and are conventionally placed in dicing lines so they can be easily removed. While Ogawa and Wakahara similarly teach using a laser to cut through the region, related art from Nakamura teaches (see Figs. 5-9) one can use multiple stealth dicing modified regions 24 on either side of the TEG 23 such that the TEG can be singulated along with the dies. This is advantageous since the TEGs can still be used for subsequent analysis instead of being destroyed during dicing, there is less material ablated and redeposited as debris, or in the case of a saw, less material clogging the saw. A PHOSITA would recognize the benefits of using TEGs in dicing lines as taught by Wakahara and Nakamura and the benefits of Nakamura’s process to singulate the TEGs using stealth laser dicing rather than destroying them using laser ablation or other processes.
Claim 12 is rejected under 35 U.S.C. 103 as being unpatentable over Ogawa et al. (US 2016/0315011), Wakahara et al. (US 2020/0020585) and Nakamura et al. (US 2006/0281226) as applied above and further in view of Choi et al. (US 2021/0305115) and Chuang et al. (US 2022/0399234).
(Re Claim 12) wherein a dam comprising a metal layer comprising the wiring is disposed at sides of the scribing line.
Ogawa is silent regarding a dam comprising a metal layer comprising the wiring is disposed at sides of the laser scribing line. Related art from Choi teaches forming a dam 116 at the perimeter of each die along the dicing lines (¶35). Related art from Chuang also similarly teaches forming a dam 202 around the perimeter of each die along the dicing lines. These “dam” features are conventionally called crack stops or die seals and are well known in the art, formed along with the multilayer interconnects/ILDs, and are used to prevent moisture and cracks from penetrating into the die regions. A PHOSITA would find it obvious to include dams along the die perimeters as taught by Choi and Chuang to increase yield by preventing cracking and moisture penetration.
Response to Arguments
Applicant's arguments filed April 24, 2026, have been fully considered but they are not persuasive. The amended claims overcome the rejection in view of Chuang et al. With respect to Ogawa et al., Applicant appears to mischaracterize the rejection and Ogawa (remarks pp. 11-14). The front surface of the substrate is the surface with F (the BEOL layer with the wiring) and the upper trench L is formed above the front surface of the substrate in F (e.g. see Fig. 3). The lower trench Pd is formed in the substrate P/W at a location overlapping L (e.g. see Figs. 11-14).
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. The additional cited art teaches related dicing and trench forming processes.
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to ERIK T. K. PETERSON whose telephone number is (571)272-3997. The examiner can normally be reached M-F, 9-5 pm (CST).
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/ERIK T. K. PETERSON/ Primary Examiner, Art Unit 2898