DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Arguments
Applicant's arguments filed 8/14/2026 have been fully considered but they are not persuasive. Applicant argues that Hertzberg address the collision between different quibits within one multi-quibit circuit and makes no mention of eigenfrequencies of a chip substrate. However, an eigenfrequency is a natural and inherent property of a quibit and Hertzberg describes variations and imperfections during fabrication that can cause frequency collisions in a given lattice of quibits. It uses a program to facilitate frequency allocation among multiple quibits (col. 1, lines 46-56), but does not go so far as to adjust fabrication methods to etch patterns which maximize the difference between the eigenfrequenzy and operating frequency. This is where the combination with Shao teaches particular pattern etching of a chip substrate.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-4 and 9-12 are rejected under 35 U.S.C. 103 as being unpatentable over Hertzberg et al. (US Patent No. 10,423,888) in view of Shao et al. (US Publication No. 2020/0335685).
Regarding claim 1, Hertzberg discloses a method for preparing a quantum chip, the method comprising:
determining (110) an initial eigenfrequency of a chip substrate (col. 5, lines 13-28)
performing, based on a numerical comparison result between the initial eigenfrequency and a quantum operating frequency (Figure 6; col. 5, lines 45-63)
wherein the quantum operating frequency is an operating frequency of a quantum bit of a quantum circuit, the second surface is opposite to the first surface, and the target pattern is a pattern when a difference between the initial eigenfrequency of the chip substrate and the quantum operating frequency is maximum (col. 5, lines 45-63 - “non-colliding frequencies”)
Hertzberg does not disclose pattern etching on a first surface of the chip substrate to obtain a chip substrate with an intact second surface and the first surface with a target pattern and etching, on the second surface of the pattern-etched chip substrate, the quantum circuit to form the quantum chip. However, Shao discloses pattern etching on a first surface (1210) of the chip substrate to obtain a chip substrate with an intact second surface (1204) and the first surface with a target pattern and etching, on the second surface of the pattern-etched chip substrate, the quantum circuit to form the quantum chip (Figure 12; paragraph 80). It would have been obvious to one of ordinary skill in the art at a time before the effective filing date of the invention to have modified the chip of Herzberg to include the etched target patterns of Shao, since it can improve frequency tuning and immunity to noise (paragraph 19).
Regarding claim 2, Shao discloses the initial eigenfrequency of the chip substrate is determined by: acquiring a length and a width of the first surface when the first surface of the chip substrate is rectangular; and determining the initial eigenfrequency of the chip substrate based on the length and the width of the first surface (paragraphs 80-81; Figure 10). As discussed above, it would have been obvious to one of ordinary skill in the art at a time before the effective filing date of the invention to have modified Hertzberg in view of Shao.
Regarding claim 3, Hertzberg discloses the determining the initial eigenfrequency of the chip substrate based on the length and the width of the first surface comprises: squaring the length to obtain a first square result, and squaring the width to obtain a second square result; determining a first ratio of a square result of a circumference rate constant to the first square result, and a second ratio of the square result of the circumference rate constant to the second square result; extracting a sum result of the first ratio and the second ratio to obtain an extraction result; and taking a ratio of the extraction result to a substrate constant as the initial eigenfrequency, the substrate constant being obtained based on permeability of the chip substrate and a dielectric constant of the chip substrate (col. 7, lines 26-50; Figure 6).
Regarding claim 4, Hertzberg discloses the performing, based on a numerical comparison result between the initial eigenfrequency and a quantum operating frequency, pattern etching on a first surface of the chip substrate to obtain a chip substrate with an intact second surface and the first surface with a target pattern comprises: when the initial eigenfrequency is less than the quantum operating frequency, acquiring the target pattern of the first surface in response to the eigenfrequency of the chip substrate being minimum; when the initial eigenfrequency is not less than the quantum operating frequency (Figure 6; col. 5, lines 45-63), and Shao discloses acquiring the target pattern of the first surface in response to the eigenfrequency of the chip substrate being maximum; and performing pattern etching on the first surface of the chip substrate based on the target pattern to obtain the chip substrate with the intact second surface and the first surface with the target pattern (paragraph 80; Figure 2).
Regarding claim 9, Shao discloses the target pattern has a cubic depression (D3) at a central position of the first surface in response to the initial eigenfrequency being less than the quantum operating frequency; and the target pattern has a cubic boss (304) at the central position of the first surface in response to the initial eigenfrequency being not less than the quantum operating frequency (Figure 3). As discussed above, it would have been obvious to one of ordinary skill in the art at a time before the effective filing date of the invention to have modified Hertzberg in view of Shao.
Regarding claim 10, Hertzberg discloses a quantum chip (110), wherein a chip substrate of the quantum chip comprises an opposing first surface and second surface (col. 5, lines 13-28; Figure 13), wherein a difference between an eigenfrequency of the chip substrate and a quantum operating frequency is maximum; and the second surface being provided with a quantum circuit, an operating frequency of a quantum bit of the quantum circuit being the quantum operating frequency (Figure 6; col. 5, lines 45-63).
Hertzberg does not disclose a target pattern per se. However, Shao discloses pattern etching on a first surface (1210) of the chip substrate to obtain a chip substrate with an intact second surface (1204) and the first surface with a target pattern and etching, on the second surface of the pattern-etched chip substrate, the quantum circuit to form the quantum chip (Figure 12; paragraph 80). It would have been obvious to one of ordinary skill in the art at a time before the effective filing date of the invention to have modified the chip of Herzberg to include the etched target patterns of Shao, since it can improve frequency tuning and immunity to noise (paragraph 19).
Regarding claim 11, Shao discloses the eigenfrequency of the chip substrate is determined by: acquiring a length and a width of the first surface when the first surface of the chip substrate is rectangular; and determining the initial eigenfrequency of the chip substrate based on the length and the width of the first surface (paragraphs 80-81; Figure 10). As discussed above, it would have been obvious to one of ordinary skill in the art at a time before the effective filing date of the invention to have modified Hertzberg in view of Shao.
Regarding claim 12, Shao discloses the target pattern has a cubic depression (D3) at a central position of the first surface when the eigenfrequency is less than the quantum operating frequency; and the target pattern has a cubic boss (304) at the central position of the first surface when the eigenfrequency is not less than the quantum operating frequency (Figure 3). As discussed above, it would have been obvious to one of ordinary skill in the art at a time before the effective filing date of the invention to have modified Hertzberg in view of Shao.
Claims 5-8 are rejected under 35 U.S.C. 103 as being unpatentable over Hertzberg et al. (US Patent No. 10,423,888) in view of Shao et al. (US Publication No. 2020/0335685), and further in view of Zhang et al. (US Publication No. 2022/0043356).
Regarding claim 5, Hertzberg/Shao discloses the limitations as discussed in the rejection of claim 4 above. Hertzberg/Shao does not disclose the acquiring the target pattern of the first surface in response to the eigenfrequency of the chip substrate being minimum comprises: acquiring geometric parameters of the chip substrate, material of the chip substrate, and a plurality of candidate patterns of the chip substrate; and calling a first neural network model to perform the following processing: acquiring geometric features corresponding to the geometric parameters, material features corresponding to the material, and pattern features of each candidate pattern; fusing, for each candidate pattern, the geometric features, the material features, and the pattern features of the candidate patterns to obtain a first fusion feature, and performing first mapping on the first fusion feature to obtain prediction eigenfrequencies of the candidate pattern; and ranking the prediction eigenfrequencies of the plurality of candidate patterns from small to large, and taking the candidate pattern corresponding to a prediction eigenfrequency ranked first as the target pattern. However, Zhang discloses acquiring geometric parameters of the chip substrate, material of the chip substrate, and a plurality of candidate patterns of the chip substrate; and calling a first neural network model to perform the following processing: acquiring geometric features corresponding to the geometric parameters, material features corresponding to the material, and pattern features of each candidate pattern; fusing, for each candidate pattern, the geometric features, the material features, and the pattern features of the candidate patterns to obtain a first fusion feature, and performing first mapping on the first fusion feature to obtain prediction eigenfrequencies of the candidate pattern; and ranking the prediction eigenfrequencies of the plurality of candidate patterns from small to large, and taking the candidate pattern corresponding to a prediction eigenfrequency ranked first as the target pattern (paragraphs 116-119). It would have been obvious to one of ordinary skill in the art at a time before the effective filing date of the invention to have modified the method of Hertzberg/Shao to include the pattern prediction and ranking steps of Zhang, since it can improve patterning processes and defect capture (paragraph 128).
Regarding claim 6, Zhang discloses the acquiring the target pattern of the first surface in response to the eigenfrequency of the chip substrate being maximum comprises: acquiring geometric parameters of the chip substrate, material of the chip substrate, and a plurality of candidate patterns of the chip substrate; and calling a first neural network model to perform the following processing: acquiring geometric features corresponding to the geometric parameters, material features corresponding to the material, and pattern features of each candidate pattern; fusing, for each candidate pattern, the geometric features, the material features, and the pattern features of the candidate patterns to obtain a first fusion feature, and performing first mapping on the first fusion feature to obtain prediction eigenfrequencies of the candidate pattern; and ranking the prediction eigenfrequencies of the plurality of candidate patterns from large to small, and taking the candidate pattern corresponding to a prediction eigenfrequency ranked first as the target pattern (paragraphs 116-119 and 128). As discussed above, it would have been obvious to one of ordinary skill in the art at a time before the effective filing date of the invention to have modified Hertzberg in view of Shao.
Regarding claim 7, Zhang discloses the first surface of the chip substrate is a plane, and before the acquiring the target pattern of the first surface in response to the eigenfrequency of the chip substrate being minimum, the method further comprises: performing a plurality of simulated cutting on the first surface of the chip substrate until the first surface of the chip substrate becomes the plane again; and performing the following processing on the first surface of the chip substrate obtained from each simulated cutting: performing simulation propagation of an electromagnetic wave on the first surface of the chip substrate, and acquiring transmission frequencies of the electromagnetic wave in occurring a resonance phenomenon during the propagation; and ranking the transmission frequencies corresponding to each simulated cutting from small to large, and determining a transmission frequency ranked first as the eigenfrequency being minimum (paragraphs 116-119 and 128). As discussed above, it would have been obvious to one of ordinary skill in the art at a time before the effective filing date of the invention to have modified Hertzberg in view of Shao.
Regarding claim 8, Zhang discloses the first surface of the chip substrate is a plane, and before the acquiring the target pattern of the first surface in response to the eigenfrequency of the chip substrate being maximum, the method further comprises: performing a plurality of simulated cutting on the first surface of the chip substrate until the first surface of the chip substrate becomes the plane again; and performing the following processing on the first surface of the chip substrate obtained from each simulated cutting: performing simulation propagation of an electromagnetic wave on the first surface of the chip substrate, and acquiring transmission frequencies of the electromagnetic wave in occurring a resonance phenomenon during the propagation; and ranking the transmission frequencies corresponding to each simulated cutting from large to small, and determining a transmission frequency ranked first as the eigenfrequency being maximum (paragraphs 47-49, 83-84, and 116-119). As discussed above, it would have been obvious to one of ordinary skill in the art at a time before the effective filing date of the invention to have modified Hertzberg in view of Shao.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Rigetti et al. (US Publication No. 2017/0228483) discloses a minimum separation of two eigenfrequencies among qubits (paragraph 97).
THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
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/N.R.P/ 9/3/2026 Examiner, Art Unit 2897
/JACOB Y CHOI/ Supervisory Patent Examiner, Art Unit 2897
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