Office Action Predictor
Last updated: April 15, 2026
Application No. 18/233,807

APPARATUS, METHOD AND COMPUTER PROGRAM PRODUCT FOR DEFECT DETECTION IN WORK PIECES

Non-Final OA §103§112
Filed
Aug 14, 2023
Examiner
TANINGCO, MARCUS H
Art Unit
2884
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Kla Corporation
OA Round
3 (Non-Final)
81%
Grant Probability
Favorable
3-4
OA Rounds
2y 2m
To Grant
88%
With Interview

Examiner Intelligence

Grants 81% — above average
81%
Career Allow Rate
910 granted / 1125 resolved
+12.9% vs TC avg
Moderate +7% lift
Without
With
+6.8%
Interview Lift
resolved cases with interview
Fast prosecutor
2y 2m
Avg Prosecution
32 currently pending
Career history
1157
Total Applications
across all art units

Statute-Specific Performance

§101
3.0%
-37.0% vs TC avg
§103
54.8%
+14.8% vs TC avg
§102
22.4%
-17.6% vs TC avg
§112
11.7%
-28.3% vs TC avg
Black line = Tech Center average estimate • Based on career data from 1125 resolved cases

Office Action

§103 §112
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Continued Examination Under 37 CFR 1.114 A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 08/20/2025 has been entered. Response to Arguments Applicant’s arguments, filed 08/20/2025, have been fully considered and are persuasive. Therefore, the rejection has been withdrawn. However, upon further consideration, a new ground(s) of rejection is made in view of US 20120307236 A1. Claim Rejections - 35 USC § 112 The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph: The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention. Claim 5 is rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor, or for pre-AIA the applicant regards as the invention. Claim 5 recites the limitation "the image from the top face of the semiconductor device" in line 3. There is insufficient antecedent basis for this limitation in the claim. Claim 1, upon which claim 5 depends, only recites “collecting illumination exiting the semiconductor device with a camera” and “generating, with an optical system, an image of illumination exiting from a side face of the semiconductor device”. Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention. Claim(s) 1-3, 5-14, and 16-18 is/are rejected under 35 U.S.C. 103 as being unpatentable over Okura (JP 2008045965 A) in view of Ortner (US 20120307236 A1). With regards to claims 1, 8-10, 17, and 18 Okura discloses an inspection device and method for inspecting a singulated semiconductor device [0019] comprising: generating illumination of a wavelength range comprising infrared light [0022]; directing a portion of the illumination through a back face of the semiconductor device at an oblique angle relative to the back face of the semiconductor device [0027] (Fig. 5), wherein the illumination propagates through the semiconductor device toward a side face 2b of the semiconductor device to inspect the side face for one or more defects S (crack) [0029]; and collecting illumination exiting the semiconductor device with a camera 25 [0029]. Okura does not specifically teach directing a portion of the illumination through a top face of the semiconductor device. Nevertheless, such a modification would have been known and considered obvious, only requiring the configuration shown in Fig. 5 of Okura to be flipped such that the illumination is directed down to the back face of the semiconductor device. Absent some degree of criticality, it would have been well known, obvious, and predictably suitable to one with ordinary skill in the art to modify Okura with the claimed configuration as a matter of routine design choice. Okura also does not specifically teach generating, with an optical system, an image of illumination exiting from a side face of the semiconductor device. However, in a similar field of endeavor, Ortner teaches it was known to illuminate a first face of a semiconductor device and generate, with an optical system, an image of illumination exiting from an adjacent face of the semiconductor device (Fig. 2) [0060], wherein such a configuration distinguishes from known crack detection systems by a very high signal-to-noise ratio and allows for a very quick inspection of semiconductor substrates [0032], Therefore, in view of the recited benefits, it would have been well known, obvious, and predictably suitable to one with ordinary skill in the art to modify Okura with the claimed configuration. With regards to claims 2 and 14, Okura discloses wherein the camera comprises a lens and a detector [0024]. With regards to claims 3 and 11, Okura discloses wherein the detector comprises one or more sensors 25, wherein the camera images the illumination exiting from the top face of the semiconductor device onto the one or more sensors via the lens [0024, 0028-0029]. With regards to claim 5, Okura does not teach wherein the optical system is configured such that the image captured from the side face of the semiconductor device and the image from the top face of the semiconductor device are simultaneously in focus. However, Okura does teach it was known to provide multiple optical systems to simultaneously image multiple areas of a semiconductor device (Fig. 9) [0039-0042]. Therefore, it would have been well known, obvious, and predictably suitable to one with ordinary skill in the art to modify Okura with the claimed invention in order to image desired surfaces simultaneously. With regards to claim 6, Okura does not teach coupling illumination from at least one light source separately to a side face of the semiconductor device and a top face of the semiconductor device. However, Okura does teach it was known to provide multiple light sources 23 to simultaneously image multiple areas of a semiconductor device (Fig. 9) [0039-0042]. Therefore, it would have been well known, obvious, and predictably suitable to one with ordinary skill in the art to modify Okura with the claimed invention in order to illuminate desired surfaces simultaneously. With regards to claims 7 and 13, Okura discloses a light guide 21 is positioned between a light source and at least one of a top face or a side face of the semiconductor device. With regards to claim 12, Okura discloses wherein the at least one light source is arranged such that the illumination exiting from the top face of the semiconductor device is coaxial to the illumination directed to the top face of the semiconductor device (Fig. 3). With regards to claim 16, Okura does not teach the claimed mirrors. However, those skilled in the art recognize that mirrors were generally well known in the art and would have been considered an obvious matter of design choice. It would have been well known, obvious, and predictably suitable to one with ordinary skill in the art to modify Okura with the claimed mirrors in order to direct light along a desired path. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to MARCUS H TANINGCO whose telephone number is (571)272-1848. The examiner can normally be reached Monday-Friday 9am-6pm EST. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Dave Porta can be reached on 571-272-2444. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /MARCUS H TANINGCO/Primary Examiner, Art Unit 2884
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Prosecution Timeline

Aug 14, 2023
Application Filed
Jun 29, 2024
Non-Final Rejection — §103, §112
Jan 06, 2025
Response Filed
Feb 14, 2025
Final Rejection — §103, §112
Aug 20, 2025
Request for Continued Examination
Aug 22, 2025
Response after Non-Final Action
Sep 27, 2025
Non-Final Rejection — §103, §112
Apr 01, 2026
Response Filed

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

3-4
Expected OA Rounds
81%
Grant Probability
88%
With Interview (+6.8%)
2y 2m
Median Time to Grant
High
PTA Risk
Based on 1125 resolved cases by this examiner. Grant probability derived from career allow rate.

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