Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 103
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 1,5, 11,15, and 17-18 are rejected under 35 U.S.C. 103 as being unpatentable over Kwak et al (2021/0036087) hereinafter, Kwak in view of Shin et al 20170154945, hereinafter, Shin.
In regards to claim 1, Kwak teaches a display device comprising (abstract):
A display apparatus includes: a plurality of pixel circuits at a display area, the display area having a non-quadrangular shape; a first signal line extending on the display area in a first direction, and electrically connected to a first pixel circuit from among the plurality of pixel circuits; a first voltage line extending on the display area in the first direction; a first load compensation capacitor adjacent to an end portion of the first signal line and an end portion of the first voltage line; a test circuit outside the display area; an output line electrically connected to the test circuit; and a connection portion configured to electrically connect the output line, the first signal line, and an electrode of the first load compensation capacitor to each other.
a first display area including a plurality of data lines extending in a first direction (fig. 5a data lines extending down in the center)(fig. 1 DL);Examiner notes the “display area” is merely a label.
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a second display area at one side of the first display area, comprising a plurality of data lines shorter than the data lines of the first display area (fig. 5a area to the left data lines are shorter than center section, see annotated drawing below);
a first non-display area adjacent to the first display area (fig. 2 non-display area below center area); and
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a second non-display area adjacent to the second display area, comprising a plurality of load matching units respectively connected to the plurality of data lines of the second display area and configured to compensate for load capacitance of the plurality of data lines of the second display area (fig. 5b CML in second non-display area).[138-139]
[0139] The load matching portion CLM may include one or more load compensation capacitors Clm, for example. As described above, each column of a circuit group PUCL may include three pixel circuit columns PCCLs. In this case, as shown in an enlarged portion view of FIG. 5B, the load matching portion CLM includes three load compensation capacitors Clm, each of the load compensation capacitors Clm corresponding to one of the pixel circuit columns PCCL of a corresponding column of the circuit group PUCL. The load compensation capacitors Clm may compensate for the load difference described above corresponding to each pixel circuit column PCCL.
Kwak fails to teach wherein the load matching units includes a plurality of compensation capacitors arranged in a line, and a length of the load matching units is proportional to a number of the compensation capacitors.
However, Shin teaches wherein the load matching units includes a plurality of compensation capacitors arranged in a line, and a length of the load matching units is proportional to a number of the compensation capacitors [0054-0057] (fig. 2 (116)).
[0054] If the active area AA is free form, the data lines DL in the active area AA are different lengths depending on their positions. A free form shape may be a shape that is not a square. In particular, a free form shape may be a shape that is not a rectangle. A free form shape may be a circle. For a free form active area, the length of the data lines DL disposed at the center of the active area AA may be different from that of the data lines DL disposed on the outer part of the active area AA. Since the data lines DL in the active area AA are different lengths depending on their positions, the number of pixels connected to each data line DL also differs. The differences in length between the data lines DL may create variations on capacitors. This may bring about problems like non-uniform luminance, thereby degrading the display quality of the display device.
[0055] To prevent this, the bezel area BZ may have a compensating capacitor 116. As illustrated in the drawing, the compensating capacitor 116 may be formed in the reference voltage routing part 113. However, the present invention is not limited thereto, and the compensating capacitor 116 may be formed by the overlapping of first and second capacitor electrodes, with at least one insulating layer in between. The first capacitor electrode is electrically connected to the data lines DL in the active area AA. If the compensating capacitor 116 is formed in the reference voltage routing part 113, the second capacitor electrode may be a REF routing line.
[0056] The compensating capacitor 116 may be a dual capacitor that runs vertically. A first capacitor may be formed in the upper part of the compensating capacitor 116 by the overlapping of the first and second capacitor electrodes, and a second capacitor may be formed in the lower part of the compensating capacitor 116 by the overlapping of the first capacitor electrode and a third capacitor electrode. The third capacitor electrode may be an electrode to which scan pulses supplied from the gate drive circuit 120 adjacent to it are applied.
[0057] A plurality of compensating capacitors 116 may be provided if necessary. At least one of the compensating capacitors 116 may have a different capacitance value from another one. That is, the compensating capacitors 116 may have a proper capacitance value that can compensate for variations depending on the length of the corresponding data line DL.
It would have been obvious to one of ordinary skill in the art to modify the teachings of Kwak to further include wherein the load matching units includes a plurality of compensation capacitors arranged in a line, and a length of the load matching units is proportional to a number of the compensation capacitors as taught by Shin in order to provide for uniform luminance. [0054]
In regards to claim 15, Kwak teaches a display device comprising (abstract):
a first display area including a plurality of data lines extending in a first direction (fig. 1 DL) first direction);
a second display area at one side of the first display area, comprising a plurality of data lines extending in the first direction, the second display area having a width smaller than a width of the first display area in the first direction; and (fig. 5a and 5b DA2 annotated below. Examiner note currently the “second display area” is merely a label).
a non-display area surrounding the first and second display areas (fig. 5b non-display surrounding display area),
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wherein the non-display area comprises a plurality of load matching units including a plurality of compensation capacitors respectively connected to the plurality of data lines of the second display area. (fig. 5b CML in second non-display area).[138-139]
Kwak fails to teach wherein the plurality of compensation capacitors are arranged in a line, and a length of the load matching units is proportional to a number of the compensation capacitors.
However, Shin teaches wherein the plurality of compensation capacitors are arranged in a line, and a length of the load matching units is proportional to a number of the compensation capacitors.[0054-0057] (fig. 2 (116))..
It would have been obvious to one of ordinary skill in the art to modify the teachings of Kwak to further include wherein the plurality of compensation capacitors are arranged in a line, and a length of the load matching units is proportional to a number of the compensation capacitors as taught by Shin in order to provide for uniform luminance. [0054]
In regards to claim 18, Kwak teaches display device comprising (abstract):
a first display area including a plurality of data lines extending in a first direction (fig. 5a data lines extending down in the center)(fig. 1 DL) and fig. 5b center display area);
a second display area at one side of the first display area, comprising a plurality of data lines shorter than the data lines of the first display area; (fig. 5b (DA2))
a first non-display area adjacent to the first display area, comprising a first circuit part; (fig. 5b area above DA1)
a second non-display area adjacent to the second display area, comprising a second circuit part and a plurality of load matching units between the second circuit part and the second display area and connected to each of the plurality of data lines of the second display area;(fig. 5b non-display area above DA2)[130-138]
and a third non-display area adjacent to the second display area and the second non-display area, comprising a third circuit part(fig. 5b non-display area to left of DA2 containing CLM)).
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Kwak fails to teach wherein the load matching units includes a plurality of compensation capacitors arranged in a line, and a length of the load matching units is proportional to a number of the compensation capacitors.
However, Shin teaches wherein the load matching units includes a plurality of compensation capacitors arranged in a line, and a length of the load matching units is proportional to a number of the compensation capacitors [0054-0057] (fig. 2 (116)).
It would have been obvious to one of ordinary skill in the art to modify the teachings of Kwak to further include wherein the load matching units includes a plurality of compensation capacitors arranged in a line, and a length of the load matching units is proportional to a number of the compensation capacitors as taught by Shin in order to provide for uniform luminance. [0054]
In regards to claim 5, Kwak in view of Shin teaches (Currently amended) the display device of claim [[4,]] 1, wherein the second display area further comprises a driving voltage line extending in parallel with a data line from among the data lines, each of the plurality of compensation capacitors includes: a first capacitor electrode electrically connected to the data line; and a second capacitor electrode electrically connected to the driving voltage line [0053-0037] (fig. 2 and fig. 5 (116))Shin.
In regards to claim 11, Kwak in view of Shin teaches the display device of claim 1, further comprising a third non-display area adjacent to the second display area and the second non-display area, and including a third circuit part (fig. 5a and 5b right side of display and corresponding circuits))) Kwak.
In regards to claim 17, Kwak in view of Shin teaches the display device of claim 15, wherein the second display area further comprises a driving voltage line extending in parallel with the data lines (fig. 8 DL and PL) Kwak, and each of the plurality of compensation capacitors includes: a first capacitor electrode electrically connected to the data line; and a second capacitor electrode electrically connected to the driving voltage line [162-167,173-180] (fig. 8 CLM, DL and LPL) Kwak
Claim(s) 7-8 is/are rejected under 35 U.S.C. 103 as being unpatentable over Kwak and Shin in view of Bae et al (2019/0181211) hereinafter, Bae
In regards to claim 7, Kwak and Shin teaches the display device of claim 1, wherein the first non-display area comprises: a pad portion (fig. 2 pad Kwak);
Kwak and Shin fails to expressly show a plurality of first fan-out lines connected to the pad portion;
However, Bae teaches a plurality of first fan-out lines connected to the pad portion (fig. 4 (pad and fan out).
It would have been obvious to one of ordinary skill in the art to modify the teachings of Kwak to further include a plurality of first fan-out lines connected to the pad portion as taught by Bae in order to provide signals to the display and address a display.
Therefore, Kwak and Shin in view of Bae teaches and a first circuit part ((fig. 7 demux circuit) Bae) connected between the plurality of first fan-out lines and the plurality of data lines (fig. 7 DA and fanout) Bae), and the second non-display area comprises: a plurality of second fan-out lines connected to the pad portion (fig. 6 (fanout for second))Kwak; a second circuit part connected to the plurality of second fan-out lines (fig. 6 fanout); and a plurality of lead lines connected between the second circuit part and the second display area.(fig. 6 leads from 210 and 170s) Kwak and fig. 7 (demux) Bae.
In regards to claim 8, Kwak and Shin in view of Bae teaches the display device of claim 7, wherein the second circuit part comprises: a demultiplexer configured to output a data voltage received from one of the plurality of second fan-out lines to the plurality of lead lines(fig. 6 leads from 210 and 170s) Kwak and fig. 7 (demux) Bae; and a scan driver configured to generate a scan signal based on a scan control signal received from the pad portion (fig. 1 (120) scan driver) Kwak.
4. Claim(s) 12-14 is/are rejected under 35 U.S.C. 103 as being unpatentable over Kwak and Shin in view of Jung et al 2019/0096978 hereinafter, Jung.
In regards to claim 12, Kwak and Shin teaches the display device of claim 11, wherein the third circuit part comprises: a scan driver configured to generate a scan signal based on a scan control signal (fig. 1 130 scan driver across from 120) Kwak.; and
Kwak and Shin an antistatic circuit configured to remove static electricity flowing from the outside.
However, Jung teaches an antistatic circuit configured to remove static electricity flowing from the outside. (fig. 9 (510-530) Jung).
It would have been obvious to one of ordinary skill in the art to modify the teachings of Kwak and Shin to include an antistatic circuit configured to remove static electricity flowing from the outside as taught by Jung in order to remove static and help prevent damage.
In regards to claim 13, Kwak and Shin in view of Jung teaches, see rational of claim 12, the display device of claim 11, wherein the third circuit part comprises: a plurality of scan drivers configured to generate a scan signal based on a scan control signal (fig. 1 130 and fig. 18 103ss)) Kwak; an antistatic circuit configured to remove static electricity flowing from the outside (fig. 9 (510-530) Jung); and a plurality of load matching units connected to the plurality of data lines of the second display area.(fig. 5b CLMS)) Kwak
In regards to claim 14, Kwak and Shin in view of Jung teaches the display device of claim 13, wherein the plurality of load matching units are between the plurality of scan drivers (fig. 6 clms between 120s on bottom and 120s on top) Kwak.
Response to Arguments
Applicant’s arguments with respect to claim(s) 1-3, and 5-20 have been considered but are moot because the new ground of rejection does not rely on any combination of references applied in the prior rejection of record for any teaching or matter specifically challenged in the argument. Examiner notes previously canceled claim 4 depended on claim 2.
Allowable Subject Matter
Claims 2-3, 6, 9-10,16 and 19-20 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
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/GRANT SITTA/Primary Examiner, Art Unit 2622
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