Prosecution Insights
Last updated: July 17, 2026
Application No. 18/235,639

DISPLAY PANEL AND DISPLAY DEVICE

Final Rejection §102
Filed
Aug 18, 2023
Priority
Apr 12, 2023 — CN 202310396404.6
Examiner
RAMOS-DIAZ, FERNANDO JOSE
Art Unit
2818
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Wuhan Tianma Micro-Electronics Co., Ltd.
OA Round
2 (Final)
81%
Grant Probability
Favorable
3-4
OA Rounds
4m
Est. Remaining
85%
With Interview

Examiner Intelligence

Grants 81% — above average
81%
Career Allowance Rate
13 granted / 16 resolved
+13.3% vs TC avg
Minimal +3% lift
Without
With
+3.3%
Interview Lift
resolved cases with interview
Typical timeline
3y 3m
Avg Prosecution
23 currently pending
Career history
58
Total Applications
across all art units

Statute-Specific Performance

§103
58.2%
+18.2% vs TC avg
§102
38.3%
-1.7% vs TC avg
§112
3.6%
-36.4% vs TC avg
Black line = Tech Center average estimate • Based on career data from 16 resolved cases

Office Action

§102
DETAILED ACTION/EXAMINER’S COMMENT This Office action responds to the amendments filed on 02/27/2026. Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . In the event the determination of the status of the application as subject to AIA is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for a rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. Amendment Status Applicant’s response filed on 02/27/2026 in reply to the non-final rejection mailed on 01/06/2026, has been entered. The present Office action is made with all previously suggested amendments being fully considered. Accordingly, pending in this Office action are claims 1, 2, 4, 5, 6, 7, 9, 10, 11, 12, & 15-19. Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention. Claims 1, 2, 4, 10, 11, 12, 15, 16, 17, & 19 are rejected under 35 U.S.C. 102(a)(2) as being anticipated by Kim (US 20230337497). Regarding Claim 1, Kim (see, e.g., fig. 1a, fig. 3, annotated figure 1) shows a display panel, comprising: a display area AA and a non-display area NA; a wire routing area (see, e.g., annotated figure 1), located in the non-display area; a base substrate 110, a first insulating layer 190 (see, e.g., para.0085) and a first metal layer 180 (see, e.g., para.0049, para.0084), wherein the first metal layer is located between the first insulating layer and the base substrate; and the first insulating layer comprises a first via hole 211 located in the wire routing area and exposing at least part of the first metal layer; and a second insulating layer 170, located between the first metal layer and the base substrate, wherein the second insulating layer is in contact with the first metal layer wherein; in the wire routing area, along a thickness direction of the display panel, a distance from a side surface of the second insulating layer 170 away from the base substrate to a side surface of the base substrate close to the second insulating layer being D1 (see, e.g., annotated figure 1); and in the display area, along the thickness direction of the display panel, a distance from the side surface of the second insulating layer away from the base substrate to the side surface of the base substrate close to the second insulating layer being D2 (see, e.g., annotated figure 1), wherein D1>D2>0 (see, e.g., annotated figure 1). PNG media_image1.png 618 961 media_image1.png Greyscale Regarding Claim 2, Kim (see, e.g., fig. 3, para.0080-0081) shows the display panel according to claim 1, further comprising: a first metal spacer 160 located in the wire routing area, wherein the first metal spacer is arranged between the second insulating layer 170 and the base substrate 110. Regarding Claim 4, Kim (see, e.g., fig. 1a, annotated figure 2, para.0040, para.0067) shows the display panel according to claim 1, wherein: the non-display area further comprises a bending area (see, e.g., annotated figure 2), the wire routing area being located between the bending area and the display area (see, e.g., annotated figure 2); and the first metal layer comprises a first binding wire 180 or 210 (see, e.g., fig.1b, para.0098), at least part of the first binding wire being located in the bending area (see, e.g., fig. 1b); PNG media_image2.png 603 1118 media_image2.png Greyscale Regarding Claim 10, Kim (see, e.g., fig. 3) shows the display panel according to claim 2, wherein: along the thickness direction of the display panel, the first metal spacer 160 at least partially overlaps with the first via hole 211. Regarding Claim 11, Kim (see, e.g., fig. 3) shows the display panel according to claim 2, wherein: along the thickness direction of the display panel, at least a part of the first metal spacer 160 does not overlap with the first via hole 211. Regarding Claim 12, Kim (see, e.g., annotated figure 1) shows the display panel according to claim 11, wherein: in the wire routing area, along the thickness direction of the display panel, a distance from the side surface of the second insulating layer, covering the first metal spacer and away from the base substrate, to the side surface of the base substrate, close to the second insulating layer, being D11 (see, e.g., annotated figure 1); and in the wire routing area, along the thickness direction of the display panel, a distance from the side surface of a part of second insulating layer not covering the first metal spacer and away from the base substrate to the side surface of the base substrate close to the second insulating layer being D12(see, e.g., annotated figure 1), wherein D11> D12 > 0 (see, e.g., annotated figure 1). Regarding Claim 15, Kim (see, e.g., fig. 1a, fig. 3, annotated figure 1) shows a display device, including a display panel, the display panel comprising: a display area AA and a non-display area NA; a wire routing area (see, e.g., annotated figure 1), located in the non-display area; a base substrate 110, a first insulating layer 190 (see, e.g., para.0085) and a first metal layer 180 (see, e.g., para.0049, para.0084), wherein the first metal layer is located between the first insulating layer and the base substrate; and the first insulating layer 211 comprises a first via hole located in the wire routing area and exposing at least part of the first metal layer; and a second insulating layer 170, located between the first metal layer and the base substrate, wherein the second insulating layer is in contact with the first metal layer, wherein; in the wire routing area, along a thickness direction of the display panel, a distance from a side surface of the second insulating layer away from the base substrate to a side surface of the base substrate close to the second insulating layer being D1 (see, e.g., annotated figure 1); and in the display area, along the thickness direction of the display panel, a distance from the side surface of the second insulating layer away from the base substrate to the side surface of the base substrate close to the second insulating layer being D2 (see, e.g., annotated figure 1), wherein D1>D2>0 (see, e.g., annotated figure 1). Regarding Claim 16, Kim (see, e.g., fig. 3, para.0080-0081) shows the display device according to claim 15, further comprising: a first metal spacer 160 located in the wire routing area, wherein the first metal spacer is arranged between the second insulating layer 170 and the base substrate 110. Regarding Claim 17, Kim (see, e.g., fig. 1a, annotated figure 2, para.0040, para.0067) shows the display device according to claim 15, wherein: the non-display area further comprises a bending area (see, e.g., annotated figure 2), the wire routing area being located between the bending area and the display area (see, e.g., annotated figure 2); the first metal layer comprises a first binding wire 180 or 210 (see, e.g., fig. 1b, para.0098), at least part of the first binding wire being located in the bending area (see, e.g., fig. 1b); Regarding Claim 19, Kim (see, e.g., fig. 3) shows the display device according to claim 16, wherein: along the thickness direction of the display panel, at least a part of the first metal spacer 160 does not overlap with the first via hole 211. Allowable Subject Matter Claim 18 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. Claim 5 is allowed. The following is an examiner’s statement of reasons for allowance: Regarding the limitation of claim 5, “a second metal layer located between the second insulating layer and the base substrate, wherein the second insulating layer includes a second via hole located in the non-display area; and the second via hole exposes the second metal layer, wherein the first metal layer and the second metal layer are electrically connected at the second via hole,” the prior art of record (Kim) neither anticipates nor renders obvious the claim. Claims 6, 7, 8, & 9 are allowed as being dependent on allowable claim 5. Any comments considered necessary by applicant must be submitted no later than the payment of the issue fee and, to avoid processing delays, should preferably accompany the issue fee. Such submissions should be clearly labeled “Comments on Statement of Reasons for Allowance.” Response to Arguments Applicant's arguments, see pages 10-12 filed 02/27/2026, with respect to the rejections of claims 1 & 15 under 35 U.S.C. 102 have been fully considered but they are not persuasive. Regarding the amended limitations of claims 1 & 15, “a first via hole located in the wire routing area,” the prior art of record (Kim) does teach the limitations and overcomes the amendments. The rejection of claims 1 & 15 and their dependent claims stands. Applicant’s arguments, see page 10 filed 02/27/2026, with respect to the objection to the drawings have been fully considered and are persuasive. The objection to the drawings has been withdrawn. Conclusion THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to FERNANDO JOSE RAMOS-DIAZ whose telephone number is (571) 270-5855. The examiner can normally be reached Mon-Fri 8am-5pm. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Steven Loke can be reached on 571-272-1657. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /F.R.D./ Examiner, Art Unit 2818 Examiner, Art Unit 2818 /STEVEN H LOKE/Supervisory Patent Examiner, Art Unit 2818
Read full office action

Prosecution Timeline

Aug 18, 2023
Application Filed
Jan 06, 2026
Non-Final Rejection mailed — §102
Feb 27, 2026
Response Filed
Jun 11, 2026
Final Rejection mailed — §102 (current)

Precedent Cases

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

3-4
Expected OA Rounds
81%
Grant Probability
85%
With Interview (+3.3%)
3y 3m (~4m remaining)
Median Time to Grant
Moderate
PTA Risk
Based on 16 resolved cases by this examiner. Grant probability derived from career allowance rate.

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