DETAILED ACTION
This Office action responds to the application filed on 08/21/2023.
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . In the event the determination of the status of the application as subject to AIA is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for a rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-3, 5, & 6, 8, & 9 are rejected under 35 U.S.C. 103 as being unpatentable over Hwang (US 20130234242) in view of Kim (US 20180350611) & Rouh (US 20100330801).
Hwang (see, e.g., para.0042) states figs. 2a-i & figs. 3a-i are cross-sectional views of the embodiment of fig. 1a.
Regarding Claim 1, Hwang (see, e.g., fig. 2i, fig. 3i) shows a semiconductor device comprising:
a substrate 11 (see, e.g., para.0043);
a first bit line 14 (see, e.g., para.0045) extending on the substrate in a first direction;
first and second active patterns 15 & 30 (hereinafter “15/30a” & “15/30b”, see, e.g., annotated figure 1, para.0062) on the first bit line;
a back-gate electrode 33 (hereinafter “33g”, word lines 33 can also serve as gate electrodes, see, e.g., annotated figure 1, para.0066) between the first and second active patterns and extending across the first bit line in a second direction that is perpendicular to the first direction;
a first word line 33 (hereinafter “33a”, see, e.g., annotated figure 1, para.0066) extending in the second direction,
wherein the first active pattern is disposed between the first word line and the back-gate electrode;
a second word line 33 (hereinafter “33b”, see, e.g., annotated figure 1, para.0066) extending in the second direction,
wherein the second active pattern is disposed between the second word line and the back-gate electrode;
and a contact pattern 35 (see, e.g., para.0070) connected to each of the first and second active patterns,
Hwang, however, fails to show
wherein the contact pattern includes
an epitaxial growth layer,
a doped polysilicon layer,
and a silicide layer that are stacked on each other in a vertical direction perpendicular to an upper surface of the substrate.
Kim (see, e.g., fig. 5q, para.0109, para.0141-0143), in a similar device to Hwang, teaches a configuration that would reduce contact resistance;
wherein the contact pattern includes
an epitaxial growth layer 29,
a doped polysilicon layer 39,
and a silicide layer 38 that are stacked on each other in a vertical direction perpendicular to an upper surface of the substrate.
It would have been obvious at the time of filing the invention to one of ordinary skill in the art to use said configuration of Kim, in the device of Hwang, to reduce contact resistance.
Hwang, in view of Kim, however, fails to show
and wherein the epitaxial growth layer has a doping concentration gradually varying in the vertical direction.
Rouh (see, e.g., fig. 3, fig. 5, para.0031), in a similar device to Hwang, in view of Kim, teaches a configuration wherein the epitaxial growth layer 240 has a doping concentration gradually varying in the vertical direction would minimize the diffusion of the impurities into other regions.
It would have been obvious at the time of filing the invention to one of ordinary skill in the art to the gradual doping concentration of Rouh, in the epitaxial growth layer 29 of the device of Hwang, in view of Kim, to minimize the diffusion of the impurities into other regions.
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Regarding Claim 2, Hwang, in view of Kim & Rouh, shows the semiconductor device of claim 1,
wherein each of the first and second active patterns includes a monocrystalline semiconductor material (see, e.g., para.0048, para.0055),
and wherein the epitaxial growth layer of the contact pattern contacts the first and second active patterns (see, e.g., fig. 2i).
Regarding Claim 3, Hwang, in view of Kim & Rouh, shows the semiconductor device of claim 2,
wherein the doping concentration of the epitaxial growth layer 29 gradually decreases away from the doped polysilicon layer (see, e.g., annotated figure 2).
The modification of the epitaxial growth layer 29 in view of Rouh decreases the doping concentration downward away from the doped polysilicon layer 39.
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Regarding Claim 5, Hwang, in view of Kim & Rouh, shows the semiconductor device of claim 3,
wherein a type of a dopant in the epitaxial growth layer 29 (n-type dopant, see, e.g., para.0109) is the same as a type of a dopant in the doped polysilicon layer 39 (phosphorus n-type dopant, see, e.g., para.0143).
Regarding Claim 6, Hwang, in view of Kim & Rouh, shows the semiconductor device of claim 5,
wherein the epitaxial growth layer 29 is a silicon (Si) epitaxial growth layer (see, e.g., para.0109),
and wherein the dopant of the epitaxial growth layer is an n-type dopant (phosphorus n-type dopant, see, e.g., para.0143).
Regarding Claim 8, Hwang (see, e.g., para.0069), in view of Kim (see, e.g., para.0141) & Rouh, shows the semiconductor device of claim 1, further comprising:
a data storage pattern 36 (see, e.g., para.0069) connected to the contact pattern;
and a landing pad 37 (see, e.g., para.0141) disposed between the contact pattern and the data storage pattern.
Regarding Claim 9, Hwang, in view of Kim (see, e.g., fig. 5q) & Rouh, shows the semiconductor device of claim 8,
wherein the landing pad 38 contacts the silicide layer 38 (see, e.g., fig. 5q) of the contact pattern.
Claim 4 is rejected under 35 U.S.C. 103 as being unpatentable over Hwang (US 20130234242) in view of Kim (US 20180350611) & Rouh (US 20100330801) and further in view of Chen (US 20130292799).
Regarding Claim 4, Hwang, in view of Kim & Rouh, shows the semiconductor device of claim 3,
Hwang, in view of Kim & Rouh, however, fails to show
wherein a lower region of the epitaxial growth layer contacts each of the first and second active patterns,
and wherein the lower region of the epitaxial growth layer is an undoped region.
Chen (see, e.g., fig. 6, para.0019), in a similar device to Hwang, in view of Kim & Rouh, teaches a configuration wherein an epitaxial growth layer 17 has a lower undoped region 171 would reduce the leakage of charge throughout transistors.
It would have been obvious at the time of filing the invention to one of ordinary skill in the art to use the epitaxial growth layer having a lower undoped region of Chen in the device of Hwang, in view of Kim & Rouh to reduce the leakage of charge throughout the transistor.
Claim 7 is rejected under 35 U.S.C. 103 as being unpatentable over Hwang (US 20130234242) in view of Kim (US 20180350611) & Rouh (US 20100330801) and further in view of Iwamatsu (US 5656842).
Regarding Claim 7, Hwang, in view of Kim & Rouh, shows the semiconductor device of claim 1,
wherein each of the first and second active patterns comprises:
a source/drain region 15 & 23 (see, e.g., para.0056) adjacent to the contact pattern;
and a channel region 24 (see, e.g., fig. 2i, para.0056) adjacent to the first and second word lines,
Hwang, in view of Kim & Rouh, however, fails to show
and wherein a doping concentration of the source/drain region is greater than a doping concentration of the channel region.
Iwamatsu (see, e.g., pg. 31, col. 17, ll. 50-61, fig. 16), in a similar device to Hwang, in view of Kim & Rouh, teaches that a doping concentration of the source/drain region greater than a doping concentration of the channel region would achieve a higher breakdown voltage and reduce parasitic resistance.
It would have been obvious at the time of filing the invention to one of ordinary skill in the art to use the doping concentration of the source/drain region greater than a doping concentration of the channel region of Iwamatsu in the device of Hwang, in view of Kim & Rouh, to achieve a higher breakdown voltage and reduce parasitic resistance.
Claim 11 is rejected under 35 U.S.C. 103 as being unpatentable over Hwang (US 20130234242) in view of Kim (US 20180350611) & Chen (US 20130292799) and further in view of Rouh (US 20100330801).
Regarding Claim 11, Hwang (see, e.g., fig. 2i) shows a semiconductor device comprising:
a substrate 11 (see, e.g., para.0043);
a bit line 14 (see, e.g., para.0045) extending on the substrate in a first direction;
first and second active patterns 15 & 30 (hereinafter “15/30a” & “15/30b”, see, e.g., annotated figure 3, para.0062) on the bit line;
a back-gate electrode 33 (hereinafter “33g”, word lines 33 can also serve as gate electrodes, see, e.g., annotated figure 3, para.0066) between the first and second active patterns and extending across the bit line in a second direction that is perpendicular to the first direction;
a first word line 33 (hereinafter “33a”, see, e.g., annotated figure 3, para.0066) extending in the second direction at a first side of the first active pattern;
a second word line 33 (hereinafter “33b”, see, e.g., annotated figure 3, para.0066) extending in the second direction at a second side of the second active pattern;
and a contact pattern 35 (see, e.g., para.0070) connected to each of the first and second active patterns,
Hwang, however, fails to show
wherein the contact pattern comprises
an undoped epitaxial growth layer,
a doped epitaxial growth layer,
and a silicide layer that are stacked on each other in a vertical direction perpendicular to an upper surface of the substrate,
wherein a doping concentration of the doped epitaxial growth layer gradually increases away from the undoped epitaxial growth layer.
Kim (see, e.g., fig. 5q, para.0109, para.0141-0143), in a similar device to Hwang, teaches a configuration that would reduce contact resistance;
wherein the contact pattern includes
a doped epitaxial growth layer 29,
and a silicide layer 38 that are stacked on each other in a vertical direction perpendicular to an upper surface of the substrate.
It would have been obvious at the time of filing the invention to one of ordinary skill in the art to use said configuration of Kim, in the device of Hwang, to reduce contact resistance.
Hwang, however, fails to show
wherein the contact pattern comprises
an undoped epitaxial growth layer,
Chen (see, e.g., fig. 6, para.0018-0019), in a similar device to Hwang, in view of Kim & Rouh, teaches a configuration wherein a contact pattern comprises both a doped epitaxial growth layer 172 and an undoped epitaxial growth layer 171 would reduce the leakage of charge throughout transistors.
It would have been obvious at the time of filing the invention to one of ordinary skill in the art to use the configuration comprising a doped and an undoped epitaxial growth layer of Chen in the device of Hwang, in view of Kim to reduce the leakage of charge throughout the transistor.
Hwang, in view of Kim & Chen, however, fails to show
and wherein a doping concentration of the doped epitaxial growth layer gradually increases away from the undoped epitaxial growth layer.
Rouh (see, e.g., fig. 3, fig. 5, para.0031), in a similar device to Hwang, in view of Kim & Chen, teaches a configuration wherein the epitaxial growth layer 240 has a doping concentration gradually varying in the vertical direction would minimize the diffusion of the impurities into other regions.
It would have been obvious at the time of filing the invention to one of ordinary skill in the art to the gradual doping concentration of Rouh, in the epitaxial growth layer of the device of Hwang, in view of Kim & Chen, to minimize the diffusion of the impurities into other regions.
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Claim 13 is rejected under 35 U.S.C. 103 as being unpatentable over Hwang (US 20130234242) in view of Kim (US 20180350611), Chen (US 20130292799), Rouh (US 20100330801), and further in view of Iwamatsu (US 5656842).
Regarding Claim 13, Hwang, in view of Kim & Chen and further in view of Rouh, shows the semiconductor device of claim 11,
wherein each of the first and second active patterns comprises:
a source/drain region 15 & 23 (see, e.g., para.0056) adjacent to the contact pattern;
and a channel region 24 (see, fig. 2i, para.0056) adjacent to the first and second word lines,
Hwang, in view of Kim & Chen and further in view of Rouh, however, fails to show
and wherein a doping concentration of the source/drain region is greater than a doping concentration of the channel region.
Iwamatsu (see, e.g., pg. 31, col. 17, ll. 50-61, fig. 16), in a similar device to Hwang, in view of Kim & Chen and further in view of Rouh, teaches that a doping concentration of the source/drain region greater than a doping concentration of the channel region would achieve a higher breakdown voltage and reduce parasitic resistance.
It would have been obvious at the time of filing the invention to one of ordinary skill in the art to use the doping concentration of the source/drain region greater than a doping concentration of the channel region of Iwamatsu in the device of Hwang, in view of Kim & Chen and further in view of Rouh, to achieve a higher breakdown voltage and reduce parasitic resistance.
Claims 16, 17, & 20 are rejected under 35 U.S.C. 103 as being unpatentable over Hwang (US 20130234242) in view of Kim (US 20180350611) & Chen (US 20130292799) and further in view of Rouh (US 20100330801).
Regarding Claim 16, Hwang shows a semiconductor device comprising:
a substrate 11 (see, e.g., para.0043);
a first bit line 14 (hereinafter “14a”, see, e.g., para.0045) extending on the substrate in a first direction;
a second bit line 14 (hereinafter “14b”, see, e.g., para.0045) adjacent to the first bit line;
a gap structure 12 (see, e.g., para.0037) disposed in a space between the first and second bit lines and extending in the first direction;
first and second active patterns 15 & 30 (hereinafter “15/30a” & “15/30b”, see, e.g., annotated figure 4, para.0062) alternately arranged on the first bit line in the first direction;
a back-gate electrode 33 (hereinafter “33g”, word lines 33 can also serve as gate electrodes, see, e.g., annotated figure 4, para.0066) between the first and second active patterns and extending across the first bit line in a second direction that is perpendicular to the first direction;
a first word line 33 (hereinafter “33a”, see, e.g., annotated figure 4, para.0066) neighboring the first active pattern and extending in the second direction;
a second word line 33 (hereinafter “33b”, see, e.g., annotated figure 4, para.0066) neighboring the second active pattern and extending in the second direction;
a gate insulating pattern 34 (see, e.g., fig. 2i, para.0068) between the first and second active patterns and the first and second word lines;
a back-gate insulating pattern 34 (see, e.g., fig. 2i, para.0064) between the back-gate electrode and each of the first and second active patterns;
a contact pattern 35 (see, e.g., para.0070) connected to each of the first and second active patterns;
a landing pad on the contact pattern;
and a data storage pattern 36 (see, e.g., para.0069) connected to the landing pad,
Hwang, however, fails to show
a landing pad on the contact pattern
and the data storage pattern connected to the landing pad,
wherein the contact pattern comprises
an undoped epitaxial growth layer,
a doped epitaxial growth layer on the undoped epitaxial growth layer and having a gradually increasing doping concentration,
a doped polysilicon layer on the doped epitaxial growth layer and doped at a higher concentration than a doping concentration of the doped epitaxial growth layer,
and a metal silicide layer on the doped polysilicon layer,
Kim (see, e.g., fig. 5q, para.0109, para.0141-0143, para.0145), in a similar device to Hwang, teaches a configuration that would reduce contact resistance;
a landing pad 37 on the contact pattern
and the data storage pattern 41 connected to the landing pad,
wherein the contact pattern includes
a doped epitaxial growth layer 29,
a doped polysilicon layer on the doped epitaxial layer and doped at a higher concentration than a doping concentration of the doped epitaxial growth layer
and a metal silicide layer 38 on the doped polysilicon layer.
It would have been obvious at the time of filing the invention to one of ordinary skill in the art to use said configuration of Kim, in the device of Hwang, to reduce contact resistance.
Hwang, in view of Kim, however, fails to show
the doped epitaxial growth layer on the undoped epitaxial growth layer and having a gradually increasing doping concentration
Rouh (see, e.g., fig. 3, fig. 5, para.0031), in a similar device to Hwang, in view of Kim, teaches a configuration wherein the epitaxial growth layer 240 has a doping concentration gradually varying in the vertical direction would minimize the diffusion of the impurities into other regions.
It would have been obvious at the time of filing the invention to one of ordinary skill in the art to the gradual doping concentration of Rouh, in the epitaxial growth layer 29 of the device of Hwang, in view of Kim, to minimize the diffusion of the impurities into other regions.
Hwang, in view of Kim & Rouh, however, fails to show
wherein the contact pattern comprises
an undoped epitaxial growth layer,
Chen (see, e.g., fig. 6, para.0018-0019), in a similar device to Hwang, in view of Kim & Rouh, teaches a configuration wherein a contact pattern comprises both a doped epitaxial growth layer 172 and an undoped epitaxial growth layer 171 would reduce the leakage of charge throughout transistors.
It would have been obvious at the time of filing the invention to one of ordinary skill in the art to use the configuration comprising a doped and an undoped epitaxial growth layer of Chen in the device of Hwang, in view of Kim to reduce the leakage of charge throughout the transistor.
Regarding Claim 17, Hwang in view of Kim & Rouh and further in view of Chen, shows the semiconductor device of claim 16,
wherein a type of a dopant in the doped epitaxial growth layer 29 (n-type dopant, see, e.g., para.0109) is the same as a type of a dopant in the doped polysilicon layer 39 (phosphorus n-type dopant, see, e.g., para.0143),
and wherein the doping concentration of the doped epitaxial growth layer 29 gradually decreases away from the doped polysilicon layer (see, e.g., annotated figure 2).
The modification of the epitaxial growth layer 29 in view of Rouh decreases the doping concentration downward away from the doped polysilicon layer 39.
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Regarding Claim 20, Hwang, in view of Kim (see, e.g., para.0109, para.0141-0142) & Rouh and further in view of Chen (see, e.g., para.0019), shows the semiconductor device of claim 16,
wherein each of the undoped epitaxial growth layer 171 (see, e.g., para.0019) and the doped epitaxial growth layer 29 (see, e.g., para.0109) in the contact pattern is a silicon (Si) epitaxial growth layer,
and wherein the metal silicide layer in the contact pattern is a cobalt (Co) silicide layer (see, e.g., para.0142).
Claim 18 is rejected under 35 U.S.C. 103 as being unpatentable over Hwang (US 20130234242) in view of Kim (US 20180350611), Chen (US 20130292799), Rouh (US 20100330801), and further in view of Ahn (US 20180182861).
Regarding Claim 18, Hwang, in view of Kim, Chen, & Rouh, shows the semiconductor device of claim 17,
Hwang, in view of Kim, Chen, & Rouh, however, fail to show
wherein the doping concentration of the doped epitaxial growth layer is about 3×1020/㎤ near the doped polysilicon layer,
and wherein the doping concentration of the doped epitaxial growth layer is about 2.5×1019/㎤ near the undoped epitaxial growth layer.
However, ranges of doping concentration will not support the patentability of subject matter encompassed by the prior art unless there is evidence indicating such ranges are critical. “Where the general conditions of a claim are disclosed in the prior art, it is not inventive to discover the workable ranges by routine experimentation” In re Aller, 220 F.2d 454,456,105 USPQ 233, 235 (CCPA 1955).
Ahn (see, e.g., para.0065), in a similar device to Hwang, in view of Kim, Cho, and Fujimoto, teaches a range from 1.0 x 1019/cm3 to 1.0 x 1022/cm3. Since the applicant has not established the criticality (see next paragraph below) of the claimed range, and said claimed ranges are within a range that has been used in the art, it would have been obvious to one of ordinary skill in the art to use the ranges of Ahn in the device of Hwang, in view of Kim, Cho, and Fujimoto, as an obvious doping concentration.
Criticality
The specification contains no disclosure of either the critical nature of the claimed temperature and pressure ranges or any unexpected results arising therefrom. Where patentability is said to be based upon particular chosen dimensions or upon another variable recited in a claim, the applicant must show that the chosen dimensions are critical. In re Woodruff, 919 F.2d 1575, 1578, 16 USPQ2d 1934, 1936 (Fed. Cir. 1990).
Claim 19 is rejected under 35 U.S.C. 103 as being unpatentable over Hwang (US 20130234242) in view of Kim (US 20180350611), Chen (US 20130292799), Rouh (US 20100330801), and further in view of Iwamatsu (US 5656842).
Regarding Claim 19, Hwang, in view of Kim, Chen, & Rouh, shows the semiconductor device of claim 16,
wherein each of the first and second active patterns includes a monocrystalline semiconductor material (see, e.g., para.0048),
wherein each of the first and second active patterns comprises:
a source/drain region 15 & 23 (see, e.g., para.0056) adjacent to the contact pattern;
and a channel region 24 (see, e.g., fig. 2i, para.0056) adjacent to the first and second word lines,
Hwang, in view of Kim, Chen, & Rouh, however, fails to show
and wherein a doping concentration of the source/drain region is greater than a doping concentration of the channel region.
Iwamatsu (see, e.g., pg. 31, col. 17, ll. 50-61, fig. 16), in a similar device to Hwang, in view of Kim & Rouh, teaches that a doping concentration of the source/drain region greater than a doping concentration of the channel region would achieve a higher breakdown voltage and reduce parasitic resistance.
It would have been obvious at the time of filing the invention to one of ordinary skill in the art to use the doping concentration of the source/drain region greater than a doping concentration of the channel region of Iwamatsu in the device of Hwang, in view of Kim & Rouh, to achieve a higher breakdown voltage and reduce parasitic resistance.
Allowable Subject Matter
Claim 10 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to FERNANDO JOSE RAMOS-DIAZ whose telephone number is (571) 270-5855. The examiner can normally be reached Mon-Fri 8am-5pm.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Steven Loke can be reached on 571-272-1657. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/F.R.D./ Examiner, Art Unit 2818
Examiner, Art Unit 2818
/STEVEN H LOKE/Supervisory Patent Examiner, Art Unit 2818
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