FINAL REJECTION
Applicants arguments filed 2/24/2026 have been fully considered but they are not persuasive for reasons as detailed below.
Examiner has maintained the prior art rejections, statutory rejections and drawing objections as previously stated and as modified below. Applicants’ amendment necessitated any new grounds of rejection present in this Office action.
The prior art rejections are maintained or modified as follows:
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 1-3, 7 are rejected under 35 U.S.C. 103 as being unpatentable over Bonora et al (US7648327) in view of Kawai et al (US20180047602).
Bonora et al (herein “Bonora”) discloses a “Wafer Engine”. See Figs. 1-32 and respective portions of the specification. Bonora further discloses a wafer handling robot (300) located within an EFEM that transfers wafers between the EFEM and a processing tool enclosure through one or more openings formed in a plate (See at least Col.10 L. 1-45, Figs. 9-10). Bonora discloses that the EFEM and process chamber are integrated within a unified, filtered, environment and that the robot’s movement through one of the openings does not disturb environmental uniformity because the ports are sealed (See at least Col. 12 L. 30-45). Bonora discloses an EFEM including a wafer-handling robot, fan/filter unit, structural frame, and panels enclosing the wafer-handling area between load ports and a process tool. Bonora further teaches that the EFEM is affixed to a tool and transfers workpieces between load port assemblies, prealigners, and the tool. Bonora therefore teaches an EFEM and processing tool coupled together to form an integrated processing environment. To the extent Bonora does not expressly disclose that the EFEM and an internal volume of the processing tool enclosure are in fluid communication via one or more openings in the EFEM. Kawai et al (herein “Kawai”) discloses a “Transfer Chamber”. See Figs. 1-5 and respective portions of the specification. Kawai further discloses a transfer chamber constituted as an EFEM, including a transfer robot, housing, and load ports. Kawai further teaches that a load lock chamber constituting part of processing device (6) is connected adjacent to the rear wall of the transfer chamber, and when door 1a is opened, the inside of the transfer chamber and the load lock chamber communicate with each other. Kawai further teaches that the load lock chamber and processing units communicate with each other when doors 62a and 63a are opened. It would have been obvious to modify Bonora’s integrated EFEM/process tool arrangement to include Kawai’s communicating chamber arrangement so that wafers may be transferred between the EFEM/transfer chamber and processing device while maintaining a clean transfer environment and avoiding exposure to outside air. Kawai expressly teaches transferring wafers in a clean state without exposing them to outside air.
Referring to claims 2. Bonora in view of Kawai disclose the combination as set forth above and applied to claim 1. Bonora doesn’t explicitly disclose wherein the integrated processing environment is maintained at substantially uniform conditions. It would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to maintain the integrated processing environment at substantially uniform conditions because semiconductor wafer transfer environments require controlled clean atmospheres to reduce contamination.
Referring to claim 3. . Bonora in view of Kawai disclose the combination as set forth above and applied to claim 1. Bonora doesn’t disclose wherein the processing environment is maintained at a temperature of between 21 and 25 degrees Celsius, within 0.05 degrees Celsius, and a relative humidity of between 45-55 percent. Kawai teaches that humidity is controlled because excessively low humidity impairs chemical-filter performance and because proper humidity maintains cleanliness. Although Kawai does not expressly disclose the exact claimed ranges of 21–25°C, ±0.05°C, and 45–55% relative humidity. It is generally understood that temperature and humidity are known result-effective variables in semiconductor wafer handling environments. It would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to select the claimed ranges as part of routine optimization of known environmental control parameters to maintain wafer cleanliness, chemical-filter performance, and stable processing conditions.
Referring to claim 7. . Bonora in view of Kawai disclose the combination as set forth above and applied to claim 1. Bonora as discussed above discloses a wafer handling robot (300) located within an EFEM that transfers wafers between the EFEM and a processing tool enclosure through one or more openings formed in a plate (See at least Col.10 L. 1-45, Figs. 9-10). Additionally, Bonora discloses that the EFEM and process chamber are integrated within a unified, filtered, environment and that the robot’s movement through one of the openings does not disturb environmental uniformity because the ports are sealed (See at least Col. 12 L. 30-45). It would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to configure the substrate-handling robot to transfer substrates through the EFEM openings without disturbing the integrated processing environment by using Kawai’s known clean-environment transfer arrangement. The benefit would have been maintaining wafer cleanliness while transferring wafers between the EFEM and processing device.
Claim(s) 4-6 are rejected under 35 U.S.C. 103 as being unpatentable over Bonora et al (US7648327) in view of Kawai (US20180047602) and Hanson et al (US7002698).
Referring to claims 4-6. Bonora in view of Kawai disclose the combination as set forth above as applied to claim 1. Bonora does disclose a remote air module (RAM) coupled to the EFEM and processing tool enclosure to supply air to the EFEM and processing tool enclosure at a particular temperature and relative humidity, wherein air is exhausted from the EFEM and processing tool enclosure to the RAM or wherein air is exhausted from the EFEM to the RAM indirectly through the processing tool enclosure. Hanson et al (“Hanson”) discloses a “Semiconductor Processing Apparatus Having Lift and Tilt Mechanism”. See Figs. 1-42 and respective portions of the specification. Hanson discloses a remote air module (filtered air source) coupled to the processing modules to supply air to the EFEM and processing tool enclosure at a particulate temperature (See Col. 4 L. 45 – Col. 6 L. 20). Hanson further discloses directing clean air from a supply across the EFEM and into the processing module region and toward a downstream filter section. It would have been obvious to a person of ordinary skill in the art to modify the integrated EFEM and processing tool system of Bonora and Kawai to include the external/remote air supply and exhaust system of Hanson, as it would allow for laminar and unidirectional flow that carries contaminants away from the wafers and prevent backflow and to use Hanson’s design to maintain equalized pressure between the EFEM and processing-tool enclosure, to prevent particle migration and to ensure laminar flow remains uniform across chambers/system, while having the air-handling components outside the processing environment would simplify maintenance. Additionally, routing the air to a remote (downstream) air-handling/filtration section, would improve particle evacuation and enable centralized filtration.
Claim(s) 8-14 are rejected under 35 U.S.C. 103 as being unpatentable over of Bonora et al (US7648327).
Referring to claim 8. Bonora discloses the “Wafer Engine” as described above. Bonora further discloses a system comprising: a processing tool comprising a movable stage (300, includes linear rail 302/306, and rotational drive/platform 350); one or more buffer stations positioned near the movable stage (130, Fig. 7); and one or more substate handling robots (300 with end effectors 402, 404) to transfer substates between the one or more buffer stations (load ports) and the movable stage (See at least Figs. 18-20). Likewise, Bonora teaches that a slide body may be adapted to process a wafer and environmentally isolate the wafer, and that end effectors move under a workpiece and lift the workpiece from its resting place. To the extent Bonora does not expressly use the term “movable stage,” providing a movable wafer-supporting stage configured to receive and secure a substrate during processing would have been an obvious implementation of Bonora’s wafer-processing and wafer-transfer arrangement. A movable stage would predictably provide positioning, support, and securement of the wafer during processing.
Referring to claims 9-11. Bonora discloses wherein each robot of the one or more substate handling robots is to transfer a plurality of processed substrates from the movable stage to the one or more buffer stations (load ports) and transfer a plurality of unprocessed substrates from the one or more buffer stations to the movable stage. Bonora doesn’t disclose wherein it is transferred in less than 10 seconds or in one movement. However, Bonora discloses multi-axis positioning by means of a linear, vertical and rotational drive (Abstract, Figs. 18-20). The wafer engine, rail and rotational drive able to position wafers precisely for hand-off or inspection. It would have been obvious to a person of ordinary skill in the art to modify the system of Bonora wherein the transfer was done in less than 10 seconds and in one movement to increase throughput and slow down congestion.
Referring to claim 12. Bonora discloses a plurality of end effectors (402, 404) coupled to an articulating linkage, wherein the articulating linkage comprises one or more direct drive motors (350, 362) to affect movement of the plurality of end effectors, each of the plurality of end effectors to handle an individual substrate (See at least Figs. 18-21).
Referring to claims 13-14. Bonora discloses wherein a friction grip (448) is provided on a surface of each of the plurality of end effectors to secure the individual substrate during movement of the plurality of end effectors. Bonora doesn’t explicitly disclose wherein the friction grip on the surface of each of the plurality of end effectors is to secure the individual substrate with up to 2mm of warpage at up to 1G of force. It should be noted that the pads (448) of Bonora are provided to secure the wafer by applying contact force between opposing sides of the wafer edge. It would have been obvious to design the friction grips/pads to accommodate compliance and protect wafers from becoming warped during high-speed transfer.
Claim(s) 15-20 are rejected under 35 U.S.C. 103 as being unpatentable over of Bonora et al (US7648327) in view of Lill (US20160111309).
Referring to claims 15-20. Bonora discloses a method comprising: transferring, by each of the one or more substrate handling robots, a plurality of processed substrates from a movable stage of a processing tool to a plurality of buffer stations (load ports) positioned near the movable stage (130, Fig. 7); transferring, by each of the one or more substrate handling robots (300 with end effectors 402, 402) (See at least Figs. 18-20), a plurality of unprocessed substrates from the plurality of buffer stations to the movable stage; and performing a photolithography process on the plurality of unprocessed substrates with the processing tool. Bonora further discloses wherein each robot of the one or more substate handling robots is to transfer a plurality of processed substrates from the movable stage to the one or more buffer stations (load ports) and transfer a plurality of unprocessed substrates from the one or more buffer stations to the movable stage. Additionally, Bonora teaches a rapid-swap wafer engine that removes a processed wafer from a process station and places an aligned wafer into the process station using separate paddles/end effectors, thereby reducing swap time and increasing throughput. Bonora doesn’t explicitly disclose transferring, an initial plurality of unprocessed substrates from a substrate storage module to the movable stage, exchanging the initial plurality of unprocessed substrates between two of the one or more substrate handling robots, transferring, by each of the one or more substrate handling robots, another plurality of unprocessed substrates from a substrate storage module to the plurality of buffer stations, wherein the one or more substrate handling robots transfer the another plurality of unprocessed substrates from the substrate storage module to the plurality of buffer stations while the processing tool is performing the photolithography process on the plurality of unprocessed substrates or transferring, by the one or more substrate handling robots, a plurality of processed substrates from the plurality of buffer stations to the substrate storage module. Lill et al (herein “Lill”) discloses an “Equipment Front End Module For Transferring Wafers and Method of Transferring Wafers”. See Figs. 1-7 and respective portions of the specification. Lill further discloses an EFEM (100) and processing tool enclosure and processing wafers within the tool enclosure, where wafers are transferred top processing modules, returning processed wafers from the processing tool enclosure to a second storage module, where wafers are removed from the FOUPS attached to wafer load ports (buffer stations), and wherein the processing tool enclosure can house a various processing modules including etch, deposition, and cleaning chambers. Likewise, Lill discloses wherein at least one robot inside the EFEM transfers wafers between FOUPS, load locks and processing tools and exchanging unprocessed and processed wafers between the EFEM and processing tools (See at least Sect. 0017, 0022-0025). Moreover, Lill discloses an EFEM for transferring semiconductor wafers to and from semiconductor processing modules, including deposition chambers, etch chambers, PVD chambers, CVD chambers, ALD chambers, ion implantation chambers, track chambers, and other semiconductor processing apparatuses used in wafer fabrication. It would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to incorporate the teachings of Lill into the system of Bonora as the wafer-transfer method as disclosed by Lill would allow for robotic efficiency and yield performance improvements.
Response to Arguments
Applicant’s arguments, filed 2/24/2026, with respect to the rejection(s) of claim(s) 1 under 102(A) and claims 2-20 under 103 have been fully considered and are persuasive. Therefore, the rejection has been withdrawn. However, upon further consideration, a new ground(s) of rejection is made in view of Bonora in view Kawali. As stated above Applicants’ amendment necessitated any new grounds of rejection present in this Office action. More specifically, the present rejection does not rely on Lill for the amended fluid-communication limitation. Bonora teaches an EFEM coupled to a process tool and transferring wafers between the EFEM and tool. Kawai teaches that when the door between the EFEM/transfer chamber and processing device load lock chamber is opened, the inside of the transfer chamber and the load lock chamber communicate with each other, and that the processing device chambers communicate through opened doors. Applicant’s argument that the cited art fails to disclose transferring substrates without disturbing the integrated processing environment is also unpersuasive, as Kawai teaches transferring wafers in a clean state without exposing them to outside air, and discloses humidity/gas circulation control to maintain the internal atmosphere. Accordingly, THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to TERRELL HOWARD MATTHEWS whose telephone number is (571)272-5929. The examiner can normally be reached Monday thru Friday; 8:00 AM - 4:30 PM EST.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Michael McCullough can be reached at (571)272-7805. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/TERRELL H MATTHEWS/Primary Examiner, Art Unit 3653
Prosecution Insights