Prosecution Insights
Last updated: April 19, 2026
Application No. 18/237,059

THERMAL SPREADER

Non-Final OA §102§103
Filed
Aug 23, 2023
Examiner
SRINIVASAN, SESHA SAIRAMAN
Art Unit
2812
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
SK Hynix Nand Product Solutions Corp. (Dba Solidigm)
OA Round
1 (Non-Final)
68%
Grant Probability
Favorable
1-2
OA Rounds
3y 7m
To Grant
99%
With Interview

Examiner Intelligence

Grants 68% — above average
68%
Career Allow Rate
19 granted / 28 resolved
At TC average
Strong +53% interview lift
Without
With
+52.9%
Interview Lift
resolved cases with interview
Typical timeline
3y 7m
Avg Prosecution
63 currently pending
Career history
91
Total Applications
across all art units

Statute-Specific Performance

§103
71.4%
+31.4% vs TC avg
§102
21.4%
-18.6% vs TC avg
§112
7.1%
-32.9% vs TC avg
Black line = Tech Center average estimate • Based on career data from 28 resolved cases

Office Action

§102 §103
DETAILED ACTION Notice of AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Election/Restrictions Applicant’s election without traverse of Invention I, direct to Claims 1-13, and 26 in the reply filed on 02/18/2026 is acknowledged and is under consideration. Information Disclosure Statement The Information Disclosure Statement (IDS) submitted on 10/14/2024 is in compliance with provisions of 37 CFR 1.97. Accordingly, the information disclosure is being considered by the Examiner. Response to Amendment The amendment with respect to claims 1-13 filed on 02/18/2026 have been fully considered for examination based on their merits. The previously presented claims 14-25 have been withdrawn based on the election by the applicant mentioned above. Response to Arguments Applicant’s election to claims 1-13, and 26 filed on 02/18/2026, as mentioned above are considered and entered. The non-elected claims 14-25 are hereby withdrawn from further consideration by the Examiner. Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. (a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention. Claim(s) 1-5, 9-10, 13 is/are rejected under 35 U.S.C. 102(a)(1) and (a)(2) as being anticipated by Mohamed Haitham Helmy Nasr et al, (hereinafter NASR), WO 2023141052 A1. Regarding Claim 1, NASR teaches a package (Figs. 1A-1D, integrated circuit assemblies, [0059]) comprising a plurality of layers (annotated Figure 1A), the layers comprising: an external layer (Fig. 1A, 106, cold plate) comprising an external layer outer surface (annotated Figure 1A) and an external layer inner surface (annotated Figure 1A); an interface layer (Fig. 1A, 105, TIM, thermal interface material) comprising an interface layer outer surface (annotated Figure 1A) and an interface layer inner surface (annotated Figure 1A), the interface layer outer surface (annotated Figure 1A) in contact with the external layer inner surface (Fig. 1A, 106, cold plate); a thermal spreader layer (Fig. 1A, 104, heat spreader) comprising a thermal spreader outer surface (annotated Figure 1A) and a thermal spreader inner surface (annotated Figure 1A), the thermal spreader outer surface (annotated Figure 1A) in contact with the interface layer inner surface (annotated Figure 1A); and circuitry (Fig. 1A, 102, integrated circuit (IC)), arranged proximate to and facing the thermal spreader (Fig. 1A, 104, heat spreader) inner surface (annotated Figure 1A). PNG media_image1.png 896 1132 media_image1.png Greyscale Regarding Claim 2, NASR teaches the package (Figs. 1A-1D, integrated circuit assemblies, [0059]) of claim 1, wherein each of the external layer (Fig. 1A, 106, cold plate) and the thermal spreader layer (Fig. 1A, 104, heat spreader) is comprised of thermally-conductive material (Fig. 1A, a fluid can flow through the cold plate for convective heat transfer, [0041]; the TIM 105 can be any suitable material for a thermal interface, such as a thermal paste or pad, [0052]). Regarding Claim 3, NASR teaches the package (Figs. 1A-1D, integrated circuit assemblies, [0059]) of claim 1, wherein the thermal spreader layer (Fig. 1A, 104, heat spreader) further comprises at least one thermally-conductive channel (Fig. 2B, TIM2, second thermal interface material) to transfer heat along the at least one channel (Fig. 2B, TIM2, a cold plate attached to the heat spreader and in thermal communication with the heat spreader via a second thermal interface material, [0016]). Regarding Claim 4, NASR teaches the package (Figs. 1A-1D, integrated circuit assemblies, [0059]) of claim 3, wherein the circuitry (Fig. 1A, 102, integrated circuit (IC)) comprises at least one electrical component (IC components/a semiconductor die, [0046], [0052]), above which the at least one channel (Fig. 2B, TIM1, first thermal interface material (first TIM)) is not arranged to prevent thermal transfer (Figs. 2A/2B, a die is in thermal contact with a lid via a first TIM, [0060]) from the at least one channel (Fig. 2B, TIM1, first thermal interface material (first TIM)) to the at least one electrical component (IC components/a semiconductor die, [0046], [0052]). Regarding Claim 5, NASR teaches the package (Figs. 1A-1D, integrated circuit assemblies, [0059]) of claim 1, wherein the thermal spreader layer (Fig. 1A, 104, heat spreader) further comprises at least one thermally conductive plate (Figs. 2A/2B, Lid, Lid that operate as built-in heat spreaders, [0042]) in thermal contact (Fig. 2A, a die is in thermal contact with a lid via first TIM, [0060]) with at least one thermally conductive channel (Figs. 2A/2B, TIM1, first thermal interface material (first TIM)), each respective thermally conductive plate (Figs. 2A/2B, Lid, Lid that operate as built-in heat spreaders, [0042]) disposed above a respective heat-generating electrical component (Fig. 1A, 102, the heat produced by the IC 102, [0059]). Regarding Claim 9 NASR teaches the package (Figs. 1A-1D, integrated circuit assemblies, [0059]) of claim 1, further comprising a thermal interface material (TIM) (Fig. 8A, TIM 708) disposed between the circuitry (Fig. 8A, 704, IC) and the thermal spreader (Fig. 8A, 709, heat spreader) inner surface (annotated Figure 8A). PNG media_image2.png 757 1138 media_image2.png Greyscale Regarding Claim 10, NASR teaches the package (Figs. 1A-1D, integrated circuit assemblies, [0059]) of claim 1, wherein the circuitry (Fig. 8A, IC 704) comprises a printed circuit board (PCB) (Fig. 8A, 701). Regarding Claim 13, NASR teaches a package (Figs. 1A-1D, integrated circuit assemblies, [0059]) of claim 1, further comprising: a second interface layer (Fig. 2A, TIM2, thermal interface material) comprising a second interface layer outer surface (annotated Figure 2A) and a second interface layer inner surface (annotated Figure 2A), the second interface layer outer surface (annotated Figure 2A) in contact with the thermal spreader layer inner surface (Fig. 2A, heat spreader); and a second thermal spreader layer (Fig. 2A, Lid that operate as built-in heat spreaders, [0042]) comprising a second thermal spreader outer surface (annotated Figure 2A) and a second thermal spreader inner surface (annotated Figure 2A), the second thermal spreader outer surface (annotated Figure 2A) is arranged in contact with the second interface layer inner surface (annotated Figure 2A), and the circuitry (Fig. 2A, die) proximate to and facing the second thermal spreader inner surface (annotated Figure 2A). PNG media_image3.png 1001 861 media_image3.png Greyscale Claim(s) 26 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Ryan Linderman, (hereinafter LINDERMAN), US 20150195956 A1. Regarding Claim 26, LINDERMAN teaches an enclosure (Fig. 2, 102) comprising: housing (Fig. 2, 100, equipment box assembly), wherein the housing (Fig. 2, 100, equipment box assembly) encapsulates a plurality of layers (Fig. 3, multiple layers, [0036]), the plurality of layers comprising: an external layer (Fig. 3, 204, mounting portion of the secondary heat spreader, 114, [0029]) comprising an external layer outer surface (annotated Figure 3) and an external layer inner surface (annotated Figure 3); an interface layer (Fig. 3, 126) comprising an interface layer outer surface (annotated Figure 3) and an interface layer inner surface (annotated Figure 3), the interface layer outer surface (annotated Figure 3) in contact (annotated Figure 3) with the external layer inner surface (annotated Figure 3); PNG media_image4.png 777 1072 media_image4.png Greyscale a thermal spreader layer (Fig. 3, 112, primary heat spreader) comprising a thermal spreader outer surface (annotated Figure 3) and a thermal spreader inner surface (annotated Figure 3), the thermal spreader outer surface (annotated Figure 3) in contact (annotated Figure 3) with the interface layer inner surface (annotated Figure 3); and circuitry (Fig. 3, 108, printed circuit board), arranged proximate to and facing the thermal spreader inner surface (annotated Figure 3). PNG media_image5.png 812 1073 media_image5.png Greyscale Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows: 1. Determining the scope and contents of the prior art. 2. Ascertaining the differences between the prior art and the claims at issue. 3. Resolving the level of ordinary skill in the pertinent art. 4. Considering objective evidence present in the application indicating obviousness or nonobviousness. Claim(s) 6, 11-12 is/are rejected under 35 U.S.C. 103 as being unpatentable NASR, in view of Jorge Rosales et al, (hereinafter ROSALES), US 20180042139 A1. Regarding Claim 6, NASR teaches the package of claim 5. NASR does not explicitly disclose the package, wherein the interface layer further comprises: at least one insulation portion, each respective insulation portion disposed between each respective thermally-conductive plate and the external layer inner surface; and at least one conductive portion, coplanar with the insulation portion, each respective conductive portion disposed between each respective thermal pooling section and the external layer inner surface. ROSALES teaches the package (Fig. 4, 100, electronic device), wherein the interface layer (annotated Figure 5) further comprises: at least one insulation portion (Fig. 5, 510/512/514/516, first/second/third/fourth spacer, thermally conductive adhesive/low conductive material (e.g. insulative material), [0040]), each respective insulation portion (Fig. 5, 510/512/514/516, first/second/third/fourth spacer, thermally conductive adhesive/low conductive material (e.g. insulative material), [0040]) disposed between each respective thermally-conductive plate (Fig. 5, 502/504,506, first/second/third heat spreader layer, [0049]) and the external layer inner surface (Fig. 4, 404, front side surface of a device, 400); and at least one conductive portion (Fig. 5, 520/522/524/526, fist/second/third/fourth PCM, [0062]) coplanar (annotated Figure 5) with the insulation portion (Fig. 5, 510/512/514/516, first/second/third/fourth spacer, thermally conductive adhesive/low conductive material (e.g. insulative material), [0040]), PNG media_image6.png 740 1143 media_image6.png Greyscale each respective conductive portion (Fig. 5, 520/522/524/526, fist/second/third/fourth PCM, [0062]) disposed between each respective thermal pooling section (annotated Figure 4) and the external layer inner surface (Fig. 4, 404, front side surface of a device, 400). PNG media_image7.png 609 1180 media_image7.png Greyscale Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention (AIA ) to have modified NASR to incorporate the teachings of ROSALES, such that the package, wherein the interface layer further comprises: at least one insulation portion, each respective insulation portion disposed between each respective thermally-conductive plate and the external layer inner surface; and at least one conductive portion, coplanar with the insulation portion, each respective conductive portion disposed between each respective thermal pooling section and the external layer inner surface. The above arrangement enables the heat dissipating device that includes a heat spreader layer, PCMs and a spacer provides as much as heat dissipation away from the front side surface of the integrated device, but also limit how much heat is dissipated through the back side of the device (ROSALES, [0087]). Regarding Claim 11, NASR teaches the package of claim 1. NASR does not explicitly disclose the package, further comprising an enclosure encapsulating the plurality of layers, the enclosure comprising the external layer. ROSALES teaches the package (Fig. 4, 100, electronic device), further comprising an enclosure (Fig. 4, 404/406/408/410, front /back/bottom/top side surface cover) encapsulating the plurality of layers (Fig. 4, 420/422/430, PCB/integrated device/heat dissipating device, [0030]), the enclosure (Fig. 4, 404/406/408/410, front /back/bottom/top side surface cover) comprising the external layer (Fig. 4, 402, display (e.g., LCD)). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention (AIA ) to have modified NASR to incorporate the teachings of ROSALES, such that the package, further comprising an enclosure encapsulating the plurality of layers, the enclosure comprising the external layer, so that the above arrangement allows the lowering of the peak temperatures of the front side, the back side, the integrated device, and/or the package of the device (400) (ROSALES, [0030]). Regarding Claim 12, NASR teaches the package of claim 1. NASR does not explicitly disclose the package, wherein a temperature of the external layer remains below a safety and regulatory touch temperature limit. ROSALES teaches the package (Fig. 4, 100, electronic device), wherein a temperature of the external layer remains below a safety and regulatory touch temperature limit (Fig. 4, 400, device, this mechanism allows the lowering of the peak temperatures of the front side, the back side, the integrated device, and/or package of the device, 400, [0005], [0030]). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention (AIA ) to have modified NASR to incorporate the teachings of ROSALES, such that the package, wherein a temperature of the external layer remains below a safety and regulatory touch temperature limit, so that to have an improved method and design for efficiently dissipating heat, while at the same time keeping the temperature of the outer surface of the electronic device within a threshold that is acceptable to a user of the electronic device (ROSALES, [0005]). Claim(s) 7-8 is/are rejected under 35 U.S.C. 103 as being unpatentable over NASR, in view of LINDERMAN. Regarding Claim 7, NASR teaches the package (Figs. 1A-1D, integrated circuit assemblies, [0059]) of claim 1, wherein the thermal spreader layer (Fig. 7A, 709, heat spreader) further comprises: at least one thermally-conductive plate (Fig. 7A, Lid 707, Lid that operate as built-in heat spreaders, [0042]); and NASR does not explicitly disclose the package, wherein the thermal spreader layer further comprises: at least one thermally-conductive plate; and at least one thermal pooling section; each thermal pooling section is in thermal contact with at least one thermally conductive plate and each thermal pooling section is disposed proximate to an edge of the package. LINDERMAN teaches the package (Fig. 3, 100, equipment box assembly), wherein the thermal spreader layer (Fig. 3, 112, primary heat spreader) further comprises: at least one thermally-conductive plate (Fig. 3, 204, mounting portion of the secondary heat spreader, 114, [0029]); and at least one thermal pooling section (Fig. 3, 202/304, high heat dissipation region); wherein: each thermal pooling section (Fig. 3, 202/304, high heat dissipation region) is in thermal contact (annotated Figure 3) with at least one thermally conductive plate (Fig. 3, 204, mounting portion of the secondary heat spreader, 114, [0029]) and each thermal pooling section (Fig. 3, 202/304, high heat dissipation region) is disposed proximate to an edge (annotated Figure 3) of the package (Fig. 3, 100, equipment box assembly). PNG media_image8.png 752 1069 media_image8.png Greyscale Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention (AIA ) to have modified NASR to incorporate the teachings of LINDERMAN, such that the package, wherein the thermal spreader layer further comprises: at least one thermally-conductive plate; and at least one thermal pooling section; each thermal pooling section is in thermal contact with at least one thermally conductive plate and each thermal pooling section is disposed proximate to an edge of the package. The above arrangement wherein the primary heat spreader (112) is disposed between he PCB (108) and the enclosure (102), and the secondary heat spreader (114) is coupled to the exterior of the top of the enclosure (102) such that the high heat dissipation portion (202) is proximate to a high heat dissipation region (304) that is within the enclosure for an effective thermal management (LINDERMAN, [0029], [0005]). Regarding Claim 8, NASR as modified LINDERMAN teaches the package of claim 7. LINDERMAN further teaches the package (Fig. 3, 100, equipment box assembly), further comprising at least one thermally-conductive channel (annotated Figure 3, 114, secondary heat spreader), wherein each thermally-conductive channel (annotated Figure 3, 114, secondary heat spreader) is in thermal contact (annotated Figure 3) with at least one thermally conductive plate (Fig. 3, 204, mounting portion of the secondary heat spreader, 114, [0029]) and at least one thermal pooling section (Fig. 3, 202/304, high heat dissipation region). PNG media_image9.png 731 1067 media_image9.png Greyscale Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. US 20050133907 A1 – Figure 1 STATEMENT OF RELEVANCE – An integrated circuit assembly with heat spreading layer and thermal solution interface layer employing heat transfer mechanisms to combat the ever increasing performance [0017]. US 20170103937 A1 – Figure 15 STATEMENT OF RELEVANCE – A cross-sectional view that shows a packaged semiconductor device that includes a cooling device coupled thereto being coupled to a system part, so that the cooling device may provide improved heat conduction and more effective integrated circuit die transient cooling, [0062]. Any inquiry concerning this communication or earlier communications from the examiner should be directed to SESHA SAIRAMAN SRINIVASAN whose telephone number is (703)756-1389. The examiner can normally be reached Monday-Friday 7:30 AM -5:30 PM. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Christine S. Kim can be reached at 571-272-8458. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /SESHA SAIRAMAN SRINIVASAN/Examiner, Art Unit 2812 /CHRISTINE S. KIM/Supervisory Patent Examiner, Art Unit 2812
Read full office action

Prosecution Timeline

Aug 23, 2023
Application Filed
Mar 04, 2026
Non-Final Rejection — §102, §103 (current)

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Prosecution Projections

1-2
Expected OA Rounds
68%
Grant Probability
99%
With Interview (+52.9%)
3y 7m
Median Time to Grant
Low
PTA Risk
Based on 28 resolved cases by this examiner. Grant probability derived from career allow rate.

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