Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
DETAILED ACTION
This action is responsive to the application No. 18/237,391 filed on 08/23/2023.
Election/Restrictions
Applicant’s election without traverse of Group I (claims 1-12) in the reply filed on 11/11/2025 is acknowledged.
Priority
Receipt is acknowledged of papers submitted under 35 U.S.C. 119(a)-(d), which papers have been placed of record in the file.
Information Disclosure Statement
Acknowledgment is made of Applicant’s Information Disclosure Statement (IDS) form PTO-1449. These IDS has been considered.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claims 1-12 are rejected under 35 U.S.C. 103 as being unpatentable over U.S. Pub # 2023/0171948 to Yan in view of US Pub # 2018/0158827 to You et al. (You).
Regarding independent claim 1, Yan discloses a semiconductor device (Fig. 14: 600), comprising:
a substrate (Fig. 14: 100) comprising a cell region (Fig. 14: 300a) and a periphery region (Fig. 14: 300b);
a plurality of storage node pads (Fig. 14: 211 and ¶0028) disposed on the substrate (100) and located in the cell region (300a);
a capacitor structure (Fig. 14: 650 and ¶0041) disposed on the plurality of storage node pads (211) and comprising a plurality of bottom electrodes (251) in contact with the plurality of storage node pads (211), respectively; and
a supporting structure (see Fig. 14: 243 and 247 with respect to Fig. 8: 240) disposed on the plurality of storage node pads (211; it is noted that the claim do not limiting that the supporting structure has to be in direct contact with the plurality of storage node pads) and interleaved (see Fig. 14) among the plurality of bottom electrodes (251) while being in physical contact with the plurality of bottom electrodes (251), the supporting structure (243 and 247) comprising a first supporting layer (243) and a second supporting layer (another 247) sequentially from bottom to top, wherein the second supporting layer (247) comprises a first thickness (see Examiner’s mark-up below) and a second thickness (see Examiner’s mark-up below) and wherein the second supporting layer with the first thickness is disposed in the cell region (300a) and the second supporting layer with the second thickness is disposed between the cell region (300a) and the periphery region (300b) (see Examiner’s mark-up below).
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Yan and You fails to explicitly disclose that the second supporting layer that includes the second thickness is greater than the first thickness.
You disclose a semiconductor device (Fig. 22) with the second supporting layer (450) that is disposed between the cell region and the periphery region which includes the second thickness (combinations of 450 and 442e; see also Examiner’s Mark-up below) that is greater than the first thickness (444 in cell region; see Examiner’s Mark-up below).
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It would have been obvious to a person having ordinary skill in the art before the effective filing date of the invention to have provided the second supporting layer of Yan with the first and second thickness of the second supporting layer as taught by You in order to improve a mechanical reliability and electrical reliability of the semiconductor device and also to improve the refresh performance of the semiconductor device (¶0195).
Regarding claim 2, Yan teaches the subject matter of claim 1 except for the requirement that the second supporting layer that includes the second thickness is greater than the first thickness. As explained in the rejection of claim 1, modifying Yan’s supporting structure to include regions of differing thicknesses would have been obvious to a POSITA as a routine optimization of a result-effective variable for mechanical stability and stress control (MPEP 2144.03), and as a predictable design choice yielding no unexpected results (MPEP 2144.05). Further, the specification contains no disclosure of either the critical nature of the claimed topmost surface or any unexpected results arising therefrom and it has been held that where patentability is said to be based upon a particular chosen dimension or upon another variable recited in a claim, the Applicant must show that the chosen dimension is critical. In re Woodruff, 919 F.2d 1575, 1578, 16 USPQ2d 1934, 1936 (Fed. Cir. 1990).
Yan disclose wherein a top surface of the second supporting layer (247) with the first thickness is coplanar with a top surface of the plurality of bottom electrodes (251). Yan fails to explicitly disclose a topmost surface of the second supporting layer with the second thickness is higher than the top surface of the second supporting layer with the first thickness.
Once the second supporting layer (247) is modified to include two different thicknesses, the geometric consequence is that the topmost surface of the thicker portion is higher than the top surface of the thinner portion. Such relative height differences inherently follow from the thickness differences and represent a predictable result of the obvious modification to Yan’s structure (see MPEP 2112 regarding inherency in the context of obviousness). Semiconductor supporting layers routinely exhibit stepped or non-uniform topography when formed with differing thicknesses through standard deposition, etch-back, or planarization techniques.
Therefore, it would have been obvious to a POSITA at the time of the invention to form the second supporting layer with a topmost surface corresponding to the greater thickness being higher than the surface corresponding to the lesser thickness.
Regarding claim 3, Yan discloses a bottom surface of the second supporting layer (247) with the second thickness is coplanar with a bottom surface of the second supporting layer (247) with the first thickness (see Fig. 14 for the bottom surface of both 247).
Regarding claim 4, Yan discloses the capacitor structure (Fig. 14: 650) further comprises a capacitive dielectric layer (253 and ¶0041) and a top electrode layer (255 and ¶0041) stacked in sequence, and sidewalls of the second supporting layer (247) with the second thickness is in contact with both the capacitive dielectric layer (253) and one of the plurality of bottom electrodes (251).
Regarding claim 5, Yan discloses the sidewalls of the second supporting layer with the second thickness has a side close to the cell region (see Examiner’s mark-up below) and an opposite side away from the cell region (see Examiner’s mark-up below), and the side of the sidewalls close to the cell region is in physical contact with the one of the plurality of bottom electrodes (251), while the opposite side (see Examiner’s mark-up below) of the sidewalls away from the cell region is in physical contact with the capacitive dielectric layer (253).
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Regarding claim 6, Yan discloses a level of the second supporting layer (247) with the second thickness relative to the substrate (100) and a level of the second supporting layer (another 247) with the first thickness relative to the substrate.
Yan and You fail to explicitly disclose a level of the second supporting layer with the second thickness relative to the substrate is greater than a level of the second supporting layer with the first thickness relative to the substrate.
However, the level of the supporting layer (247) affect the thickness of the semiconductor memory device. It is known in the art to use a level for the supporting layer. It would have been obvious to one of ordinary skill in the art at the time of the invention to vary, through routine experimentation, the result effect variable of the level of the second supporting layer in order to optimize the functionality of the device (see MPEP §2144.05). Further, the specification contains no disclosure of either the critical nature of the claimed level or any unexpected results arising therefrom and it has been held that where patentability is said to be based upon a particular chosen dimension or upon another variable recited in a claim, the Applicant must show that the chosen dimension is critical. In re Woodruff, 919 F.2d 1575, 1578, 16 USPQ2d 1934, 1936 (Fed. Cir. 1990)
Regarding claims 7 and 10, Yan discloses the semiconductor device of claim 1 (see the rejection of claim 1 above).
Yan and You fail to explicitly disclose the second supporting layer comprises a stepped structure disposed between the cell region and the periphery region.
A stepped structure is merely a geometric shape or profile of the supporting layer. As explained in the rejection of claim 1, providing the second supporting layer with multiple thicknesses would have been obvious as an optimization of a result-effective variable. Once a supporting layer has multiple thicknesses, forming the transition between thicknesses as a “step” represents nothing more than a modification of shape, which is considered an obvious matter of design choice.
Changing the shape or form of a known structure, absent unexpected results, does not render the claim non-obvious. See In re Dailey, 357 F.2d 669 (CCPA 1966); In re Rose, 220 F.2d 459 (CCPA 1955); In re Larson, 340 F.2d 965 (CCPA 1965). The courts have consistently held that modifications to the configuration or contour of a structure are obvious when they achieve the same function. See also In re Japikse, 181 F.2d 1019 (CCPA 1950) (changes in configuration obvious where operation unchanged). Moreover, under KSR v. Teleflex, 550 U.S. 398 (2007), implementing a predictable variation such as a stepped profile constitutes an obvious design modification.
Because forming a stepped structure is a predictable way of implementing the thickness variation already found obvious in claim 1, and because such shape changes produce no unexpected result and do not modify the function of the supporting structure, the limitation of claim 7 is an obvious design choice.
Regarding claim 8, Yan teaches the subject matter of claim 1 except for the requirement that the second supporting layer includes regions of differing thickness. As explained in the rejection of claim 1, modifying Yan’s supporting structure to include a first thickness and a second, greater thickness would have been obvious to a POSITA as a routine optimization of a result-effective variable (MPEP 2144.03), as well as a predictable design choice yielding no unexpected result (MPEP 2144.05). Further, the specification contains no disclosure of either the critical nature of the claimed top surface or any unexpected results arising therefrom and it has been held that where patentability is said to be based upon a particular chosen dimension or upon another variable recited in a claim, the Applicant must show that the chosen dimension is critical. In re Woodruff, 919 F.2d 1575, 1578, 16 USPQ2d 1934, 1936 (Fed. Cir. 1990).
Yan discloses a topmost surface of the second supporting layer (247) with the second thickness is coplanar with a top surface of one of the plurality of bottom electrodes (251) (see Fig. 14). Yan fails to explicitly disclose a top surface of the second supporting layer (247) with the first thickness is lower than the top surface of the one of the plurality of bottom electrodes.
Once the second supporting layer is modified to include a thicker portion (second thickness) and a thinner portion (first thickness), the relative heights of their top surfaces inherently differ in proportion to their thicknesses. If the thicker portion is aligned (coplanar) with the top of a bottom electrode, then the thinner portion must necessarily be lower in height due to its smaller thickness. Such height differences are inherent results of the obvious thickness modification (see MPEP 2112 regarding inherency in obviousness) and represent a predictable structural consequence of forming non-uniform supporting-layer thicknesses.
Accordingly, it would have been obvious to a POSITA at the time of the invention to configure the supporting layer such that the thicker portion is coplanar with the electrode top while the thinner portion is lower, as claimed.
Regarding claim 9, Yan discloses a bottom surface of the second supporting layer (247) with the second thickness is coplanar with a bottom surface of the second supporting layer (247) with the first thickness (see Fig. 14, both bottom surface of both 247 are coplanar).
Regarding claim 11, Yan discloses the capacitor structure (Fig. 14: 650) further comprises a capacitive dielectric layer (253) and a top electrode layer (255) stacked in sequence, which cover the second supporting layer with the second thickness (247), the second supporting layer with the first thickness (another 247) and the plurality of bottom electrodes (251) simultaneously, and the capacitive dielectric layer (253) are in physical contact with both sides of sidewalls of the second supporting layer with the second thickness (see Fig. 14: 247; 253 is in contact with both sides of sidewalls of the second supporting layer with the second thickness).
Regarding claim 12, Yan discloses each of the plurality of bottom electrodes (Fig. 14: 251) comprises a U-shaped electrode structure or a columnar electrode structure (see Fig. 14).
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. US Pub # 2024/0206153 to Wu et al., US Pub # 2023/0284440 to Shih et al. and US Pub # 2019/0148382 to Liu et al.
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/MOHSEN AHMADI/ Primary Examiner, Art Unit 2896