Prosecution Insights
Last updated: April 19, 2026
Application No. 18/238,291

MEMORY DEVICE HAVING 2-TRANSISTOR VERTICAL MEMORY CELL AND MEMORY ELEMENT BETWEEN CHANNEL REGION AND CONDUCTIVE PLATE

Non-Final OA §112
Filed
Aug 25, 2023
Examiner
CHOU, SHIH TSUN A
Art Unit
2811
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Micron Technology, Inc.
OA Round
1 (Non-Final)
76%
Grant Probability
Favorable
1-2
OA Rounds
2y 6m
To Grant
93%
With Interview

Examiner Intelligence

Grants 76% — above average
76%
Career Allow Rate
338 granted / 447 resolved
+7.6% vs TC avg
Strong +17% interview lift
Without
With
+17.1%
Interview Lift
resolved cases with interview
Typical timeline
2y 6m
Avg Prosecution
24 currently pending
Career history
471
Total Applications
across all art units

Statute-Specific Performance

§103
48.9%
+8.9% vs TC avg
§102
23.4%
-16.6% vs TC avg
§112
26.6%
-13.4% vs TC avg
Black line = Tech Center average estimate • Based on career data from 447 resolved cases

Office Action

§112
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Rejections - 35 USC § 112 The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph: The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention. Claims 1-9 and 19-25 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. Claim 1 is rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being incomplete for omitting essential structural cooperative relationships of elements, such omission amounting to a gap between the necessary structural connections. See MPEP § 2172.01. The omitted structural cooperative relationship is between a first side and a second side of the dielectric portion. For example, it is not clear whether the first side and the second side are on opposite to each other, or are adjacent to each other. Claim 9 is rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being incomplete for omitting essential structural cooperative relationships of elements, such omission amounting to a gap between the necessary structural connections. See MPEP § 2172.01. The omitted structural cooperative relationship is between a first deck of memory cells of the memory device and a second deck of additional memory cells of the memory device. It is not clear where the first deck is located in the memory device relative to the second deck in the memory device. Claim 19 is rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being incomplete for omitting essential structural cooperative relationships of elements, such omission amounting to a gap between the necessary structural connections. See MPEP § 2172.01. The omitted structural cooperative relationships are between a conductive line and a first conductive region, between a conductive line and a second conductive region, and between a semiconductor material portion of the memory cell and a memory element, a first portion, a second portion of the memory cell. Claim 19 recites the limitation “the semiconductor material portion, part of the conductive line spanning across part of the semiconductor material portion and the second portion”. It is not clear whether part of the conductive line spanning across part of the second portion, or across the entire second portion. Allowable Subject Matter Claims 1-9 and 19-25 would be allowable if rewritten or amended to overcome the rejection(s) under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), 2nd paragraph, set forth in this Office action. Claims 10-18 are allowed. The following is a statement of reasons for the indication of allowable subject matter: Regarding claim 1 as so far as understood, the prior art of record, Karda (US 2021/0066196), discloses an apparatus comprising: a conductive region; a memory cell including: a memory element formed over the conductive region; a first portion formed over the memory element, the first portion including a first material; a dielectric portion including a first side adjacent the memory element, the first portion; a third portion including a third material, the third portion adjacent a second side of the dielectric portion and separated from the memory element, the first portion, by the dielectric portion; a data line formed over the second portion and the third portion. See Karda, FIGS. 5-6 and paragraphs [0065]-[0089]. The prior art of records, individually or in combination, do not disclose nor teach “a second portion formed over the first portion, the second portion including a second material; a first side adjacent the second portion; a second side separated from the second portion” in combination with other limitations as recited in claim 1. The prior art of record, Karda, discloses an apparatus comprising: a data line; a memory cell coupled to the data line, the memory cell including: a first transistor including a first channel region coupled to the data line; a second transistor including a second channel region coupled to the data line; a memory element; a ground connection coupled to the first channel region of the first transistor. The prior art of records, individually or in combination, do not disclose nor teach “a conductive portion separated from the first channel region by a dielectric portion; a second channel region coupled to the conductive portion; a memory element coupled to the conductive portion, the memory element and the conductive portion having different materials; a ground connection coupled to the memory element” in combination with other limitations as recited in claim 10. Regarding claim 19 as so far as understood, the prior art of record, Karda, discloses an apparatus comprising: a first conductive region located in a first level of the apparatus; a second conductive region located in a second level of the apparatus; a memory cell located between the first and second levels and coupled to the first and second conductive regions, the memory cell including: a memory element adjacent the first conductive region; a first portion adjacent the memory element; a second portion adjacent the first portion, the first and second portions having different materials; a semiconductor material portion in electrical contact with the second conductive regions; a conductive line electrically separated from the memory element, the first portion, the second portion, and the semiconductor material portion, part of the conductive line spanning across the second portion. The prior art of records, individually or in combination, do not disclose nor teach “a semiconductor material portion in electrical contact with the first conductive region; part of the conductive line spanning across part of the semiconductor material portion” in combination with other limitations as recited in claim 19. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to SHIH TSUN A CHOU whose telephone number is (408)918-7583. The examiner can normally be reached M-F 8:00-16:00 Arizona Time. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Lynne Gurley can be reached at (571) 272-1670. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /SHIH TSUN A CHOU/Primary Examiner, Art Unit 2811
Read full office action

Prosecution Timeline

Aug 25, 2023
Application Filed
Mar 14, 2026
Non-Final Rejection — §112 (current)

Precedent Cases

Applications granted by this same examiner with similar technology

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
76%
Grant Probability
93%
With Interview (+17.1%)
2y 6m
Median Time to Grant
Low
PTA Risk
Based on 447 resolved cases by this examiner. Grant probability derived from career allow rate.

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