DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Status of the Claims
Application filed August 28, 2023, claimed benefit of Korean Patent Application No. 10-2022-0109060, is acknowledged. Claims 1-28 are pending.
Action on merits of claims 1-28 follows.
Priority
Receipt is acknowledged of certified copies of papers required by 37 CFR 1.55.
Information Disclosure Statement
The information disclosure statement (IDS) submitted on August 28, 202 has been considered by the examiner.
Specification
The lengthy specification has not been checked to the extent necessary to determine the presence of all possible minor errors. Applicant’s cooperation is requested in correcting any errors of which applicant may become aware in the specification.
The title of the invention is not descriptive. A new title is required that is clearly indicative of the invention to which the claims are directed.
The following title is suggested:
A DISPLAY DEVICE HAVING A LIGHT-BLOCKING LAYER DISPOSED IN A RECESS FORMED IN A FIRST INSULATING FILM THAT OVERLAPPING A FIRST SEMICONDUCTOR LAYER OF A FIRST TRANSISTOR FORMED IN A DISPLAY AREA
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 16-18 and 20 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by NOH et al. (US. Pub. No. 20220190079).
With respect to claim 16, NOH teaches a display device, substantially as claimed including:
a substrate (110);
a display area (10);
a non-display area disposed around the display area;
a first insulating film (113) disposed on the substrate;
a first transistor (130) disposed in the display area and on the first insulating film (113), wherein the first transistor includes a first semiconductor layer (131), a first gate electrode (134), a first source electrode (132), and a first drain electrode (133);
an anode electrode (170) electrically connected to the first drain electrode (133);
a light-emitting layer (200) disposed on the anode electrode (170);
a cathode electrode (210) disposed on the light-emitting layer (200); and
a light-blocking layer (310) disposed on the first insulating film (113),
wherein the first insulating film (113) has a first recess defined in the first insulating film, and
wherein the light-blocking layer (310) is disposed in the first recess. (See FIGs. 1, 6).
With respect to claim 17, the display device of NOH further comprises a second insulating film (114a) disposed between the light-blocking layer (310) and the first semiconductor layer (131), wherein the second insulating film (114a) has a second recess defined in the second insulating film, and
wherein the second recess vertically overlaps the first recess.
With respect to claim 18, the first semiconductor layer (131) of NOH is disposed in the second recess.
With respect to claim 20, the display device of NOH further comprises a second transistor (120) disposed in the display area, and
wherein the second transistor includes a second semiconductor layer (121), a second gate electrode (124), a second source electrode (122) and a second drain electrode (123).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 19 and 21-23 are rejected under 35 U.S.C. 103 as being unpatentable over NOH ‘079 as applied to claims 16 and 20 above, and further in view of MOON et al. (US. Pub. No. 2021/0202634).
With respect to claim 19, NOH teaches the display device as described in claim 16 above including: the first drain electrode (133) is connected to the first semiconductor layer (131).
Thus, NOH is shown to teach all the features of the claim with the exception of explicitly disclosing the first drain electrode is connected to the first semiconductor layer and the light-blocking layer.
Note that, as shown in FIG. 3, the first drain electrode of transistor T4 is connected to the first semiconductor layer and capacitor Cst at node N4.
However, MOON teaches a display device including: a first drain electrode (160) is connected to first semiconductor layer (321) and light-blocking layer (142) of capacitor (140).
Therefore, it would have been obvious to one having ordinary skill in the art at the time of invention was made to form the display device of NOH having the first drain electrode being connected to the first semiconductor layer and light-blocking layer as taught by MOON for the same intended purpose of connecting to the capacitor.
With respect to claim 21, in view of MOON, second semiconductor layer (321) is disposed on a second insulating film (114). (See FIG. 3).
With respect to claim 22, NOH teaches the display device as described in claim 20 above including a thickness of a portion of the first insulating film (113) overlapping the second semiconductor layer (121) and a thickness of a portion of the first insulating film (113) overlapping the first semiconductor layer (131).
Note that the specification contains no disclosure of either the critical nature of the claimed thicknesses of any unexpected results arising therefrom. Where patentability is aid to based upon particular chosen dimension or upon another variable recited in a claim, the Applicant must show that the chosen dimension are critical. In re Woodruff, 919 F.2d 1575, 1578, 16 USPQ2d 1934, 1936 (Fed. Cir. 1990).
Although NOH does not explicitly disclosing the thicknesses of the first insulating film (113) that overlapping the first (131) and second (121) semiconductor layer.
However, NOH explicitly teaches that “a size and a thickness of each component illustrate in the drawing are illustrated for convenience of description, and the present disclosure is not limited to the size and the thickness of the component illustrated” (Emphasis added, See [0029]).
It is well settled that "[W]here the general conditions of a claim are disclosed in the prior art, it is not inventive to discover the optimum or workable ranges by routine experimentation." In re Aller, 220 F.2d 454, 456, 105 USPQ 233, 235 (CCPA 1955) (Claimed process which was performed at a temperature between 40 ºC and 80 ºC and an acid concentration between 25% and 70% was held to be prima facie obvious over a reference process which differed from the claims only in that the reference process was performed at a temperature of 100 ºC and an acid concentration of 10%.); see also Peterson, 315 F.3d at 1330, 65 USPQ2d at 1382 ("The normal desire of scientists or artisans to improve upon what is already generally known provides the motivation to determine where in a disclosed set of percentage ranges is the optimum combination of percentages.").
Therefore, it would have been obvious to one having ordinary skill in the art at the time of invention was made to form the thickness of a portion of the first insulating film of NOH overlapping the second semiconductor layer being larger or less than the thickness of a portion of the first insulating film overlapping the first semiconductor layer without altering the scope of NOH or the thickness of each portion can be optimized, thus within the ability of one having ordinary skill in the art.
With respect to claim 23, in view of MOON, the second semiconductor layer (321) is disposed at a higher vertical level than a vertical level of the first semiconductor layer (351), with respect to the substrate (110). (See FIG. 3).
Claims 24-26 and 28-29 are rejected under 35 U.S.C. 103 as being unpatentable over NOH ‘079 and MOON ‘634 as applied to claim 20 above, and further in view of PARK et al. (US. Pub. No. 2020/0321292).
With respect to claim 24, NOH, in view of MOON, teaches the display device as disclosed in claim 20 above including: a driver circuit area (NDA) disposed in the non-display area (NDA),
wherein the display device further comprises a third transistor (360) disposed in the driver circuit area, and wherein the third transistor (360) includes a third semiconductor layer (361), a third gate electrode(364), a third source electrode (362), and a third drain electrode (363). (See FIG. 3).
Thus, NOH and MOON are shown to teach all the features of the claim with the exception of explicitly disclosing a dam area disposed in the non-display area.
However, PARK teaches the display device including:
a driver circuit area (DCR) and a dam area (DM) disposed in the non-display area (NA). (See FIG. 4).
Therefore, it would have been obvious to one having ordinary skill in the art at the time of invention was made to form the display device of NOH, in view of MOON, further includes the dam area disposed in the non-display area as taught by PARK to seal off the display.
Note that, the display device having the dam area in the non-display area is well known in the art.
With respect to claim 25, in view of MOON, each of the first semiconductor layer (351) and the second semiconductor layer (321) is made of an oxide semiconductor, and the third semiconductor layer (361) is made of a polycrystalline silicon semiconductor.
With respect to claim 26, the display device of NOH further comprises a storage capacitor (140) disposed in the display area, and wherein the storage capacitor (140) is composed of a first capacitor electrode and a second capacitor electrode.
With respect to claim 28, In view of MOON, the second capacitor electrode and the third gate electrode (344) are disposed on a same layer.
With respect to claim 29, in view of PARK, the display device further comprises a first connection line (SL) disposed on the third transistor (TRd), and
wherein the first connection line (SL) is electrically connected to the cathode electrode (E2) in the dam area (DM). (See FIG. 4).
Claim 27 is rejected under 35 U.S.C. 103 as being unpatentable over NOH ‘079, MOON ‘634 and PARK ‘292 as applied to claim 26 above, and further in view of KIM et al. (US. Pub. No. 2021/0020717).
NOH, in view of MOON and PARK, teaches the display device as disclosed in claim 26 above including the third gate electrode (344) and the first insulating film (113).
Thus, NOH, MOON and PARK are shown to teach all the features of the claim with the exception of explicitly disclosing a first interlayer insulating film being disposed between the second gate electrode and the first insulating film.
However, KIM teaches a display device including:
a first interlayer insulating film (260) is disposed between second gate electrode (230) and first insulating film (280), and
wherein first capacitor electrode (360-3) is disposed on the first interlayer insulating film (280). (See FIG. 30).
Therefore, it would have been obvious to one having ordinary skill in the art at the time of invention was made to form the display device of NOH, in view of MOON and PARK, including the first interlayer insulating film being disposed between the second gate electrode and first insulating film as taught by KIM to isolate the second gate electrode from the second source and drain electrode.
Claims 1, 5, 11 and 14-15 are rejected under 35 U.S.C. 103 as being unpatentable over MOON ‘634 in view of PARK ‘292.
With respect to claim 1, MOON teaches a display device, substantially as claimed including:
a substrate (110);
a display area (DA);
a non-display area (NDA) disposed around the display area;
a driver circuit area disposed in the non-display area;
a first transistor (320) disposed in the display area (DA), wherein the first transistor includes a first semiconductor layer (321), a first gate electrode (324), a first source electrode (322), and a first drain electrode (323);
a second transistor (340) disposed in the driver circuit area, wherein the second transistor includes a second semiconductor layer (341), a second gate electrode (344), a second source electrode (342), and a second drain electrode (344); and
a first insulating film (113) disposed between the second gate electrode (344) and the second source electrode (342) and between the second gate electrode and the second drain electrode (344);
an anode electrode (410) electrically connected to the first drain electrode (323); and
a light-blocking layer (142) overlapping the first semiconductor layer (321),
wherein the light-blocking layer (142) is disposed on the first insulating film (113), and
wherein the light-blocking layer (142), the second source electrode (342), and the second drain electrode (343) are disposed on a same layer. (See FIGs. 1, 3).
Although MOON does not explicitly show “a dam area disposed in the non-display area”, however, this is a well-known component of a display device.
Thus, MOON is shown to teach all the features of the claim with the exception of explicitly disclosing a dam area disposed in the non-display area.
However, PARK teaches a display device including:
a substrate (110);
a display area (DA);
a non-display area (NA) disposed around the display area;
a driver circuit area (DCR) and a dam area (DM) disposed in the non-display area (NA). (See FIG. 4).
Therefore, it would have been obvious to one having ordinary skill in the art at the time of invention was made to form the display device of MOON having the dam area disposed in the non-display area as taught by PARK to seal off the display.
With respect to claim 5, the first drain electrode (323) of MOON is connected to the first semiconductor layer (321) and the light-blocking layer (142).
With respect to claim 11, the display device of MOON further comprises a storage capacitor (140) disposed in the display area (DA), and wherein the storage capacitor (140) is composed of a first capacitor electrode and a second capacitor electrode.
With respect to claim 14, the display device of MOON further comprises a light-emitting layer (420) disposed on the anode electrode (410), and a cathode electrode (430) disposed on the light-emitting layer (420).
With respect to claim 15, in view of PARK, the display device further comprises a first connection line (SL) disposed on the second transistor (TRd), and wherein the first connection line (SL) is electrically connected to the cathode electrode (E2) in the dam area (DM).
Claims 2-4, 6-10 are rejected under 35 U.S.C. 103 as being unpatentable over MOON ‘634 and PARK ‘292 as applied to claim 1 above, and further in view of NOH ‘079.
With respect to claim 2, MOON, in view of PARK, teaches the display device as described in claim 1 above including: the light-blocking layer is disposed on the first insulating film.
Thus, MOON and PARK are shown to teach all the features of the claim with the exception of explicitly disclosing the first insulating film has a first recess defined in the first insulating film, and the light-blocking layer is disposed in the first recess.
However, NOH teaches the display device including:
a first insulating film (113) has a first recess defined in the first insulating film (113), and
wherein the light-blocking layer (310) is disposed in the first recess. (See FIG. 6).
Therefore, it would have been obvious to one having ordinary skill in the art at the time of invention was made to form the first insulating film of MOON, in view PARK, with the first recess in the first insulating film as taught by NOH to block light from interring the first semiconductor layer from the sides.
With respect to claim 3, in view of NOH, the display device further comprises a second insulating film (114a) disposed between the light-blocking layer (310) and the first semiconductor layer (131),
wherein the second insulating film (114a) has a second recess defined in the second insulating film (114a), and
wherein the second recess vertically overlaps the first recess.
With respect to claim 4, in view of NOH, the first semiconductor layer (131) is disposed in the second recess.
With respect to claim 6, the display device of MOON further comprises a third transistor (320) disposed in the display area (DA), and wherein the third transistor includes a third semiconductor layer (321), a third gate electrode (324), a third source electrode (322), and a third drain electrode (323). (See FIG. 3).
With respect to claim 7, the third semiconductor layer (321) of MOON is disposed on the first insulating film (113).
With respect to claim 8, in view of NOH, a thickness of a portion of the first insulating film (113) overlapping the third semiconductor layer (121) and a thickness of a portion of the first insulating film (113) overlapping the first semiconductor layer (131).
Note that the specification contains no disclosure of either the critical nature of the claimed thicknesses of any unexpected results arising therefrom. Where patentability is aid to based upon particular chosen dimension or upon another variable recited in a claim, the Applicant must show that the chosen dimension are critical. In re Woodruff, 919 F.2d 1575, 1578, 16 USPQ2d 1934, 1936 (Fed. Cir. 1990).
Although NOH does not explicitly disclosing the thicknesses of the first insulating film (113) that overlapping the first (131) and second (121) semiconductor layer.
However, NOH explicitly teaches that “a size and a thickness of each component illustrate in the drawing are illustrated for convenience of description, and the present disclosure is not limited to the size and the thickness of the component illustrated” (Emphasis added, See [0029]).
It is well settled that "[W]here the general conditions of a claim are disclosed in the prior art, it is not inventive to discover the optimum or workable ranges by routine experimentation." In re Aller, 220 F.2d 454, 456, 105 USPQ 233, 235 (CCPA 1955) (Claimed process which was performed at a temperature between 40 ºC and 80 ºC and an acid concentration between 25% and 70% was held to be prima facie obvious over a reference process which differed from the claims only in that the reference process was performed at a temperature of 100 ºC and an acid concentration of 10%.); see also Peterson, 315 F.3d at 1330, 65 USPQ2d at 1382 ("The normal desire of scientists or artisans to improve upon what is already generally known provides the motivation to determine where in a disclosed set of percentage ranges is the optimum combination of percentages.").
Therefore, it would have been obvious to one having ordinary skill in the art at the time of invention was made to form the thickness of a portion of the first insulating film of NOH overlapping the second semiconductor layer being larger or less than the thickness of a portion of the first insulating film overlapping the first semiconductor layer without altering the scope of NOH or the thickness of each portion can be optimized, thus within the ability of one having ordinary skill in the art.
With respect to claim 9, the third semiconductor layer (321) of MOON is disposed at a higher vertical level than a vertical level of the first semiconductor layer (351), with respect to the substrate. (See FIG. 3).
With respect to claim 10, each of the first semiconductor layer (351) and the third semiconductor layer (321) of MOON is made of an oxide semiconductor, and the second semiconductor layer (361) is made of a polycrystalline silicon semiconductor.
Claims 12-13 are rejected under 35 U.S.C. 103 as being unpatentable over MOON ‘634 and PARK ‘292 as applied to claim 11 above, and further in view of KIM et al. (US. Pub. No. 2021/0020717).
With respect to claim 12, MOON, in view of PARK, teaches the display device as disclosed in claim 11 above including the second gate electrode (344) and the first insulating film (113).
Thus, MOON and PARK are shown to teach all the features of the claim with the exception of explicitly disclosing a first interlayer insulating film being disposed between the second gate electrode and the first insulating film.
However, KIM teaches a display device including:
a first interlayer insulating film (260) is disposed between second gate electrode (230) and first insulating film (280), and
wherein first capacitor electrode (360-3) is disposed on the first interlayer insulating film (280). (See FIG. 30).
Therefore, it would have been obvious to one having ordinary skill in the art at the time of invention was made to form the display device of MOON, in view of PARK, including the first interlayer insulating film being disposed between the second gate electrode and first insulating film as taught by KIM to isolate the second gate electrode from the second source and drain electrode.
With respect to claim 13, the second capacitor electrode (141) and the second gate electrode (344) of MOON are made of a same material and are disposed on a same layer.
Conclusion
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/ANH D MAI/Primary Examiner, Art Unit 2893