DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Information Disclosure Statement
The information disclosure statement (IDS) submitted on 10/25/2023. The submission is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claims 1-3, 6, 8-12 & 17-20 are rejected under 35 U.S.C. 102(a)(2) as being anticipated by Chang et al. (hereinafter, called Chang) (US 2023/0123305 A1, Foreign priority date 2021-10-18).
PNG
media_image1.png
568
940
media_image1.png
Greyscale
Regarding claims 1 & 19 Chang (Fig. 3) discloses a radio frequency amplifier or method comprising:
a radio frequency input terminal (Vin, Fig. 3);
a radio frequency output terminal (a node between inductor L and drain terminal of transistor N3);
a gain transistor (transistor N2) including a control terminal (gate terminal) configured to receive a radio frequency signal from the radio frequency input terminal;
a cascode transistor (transistor N1 or transistor N3) connected in series with the gain transistor (transistor N2), the cascode transistor configured to provide an amplified radio frequency signal to the radio frequency output terminal; and
a neutralization capacitor (capacitors C_M1, C_M2, C_M3 and switches SW_1, SW_2, SW_3) connected in parallel with the cascode transistor (transistor N3).
Regarding claim 2, Chang (Fig. 3) discloses wherein the neutralization capacitor has a controllable capacitance value (capacitance value change by selectable capacitors).
Regarding claim 3, Chang (Fig. 3) discloses wherein the neutralization capacitor includes a capacitor bank having a plurality of selectable capacitor branches each including a capacitor and a switch in series (Capacitor C_M1 in series with switch SW_1, capacitor C_M2 in series with switch SW_2 and capacitor C_M3 in series with switch SW_3).
Regarding claim 6, Chang (Fig. 3) discloses further comprising a load (inductor L) connected between a power supply voltage (VD) and the radio frequency output terminal.
Regarding claim 8, Chang (Fig. 3) discloses wherein the gain transistor (transistor N2) is a common source field-effect transistor having a gate (gate terminal of transistor N2) connected to the radio frequency input terminal (Vin terminal) and a source connected to a ground voltage (ground).
Regarding claim 9, Chang (Fig. 3) discloses wherein the cascode transistor (transistor N3) is a cascode field-effect transistor having a gate biased by a cascode voltage (V2), a source (source terminal of transistor N3) connected to a drain of the common source field-effect transistor (transistor N2) and to a first end (a node between C_M1 and source terminal of transistor N3) of the neutralization capacitor, and a drain (drain terminal of transistor N3) connected to the radio frequency output terminal (a terminal between inductor L and drain teminal of transistor N3) and to a second end (a node between switch SW_1 and drain terminal of transistor N3) of the neutralization capacitor.
Regarding claim 10, Chang (Fig. 3) discloses a mobile device comprising: an antenna (antenna 301); and a front-end system including a radio frequency amplifier (Fig. 3) that includes a radio frequency input terminal (Vin terminal) connected to the antenna (antenna 301), a radio frequency output terminal (a node between inductor L and drain terminal of transistor N3),
a gain transistor (transistor N2) including a control terminal (gate terminal) configured to receive a radio frequency signal from the radio frequency input terminal,
a cascode transistor (transistor N1 or transistor N3) connected in series with the gain transistor and configured to provide an amplified radio frequency signal to the radio frequency output terminal, and
a neutralization capacitor (capacitors C_M1, C_M2, C_M3 and switches SW_1, SW_2, SW_3) connected in parallel with the cascode transistor.
Regarding claims 11-12 are rejected in the same manner as discussed above in claims 2-3, respectively.
Regarding claim 15 is rejected in the same manner as discussed above in claim 6.
Regarding claims 17-18 are rejected in the same manner as discussed above in claims 8-9, respectively.
Regarding claim 20 is rejected in the same manner as discussed above in claims 8-9.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claims 4 & 13 are rejected under 35 U.S.C. 103 as being unpatentable over Chang in view of Moloudi et al. (hereinafter called Moloudi) (US 7,113,744 B1).
Regarding claims 4 & 13, Chang (Fig. 3) discloses all the limitations as applied in claims 3 & 12 except for the switch is implemented as a field-effect transistor.
Moloudi (Fig. 4(a)) discloses an amplifier circuit comprising switches 496 and 500 wherein switches can be FET transistor (Col. 13, lines 25-26).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have replaced the switches of Chang to have FETs transistors as taught by Moloudi in order to provide benefit of improving switching speed since the FET transistor is well-known for fast switching.
Claims 7 & 16 are rejected under 35 U.S.C. 103 as being unpatentable over Chang in view of Fong (US 6147559 A).
Regarding claims 7 & 16, Chang (Fig. 3) discloses all the limitations as applied in claims 6 & 15 except for the load includes an inductor and a resistor in parallel.
Fong (Fig.1) disclose an amplifier circuit comprising resistor R1 and inductor in parallel.
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified the circuit of Chang to have resistor, as taught by Fong. Such a modification would have imparted the advantageous benefit of improving output impedance matching (Col. 3, lines 58-59) and further improving performance and stability.
Allowable Subject Matter
Claims 5 & 14 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to KHIEM D NGUYEN whose telephone number is (571)270-3941. The examiner can normally be reached Mon-Fri 8:00 AM-5:00 PM EST.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, ANDREA J LINDGREN BALTZELL can be reached at (571)272-5918. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/KHIEM D NGUYEN/Examiner, Art Unit 2843