DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Continued Examination Under 37 CFR 1.114
A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 03/16/2026 has been entered.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claims 21-22, 24, 26, and 29 are rejected under 35 U.S.C. 102(a)(2) as being anticipated by US 2024/0145462 to Hwang et al. (hereinafter Hwang).
With respect to claim 21, Hwang discloses a bipolar transistor (e.g., a heterojunction bipolar transistor) (Hwang, Fig. 2, ¶0005, ¶0014-¶0032) comprising:
a sub-collector (e.g., n-type semiconductor layer 18 under the device area including collector regions 24/26/28/34/36/30/32 and shallow trench isolation regions 22) (Hwang, Fig. 2, ¶0014-¶0019, ¶0030) situated in a semiconductor substrate (12), said sub-collector (18) being doped with a first dopant type (e.g., n-type doped silicon);
a device layer (e.g., a device area including collector regions 24/26/28/34/36/ 30/32 and shallow trench isolation regions 22) (Hwang, Fig. 2, ¶0017-¶0020, ¶0030) doped with said first dopant type (e.g., n-type doped silicon) situated over said sub-collector (18);
a shallow trench isolation (STI) (22) (Hwang, Fig. 2, ¶0017, ¶0030) situated in said device layer;
a Reduced Surface Layer (RESURF) region (e.g., the p-type doped silicon layer 38/40 to control current is interpreted as a RESURF region) (Hwang, Fig. 2, ¶0021-¶0022, ¶0031) doped with a second dopant type (e.g., p-type) opposite said first dopant type (e.g., n-type), said RESURF region (38/40) extending under said STI (22) and being situated between a collector (e.g., 26/34/30 and 28/36/32) (Hwang, Fig. 2, ¶0030) of said bipolar transistor and said STI (22), said RESURF region (38/40) being in direct contact with said collector (e.g., 26/34/30 and 28/36/32).
Regarding claim 22, Hwang discloses the bipolar transistor of claim 21. Further, Hwang discloses the bipolar transistor, further comprising a collector sinker region (e.g., portion of the n-type region 34/26/30 and 36/28/32 under the electrical contact 50) (Hwang, Fig. 2, ¶0028) doped with said first dopant type (e.g., n-type doped silicon) and electrically coupled to said sub- collector (e.g., 18).
Regarding claim 24, Hwang discloses the bipolar transistor of claim 21. Further, Hwang discloses the bipolar transistor, wherein said first dopant type (e.g., n-type doped silicon) (Hwang, Fig. 2, ¶0014-¶0020, ¶0030) is N type and said second dopant type (e.g., p-type doped silicon) is P type.
Regarding claim 26, Hwang discloses the bipolar transistor of claim 21. Further, Hwang discloses the bipolar transistor, wherein said RESURF region (e.g., 38/40) (Hwang, Fig. 2, ¶0021) is boron (B) doped.
Regarding claim 29, Hwang discloses the bipolar transistor of claim 21. Further, Hwang discloses the bipolar transistor, wherein said bipolar transistor is a silicon germanium (e.g., the base 48 includes silicon-germanium) (SiGe) bipolar transistor (Hwang, Fig. 2, ¶0024).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 12, 14, 16, and 19 are rejected under 35 U.S.C. 103 as being unpatentable over US 2024/0145462 to Hwang in view of Chen et al. (US 2014/0266407, hereinafter Chen).
With respect to claim 12, Hwang discloses a bipolar transistor (e.g., a heterojunction bipolar transistor) (Hwang, Fig. 2, ¶0005, ¶0014-¶0032) comprising:
a sub-collector (e.g., n-type semiconductor layer 18 under the device area including collector regions 24/26/28/34/36/30/32 and shallow trench isolation regions 22) (Hwang, Fig. 2, ¶0014-¶0019, ¶0030) situated in a semiconductor substrate (12), said sub-collector (18) being doped with a first dopant type (e.g., n-type doped silicon);
a device layer (e.g., a device area including collector regions 24/26/28/34/36/ 30/32 and shallow trench isolation regions 22) (Hwang, Fig. 2, ¶0017-¶0020, ¶0030) doped with said first dopant type (e.g., n-type doped silicon) situated over said sub-collector (18);
a shallow trench isolation (STI) (22) (Hwang, Fig. 2, ¶0017, ¶0030) situated in said device layer, said STI (22) bordering a collector (e.g., 26/34/30 and 28/36/32) (Hwang, Fig. 2, ¶0030) of said bipolar transistor;
a Reduced Surface Layer (RESURF) region (e.g., the p-type doped silicon layer 38/40 to control current is interpreted as a RESURF region) (Hwang, Fig. 2, ¶0021-¶0022, ¶0031) doped with a second dopant type (e.g., p-type) opposite said first dopant type (e.g., n-type), said RESURF region (38/40) being situated between said collector (e.g., 26/34/30 and 28/36/32) and said STI (22), said RESURF region (38/40) being in direct contact with said collector (e.g., 26/34/30 and 28/36/32);
wherein said RESURF region (38/40) (Hwang, Fig. 2, ¶0031) controls current performance of said bipolar transistor.
Further, Hwang does not specifically disclose said RESURF region protects against breakdown of said bipolar transistor.
However, Hwang teaches that the p-type doped regions (38/40) are formed by implantation to tune the electrical and physical characteristics of the p-type doped regions (38/40) (Hwang, Fig. 2, ¶0021, ¶0031) that are formed to enhance current performance of the device. Further, the breakdown voltage of the bipolar device is increased by forming the p-type doped regions (38/40) under the isolation region (22) and extending to the underlying deep well region (16) (Hwang, Fig. 2, ¶0033). Further, Chen teaches that forming doped region (e.g., 124) (Hwang, Fig. 1B ¶0038) under the dielectric structures (128) as the RESURF type region is used to increase the breakdown voltage of the bipolar junction transistor.
Thus, Hwang recognizes that the electrical and physical characteristics of the p-type doped RESURF region impact performance of the bipolar transistor. Further, Chen recognized that the doped RESURF region under the dielectric structure increases the breakdown voltage, and thus impact performance of the bipolar transistor. Thus, the electrical and physical characteristics of the p-type doped RESURF region are result-effective variables.
It would have been obvious to a person of ordinary skill in the art before the effective filing date of the invention to vary, through routine optimization, the electrical and physical characteristics of the p-type doped RESURF region under the dielectric structure as Hwang and Chen have identified the electrical and physical characteristics of the doped RESURF region as result-effective variables. Further, a person of ordinary skill in the art would have had a reasonable expectation of success to arrive at specific electrical and physical characteristics of the doped RESURF region such that said RESURF region protects against breakdown of said bipolar transistor, in order to provide a bipolar transistor with enhanced current performance and improved breakdown voltage as taught by Hwang (¶0021, ¶0031, ¶0033) and Chen (¶0038) (MPEP 2144.05).
It would have been obvious to a person of ordinary skill in the art before the effective filing date of the invention to further modify the bipolar transistor of Hwang by optimizing the electrical and physical characteristics of the p-doped region under the dielectric structure as taught by Hwang and Chen, wherein the p-doped region under the dielectric structure is configured as RESURF region to have the bipolar transistor, wherein said RESURF region protects against breakdown of said bipolar transistor, in order to provide a bipolar transistor with enhanced current performance and improved breakdown voltage (Hwang, ¶0005, ¶0021, ¶0031, ¶0033; Chen, ¶0038).
Regarding claim 14, Hwang in view of Chen discloses the bipolar transistor of claim 12. Further, Hwang discloses the bipolar transistor, wherein said first dopant type (e.g., n-type doped silicon) (Hwang, Fig. 2, ¶0014-¶0020, ¶0030) is N type and said second dopant type (e.g., p-type doped silicon) is P type.
Regarding claim 16, Hwang in view of Chen discloses the bipolar transistor of claim 14. Further, Hwang discloses the bipolar transistor, wherein said RESURF region (e.g., 38/40) (Hwang, Fig. 2, ¶0021) is boron (B) doped.
Regarding claim 19, Hwang in view of Chen discloses the bipolar transistor of claim 12. Further, Hwang discloses the bipolar transistor, wherein said bipolar transistor is a silicon germanium (e.g., the base 48 includes silicon-germanium) (SiGe) bipolar transistor (Hwang, Fig. 2, ¶0024).
Claim 13 is rejected under 35 U.S.C. 103 as being unpatentable over US 2024/0145462 to Hwang in view of Chen (US 2014/0266407) as applied to claim 12, and further in view of Babcock et al. (US 2005/0250289, hereinafter Babcock’289).
Regarding claim 13, Hwang in view of Chen discloses the bipolar transistor of claim 12. Further, Hwang discloses the bipolar transistor, further comprising a collector sinker region (e.g., portion of the n-type region 34/26/30 and 36/28/32 under the electrical contact 50) (Hwang, Fig. 2, ¶0028) doped with said first dopant type (e.g., n-type doped silicon) and electrically coupled to said sub- collector (e.g., 18), but does not specifically disclose that said RESURF region retards diffusion of dopants from said collector sinker region.
However, Babcock’289 teaches that the diffusion barrier layer (28cp/28cn) including silicon or silicon germanium layer doped with carbon has the effect of retarding the diffusion of boron (Babcock’289, Figs. 2g, 3-4, ¶0032, ¶0046), and the germanium material, such as SiGe layer, is also contemplated to further retard the diffusion of dopant into the epitaxial silicon. In Babcock’289, the diffusion barrier layer (28cp/28cn) (Babcock’289, Figs. 2g, 3-4, ¶0035, ¶0039-¶0040, ¶0042-¶0044) extends under the STI region (29) and the collector sinker region (33) to retard diffusion of dopants from the buried collector region (26’p/26’n) into overlying collector regions (28ep/28en) to optimize the device speed and breakdown performance.
It would have been obvious to a person of ordinary skill in the art before the effective filing date of the invention to further modify the bipolar transistor of Hwang/Chen by forming the RESURF region capable of retarding dopants by doping with carbon as taught by Babcock’289 to have the bipolar transistor, wherein said RESURF region retards diffusion of dopants from said collector sinker region, in order to retard diffusion of dopants from the collector region to optimize the device speed and breakdown performance (Babcock’289, ¶0032, ¶0039-¶0040, ¶0044, ¶0046).
Claim 15 is rejected under 35 U.S.C. 103 as being unpatentable over US 2024/0145462 to Hwang in view of Chen (US 2014/0266407) as applied to claim 14, and further in view of Park et al. (US 2003/0107051, hereinafter Park) and Williams et al. (US 2004/0032005, hereinafter Williams).
Regarding claim 15, Hwang in view of Chen discloses the bipolar transistor of claim 14. Further, Hwang discloses that said sub- collector (e.g., 18) (Hwang, Fig. 2, ¶0014-¶0019) is N-type doped with N-type dopants and said collector (e.g., 26/34/30 and 28/36/32) is N-type doped with N-type dopants, but does not specifically disclose that said sub- collector is arsenic (As) doped and said collector is phosphorus (P) doped.
However, Park teaches a bipolar transistor, wherein a sub- collector (101) (Park, Figs. 1a, 3a-3c, ¶0047, ¶0048, ¶0050) is arsenic (As) doped, and a collector (104/105) is phosphorus (P) doped or arsenic (As) doped at specific concentration, to increase a cut-off frequency of the bipolar device.
Further, Williams teaches that phosphorus (P) (Williams, ¶0091, ¶0121) diffuses faster and arsenic (As) diffuses more slowly, and that the buried layers commonly comprise a slow diffusing dopant, such as arsenic or antimony, to prevent up-diffusion and loss during forming further doped regions in the substrate.
It would have been obvious to a person of ordinary skill in the art before the effective filing date of the invention to further modify the bipolar transistor of Hwang/Chen by forming the sub-collector region by ion implantation and diffusing N-type dopants including arsenic (As) and forming a collector region by ion implantation of N-type dopants including phosphorus (P) as taught by Park and Williams to have the bipolar transistor, wherein said sub- collector is arsenic (As) doped and said collector is phosphorus (P) doped, in order to provide improved bipolar transistor with improved operational stability and increased cut-off frequency of the bipolar device; and to prevent up-diffusion and loss of dopants during forming further doped regions in the substrate (Park, ¶0039-¶0040, ¶0047, ¶0050; Williams, ¶0091, ¶0121).
Claim 17 is rejected under 35 U.S.C. 103 as being unpatentable over US 2024/0145462 to Hwang in view of Chen (US 2014/0266407) as applied to claim 12, and further in view of Babcock et al. (US 2016/0233294, hereinafter Babcock).
Regarding claim 17, Hwang in view of Chen discloses the bipolar transistor of claim 12. Further, Hwang does not specifically disclose that said first dopant type is P type and said second dopant type is N type.
However, Babcock teaches forming complementary bipolar transistor with Resurf effect (Babcock, Fig. 1A, ¶0002, ¶0011, ¶0021-¶0038), wherein Resurf effect is provided by N+ Resurf region and P+ Resurf region for the PNP and NPN bipolar transistors, respectively, to provide a high-performance bipolar transistor with increased breakdown voltage.
It would have been obvious to a person of ordinary skill in the art before the effective filing date of the invention to further modify the bipolar transistor of Hwang/Chen by forming a PNP bipolar transistor with Resurf effect including N-type Resurf region as taught by Babcock to have the bipolar transistor, wherein said first dopant type is P type and said second dopant type is N type (as claimed in claims 17 and 27), in order to provide a high-performance bipolar transistor with increased breakdown voltage (Babcock, ¶0002, ¶0011, ¶0021).
Claim 18 is rejected under 35 U.S.C. 103 as being unpatentable over US 2024/0145462 to Hwang in view of Chen (US 2014/0266407) as applied to claim 12, and further in view of McTaggari et al. (US 2023/0268394, hereinafter McTaggari).
Regarding claim 18, Hwang in view of Chen discloses the bipolar transistor of claim 12. Further, Hwang does not specifically disclose that said bipolar transistor is a silicon only bipolar transistor. However, McTaggari teaches forming a bipolar transistor having different structure including high performance heterojunction bipolar transistor (HBT) or non-heterojunction BJT wherein the same semiconductor material, such as silicon, is used for the base, collector, and emitter (McTaggari, Fig. 1.1A, ¶0022).
It would have been obvious to a person of ordinary skill in the art before the effective filing date of the invention to further modify the bipolar transistor of Hwang/Chen by forming a bipolar transistor having different structure (heterojunction HBT or non-heterojunction BJT) as taught by McTaggari to have the bipolar transistor, wherein said bipolar transistor is a silicon only bipolar transistor, in order to provide a high-performance bipolar transistor suitable for different applications (McTaggari, ¶0017, ¶0022).
Claim 20 is rejected under 35 U.S.C. 103 as being unpatentable over US 2024/0145462 to Hwang in view of Chen (US 2014/0266407) as applied to claim 12, and further in view of Melai et al. (“A New Sub-Micron 24V SiGe:C Resurf HBT”, 2004, Proc. of Int. Symposium on Power Semiconductor Devices, pp.33-36, hereafter Melai).
Regarding claim 20, Hwang in view of Chen discloses the bipolar transistor of claim 12. Further, Hwang does not specifically disclose that a breakdown voltage of said bipolar transistor is increased by up to three volts (3V) due to said RESURF region.
However, Hwang teaches that the p-type doped regions (38/40) are formed by implantation to tune the electrical and physical characteristics of the p-type doped regions (38/40) (Hwang, Fig. 2, ¶0021, ¶0031) that are formed to enhance current performance of the device. Further, the breakdown voltage of the bipolar device is increased by forming the p-type doped regions (38/40) under the isolation region (22) and extending to the underlying deep well region (16) (Hwang, Fig. 2, ¶0033). Further, Melai teaches that the Resurf effect (Melai, Abstract, pp.1-4, Conclusions) allows to improve the breakdown voltage of the bipolar transistor without compromising the cutoff frequency such that a high breakdown voltage greater than 20 V (e.g., 24V) can be combined with a high collector drift doping concentration to achieve the cutoff frequency of about 28 GHz by optimizing the device concept, and this is roughly twice as high as without Resurf effect in the collector region.
Thus, Hwang recognizes that the electrical and physical characteristics of the p-type doped RESURF region impact performance of the bipolar transistor. Further, Melai recognizes that optimizing the RESURF effect in the collector region impacts performance characteristics of the bipolar transistor (e.g., the breakdown voltage and the cutoff frequency). Thus, the RESURF effect in the collector region is a result-effective variable.
It would have been obvious to a person of ordinary skill in the art before the effective filing date of the invention to vary, through routine optimization, the RESURF effect in the collector region as Hwang and Melai have identified the RESURF effect as a result-effective variable. Further, a person of ordinary skill in the art would have had a reasonable expectation of success to arrive at specific breakdown voltage of said bipolar transistor that is increased by up to three volts (3V) due to said RESURF region, in order to provide a bipolar transistor with enhanced current performance and improved breakdown voltage; and to reshape the electric field distribution in the collector region, and to improve the breakdown voltage of the bipolar transistor without compromising the cutoff frequency as taught by Hwang (¶0021, ¶0031, ¶0033) and Melai (Abstract, pp.1-4, Conclusions) (MPEP 2144.05).
It would have been obvious to a person of ordinary skill in the art before the effective filing date of the invention to further modify the bipolar transistor of Hwang by optimizing the RESURF region in the collector region as taught by Melai to have the bipolar transistor, wherein a breakdown voltage of said bipolar transistor is increased by up to three volts (3V) due to said RESURF region, in order to provide a bipolar transistor with enhanced current performance and improved breakdown voltage; and to reshape the electric field distribution in the collector region, and to improve the breakdown voltage of the bipolar transistor without compromising the cutoff frequency (Hwang, ¶0021, ¶0031, ¶0033; Melai, Abstract, pp.1-4, Conclusions).
Claim 23 is rejected under 35 U.S.C. 103 as being unpatentable over US 2024/0145462 to Hwang in view of Babcock’289 (US 2005/0250289).
Regarding claim 23, Hwang discloses the bipolar transistor of claim 22. Further, Hwang does not specifically disclose that said RESURF region retards diffusion of dopants from said collector sinker region.
However, Babcock’289 teaches that the diffusion barrier layer (28cp/28cn) including silicon or silicon germanium layer doped with carbon has the effect of retarding the diffusion of boron (Babcock’289, Figs. 2g, 3-4, ¶0032, ¶0046), and the germanium material, such as SiGe layer, is also contemplated to further retard the diffusion of dopant into the epitaxial silicon. In Babcock’289, the diffusion barrier layer (28cp/28cn) (Babcock’289, Figs. 2g, 3-4, ¶0035, ¶0039-¶0040, ¶0042-¶0044) extends under the STI region (29) and the collector sinker region (33) to retard diffusion of dopants from the buried collector region (26’p/26’n) into overlying collector regions (28ep/28en) to optimize the device speed and breakdown performance.
It would have been obvious to a person of ordinary skill in the art before the effective filing date of the invention to further modify the bipolar transistor of Hwang by forming the RESURF region capable of retarding dopants by doping with carbon as taught by Babcock’289 to have the bipolar transistor, wherein said RESURF region retards diffusion of dopants from said collector sinker region, in order to retard diffusion of dopants from the collector region to optimize the device speed and breakdown performance (Babcock’289, ¶0032, ¶0039-¶0040, ¶0044, ¶0046).
Claim 25 is rejected under 35 U.S.C. 103 as being unpatentable over US 2024/0145462 to Hwang in view of Park (US 2003/0107051) and Williams (US 2004/0032005).
Regarding claim 25, Hwang discloses the bipolar transistor of claim 24. Further, Hwang discloses that said sub- collector (e.g., 18) (Hwang, Fig. 2, ¶0014-¶0019) is N-type doped with N-type dopants and said collector (e.g., 26/34/30 and 28/36/32) is N-type doped with N-type dopants, but does not specifically disclose that said sub- collector is arsenic (As) doped and said collector is phosphorus (P) doped.
However, Park teaches a bipolar transistor, wherein a sub- collector (101) (Park, Figs. 1a, 3a-3c, ¶0047, ¶0048, ¶0050) is arsenic (As) doped, and a collector (104/105) is phosphorus (P) doped or arsenic (As) doped at specific concentration, to increase a cut-off frequency of the bipolar device.
Further, Williams teaches that phosphorus (P) (Williams, ¶0091, ¶0121) diffuses faster and arsenic (As) diffuses more slowly, and that the buried layers commonly comprise a slow diffusing dopant, such as arsenic or antimony, to prevent up-diffusion and loss during forming further doped regions in the substrate.
It would have been obvious to a person of ordinary skill in the art before the effective filing date of the invention to further modify the bipolar transistor of Hwang by forming the sub-collector region by ion implantation and diffusing N-type dopants including arsenic (As) and forming a collector region by ion implantation of N-type dopants including phosphorus (P) as taught by Park and Williams to have the bipolar transistor, wherein said sub- collector is arsenic (As) doped and said collector is phosphorus (P) doped, in order to provide improved bipolar transistor with improved operational stability and increased cut-off frequency of the bipolar device; and to prevent up-diffusion and loss of dopants during forming further doped regions in the substrate (Park, ¶0039-¶0040, ¶0047, ¶0050; Williams, ¶0091, ¶0121).
Claim 27 is rejected under 35 U.S.C. 103 as being unpatentable over US 2024/0145462 to Hwang in view of Babcock (US 2016/0233294).
Regarding claim 27, Hwang discloses the bipolar transistor of claim 21. Further, Hwang does not specifically disclose that said first dopant type is P type and said second dopant type is N type.
However, Babcock teaches forming complementary bipolar transistor with Resurf effect (Babcock, Fig. 1A, ¶0002, ¶0011, ¶0021-¶0038), wherein Resurf effect is provided by N+ Resurf region and P+ Resurf region for the PNP and NPN bipolar transistors, respectively, to provide a high-performance bipolar transistor with increased breakdown voltage.
It would have been obvious to a person of ordinary skill in the art before the effective filing date of the invention to further modify the bipolar transistor of Hwang by forming a PNP bipolar transistor with Resurf effect including N-type Resurf region as taught by Babcock to have the bipolar transistor, wherein said first dopant type is P type and said second dopant type is N type, in order to provide a high-performance bipolar transistor with increased breakdown voltage (Babcock, ¶0002, ¶0011, ¶0021).
Claim 28 is rejected under 35 U.S.C. 103 as being unpatentable over US 2024/0145462 to Hwang in view of McTaggari (US 2023/0268394).
Regarding claim 28, Hwang discloses the bipolar transistor of claim 21. Further, Hwang does not specifically disclose that said bipolar transistor is a silicon only bipolar transistor. However, McTaggari teaches forming a bipolar transistor having different structure including high performance heterojunction bipolar transistor (HBT) or non-heterojunction BJT wherein the same semiconductor material, such as silicon, is used for the base, collector, and emitter (McTaggari, Fig. 1.1A, ¶0022).
It would have been obvious to a person of ordinary skill in the art before the effective filing date of the invention to further modify the bipolar transistor of Hwang by forming a bipolar transistor having different structure (heterojunction HBT or non-heterojunction BJT) as taught by McTaggari to have the bipolar transistor, wherein said bipolar transistor is a silicon only bipolar transistor, in order to provide a high-performance bipolar transistor suitable for different applications (McTaggari, ¶0017, ¶0022).
Claim 30 is rejected under 35 U.S.C. 103 as being unpatentable over US 2024/0145462 to Hwang in view of Melai (“A New Sub-Micron 24V SiGe:C Resurf HBT”, 2004, Proc. of Int. Symposium on Power Semiconductor Devices, pp.33-36).
Regarding claim 30, Hwang discloses the bipolar transistor of claim 21. Further, Hwang does not specifically disclose that a breakdown voltage of said bipolar transistor is increased by up to three volts (3V) due to said RESURF region.
However, Hwang teaches that the p-type doped regions (38/40) are formed by implantation to tune the electrical and physical characteristics of the p-type doped regions (38/40) (Hwang, Fig. 2, ¶0021, ¶0031) that are formed to enhance current performance of the device. Further, the breakdown voltage of the bipolar device is increased by forming the p-type doped regions (38/40) under the isolation region (22) and extending to the underlying deep well region (16) (Hwang, Fig. 2, ¶0033). Further, Melai teaches that the Resurf effect (Melai, Abstract, pp.1-4, Conclusions) allows to improve the breakdown voltage of the bipolar transistor without compromising the cutoff frequency such that a high breakdown voltage greater than 20 V (e.g., 24V) can be combined with a high collector drift doping concentration to achieve the cutoff frequency of about 28 GHz by optimizing the device concept, and this is roughly twice as high as without Resurf effect in the collector region.
Thus, Hwang recognizes that the electrical and physical characteristics of the p-type doped RESURF region impact performance of the bipolar transistor. Further, Melai recognizes that optimizing the RESURF effect in the collector region impacts performance characteristics of the bipolar transistor (e.g., the breakdown voltage and the cutoff frequency). Thus, the RESURF effect in the collector region is a result-effective variable.
It would have been obvious to a person of ordinary skill in the art before the effective filing date of the invention to vary, through routine optimization, the RESURF effect in the collector region as Hwang and Melai have identified the RESURF effect as a result-effective variable. Further, a person of ordinary skill in the art would have had a reasonable expectation of success to arrive at specific breakdown voltage of said bipolar transistor that is increased by up to three volts (3V) due to said RESURF region, in order to provide a bipolar transistor with enhanced current performance and improved breakdown voltage; and to reshape the electric field distribution in the collector region, and to improve the breakdown voltage of the bipolar transistor without compromising the cutoff frequency as taught by Hwang (¶0021, ¶0031, ¶0033) and Melai (Abstract, pp.1-4, Conclusions) (MPEP 2144.05).
It would have been obvious to a person of ordinary skill in the art before the effective filing date of the invention to further modify the bipolar transistor of Hwang by optimizing the RESURF region in the collector region as taught by Melai to have the bipolar transistor, wherein a breakdown voltage of said bipolar transistor is increased by up to three volts (3V) due to said RESURF region, in order to provide a bipolar transistor with enhanced current performance and improved breakdown voltage; and to reshape the electric field distribution in the collector region, and to improve the breakdown voltage of the bipolar transistor without compromising the cutoff frequency (Hwang, ¶0021, ¶0031, ¶0033; Melai, Abstract, pp.1-4, Conclusions).
Response to Arguments
Applicant’s arguments with respect to claims 12-30 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument.
Conclusion
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/NATALIA A GONDARENKO/Primary Examiner, Art Unit 2891
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