Prosecution Insights
Last updated: May 29, 2026
Application No. 18/242,322

PACKAGE WITH EMBEDDED CAPACITORS

Non-Final OA §112
Filed
Sep 05, 2023
Priority
Jun 29, 2017 — MA PI2017702392 +1 more
Examiner
TRAN, TRANG Q
Art Unit
2811
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Intel Corporation
OA Round
6 (Non-Final)
81%
Grant Probability
Favorable
6-7
OA Rounds
0m
Est. Remaining
88%
With Interview

Examiner Intelligence

Grants 81% — above average
81%
Career Allowance Rate
584 granted / 722 resolved
+12.9% vs TC avg
Moderate +7% lift
Without
With
+7.0%
Interview Lift
resolved cases with interview
Typical timeline
2y 8m
Avg Prosecution
25 currently pending
Career history
755
Total Applications
across all art units

Statute-Specific Performance

§101
0.1%
-39.9% vs TC avg
§103
77.0%
+37.0% vs TC avg
§102
17.1%
-22.9% vs TC avg
§112
4.6%
-35.4% vs TC avg
Black line = Tech Center average estimate • Based on career data from 722 resolved cases

Office Action

§112
Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . DETAILED ACTION Claim Rejections - 35 USC § 112 The following is a quotation of the first paragraph of 35 U.S.C. 112(a): (a) IN GENERAL.—The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor or joint inventor of carrying out the invention. The following is a quotation of the first paragraph of pre-AIA 35 U.S.C. 112: The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor of carrying out his invention. Claims 1-15 are rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), first paragraph, as failing to comply with the written description requirement. The claim(s) contains subject matter which was not described in the specification in such a way as to reasonably convey to one skilled in the relevant art that the inventor or a joint inventor, or for applications subject to pre-AIA 35 U.S.C. 112, the inventor(s), at the time the application was filed, had possession of the claimed invention. There is no support in the original specification for the claim limitations of “the conductive trace…vertically beneath a portion of the insulation material, and to a location vertically beneath a portion of the core material, wherein the conductive trace has an end within a width of the one of the discrete capacitors”, as recited in claims 1 and 6. Response to Arguments Applicant’s arguments with respect to claim(s) above have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to TRANG Q TRAN whose telephone number is (571)270-3259. The examiner can normally be reached Monday-Thursday (9am-4pm). Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Lynne Gurley can be reached on 5712721670. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /TRANG Q TRAN/ Primary Examiner, Art Unit 2811
Read full office action

Prosecution Timeline

Show 11 earlier events
Jun 12, 2025
Final Rejection mailed — §112
Aug 15, 2025
Response after Non-Final Action
Sep 12, 2025
Request for Continued Examination
Sep 19, 2025
Response after Non-Final Action
Sep 24, 2025
Non-Final Rejection mailed — §112
Dec 22, 2025
Response Filed
Jan 14, 2026
Final Rejection mailed — §112
Mar 04, 2026
Response after Non-Final Action

Precedent Cases

Applications granted by this same examiner with similar technology

Patent 12642149
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Patent 12642119
CHIP PACKAGE STRUCTURE INCLUDING A SILICON SUBSTRATE INTERPOSER AND METHODS FOR FORMING THE SAME
2y 0m to grant Granted May 26, 2026
Patent 12635559
SEMICONDUCTOR PACKAGE AND METHOD OF FORMING SAME
2y 9m to grant Granted May 19, 2026
Patent 12628708
SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING THE SAME
3y 11m to grant Granted May 12, 2026
Patent 12610525
SEMICONDUCTOR STRUCTURE, METHOD FOR MANUFACTURING SEMICONDUCTOR STRUCTURE, MEMORY AND METHOD FOR MANUFACTURING MEMORY
3y 10m to grant Granted Apr 21, 2026
Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

6-7
Expected OA Rounds
81%
Grant Probability
88%
With Interview (+7.0%)
2y 8m (~0m remaining)
Median Time to Grant
High
PTA Risk
Based on 722 resolved cases by this examiner. Grant probability derived from career allowance rate.

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