DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Status of the Application
1. Acknowledgement is made of the amendment received on 6/1/2026. Claims 1, 2, and 5-22 are pending in this application. Claims 3 & 4 are canceled. Claims 21-22 are new.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
2. Claims 1, 2, 5-9 and 11-16 are rejected under 35 U.S.C. 103 as being unpatentable over Leobandung (US 2018/0331173) in view of Kuo et al. (US 2022/0367734) and Zhang et al. (US 2019/0013269).
Re claim 1, Leobandung teaches, under BRI, Figs. 3-12, [0024, 0031, 0033, 0037, 0041, 0045], an image sensor comprising:
-a lower insulating film (20) arranged over a substrate (8) and having a non-flat surface that has a concave-convex shape (e.g., defined by trenches 22) and comprises a first surface (e.g., upper/higher surface) and at least one second surface (e.g., bottom/lower surface), the first surface (upper/higher surface) extending in a horizontal direction that is parallel to a frontside surface of the substrate (8), and the at least one second surface (bottom/lower surface) extending from the first surface toward the substrate (8) (Fig. 3); and
-a capacitor (e.g., MIM capacitor including 30P, 40, 50P, 60, 70) arranged on the lower insulating film (20) to contact the non-flat surface of the lower insulating film (20) and conformally covering the non-flat surface of the lower insulating film (20) along a contour of the non-flat surface of the lower insulating film (8) (Fig. 10); and
-an upper insulating film (80) covering the capacitor (MIM capacitor) and the lower insulating film (20) (Fig. 12); and
-a first via contact and a second via contact (left right 86), which pass through the upper insulating film (80), the capacitor (MIM capacitor), and the lower insulating film (20) in the vertical direction and are spaced apart from each other in the horizontal direction.
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Leobandung does not teach at least one air gap having a side facing the at least one second surface of the lower insulating film in the horizontal direction, the at least one air gap having a height, which is defined by the upper insulating film, in a vertical direction.
Kou teaches, Fig. 4B, [0021, 0022, 0027], at least one air gap (337-2) having a side facing the at least one second surface of the lower insulating film (331) in the horizontal direction, the at least one air gap (337-2) having a height, which is defined by the upper insulating film (336), in a vertical direction.
As taught by Kou, one of ordinary skill in the art would utilize & modify the above teaching into Leobandung to obtain at least one air gap having a side facing the at least one second surface of the lower insulating film in the horizontal direction, the at least one air gap having a height, which is defined by the upper insulating film, in a vertical direction as claimed, because air gap is recognized as result of a trench filling process, and it aids in reducing warpage/breakage in the formed capacitor array.
Thus, it would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to employ the teaching as taught by Kou in combination with Leobandung due to above reason.
Leobandung/Kou does not explicitly teach the first via contact and the second via contact passing through at least an upper electrode plate of the capacitor.
Zhang teaches, Fig. 7, [0015, 0026], the first via contact and the second via contact (left & right 62) passing through at least an upper electrode plate (30) of the capacitor (32).
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As taught by Zhang, one of ordinary skill in the art would utilize & modify the above teaching to obtain the first via contact and the second via contact passing through at least an upper electrode plate of the capacitor as claimed, because it aids in achieving a compact capacitor integration with reliable isolation abound vias. Further, it has been held that that rearranging part of an invention involves only routine skill in the art. In re Japikse, 86 USPQ 70.
Thus, it would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to employ the teaching as taught by Zhang in combination with Leobandung/Kou due to above reason.
Re claim 2, Leobandung teaches, Fig. 13, wherein the first via contact and the second via contact (left right 86) pass through a section of the capacitor (MIM capacitor) that vertically overlaps (e.g., part of MIM capacitor) a portion of the first surface (upper/higher surface) of the lower insulating film (20), the portion of the first surface (upper/higher) being spaced apart from the at least one second surface (bottom/lower surface) of the lower insulating film (20) in the horizontal direction and having a flat upper surface.
Re claim 5, in combination cited above, Leobandung teaches, Fig. 3, wherein a portion of the lower insulating film (20) comprises a mesa (e.g., protrusion) having a thickness that is greater than thicknesses of other portions of the lower insulating film (20), wherein the first surface of the lower insulating film (20) comprises an upper surface of the mesa (protrusion), the at least one second surface of the lower insulating film (20) comprises a sidewall of the mesa (protrusion), and Kou teaches, Fig. 4B, the at least one air gap (337-2) comprises a first air gap having a side facing the sidewall of the mesa (e.g., protrusion of 331) in the horizontal direction, and wherein the first air gap (337-2) is spaced apart from the sidewall of the mesa (protrusion of 331) with the capacitor (e.g., trench capacitor) therebetween.
Re claim 6, in combination cited above, Leobandung teaches, under BRI, Fig. 3, wherein a portion of the lower insulating film (20) comprises a mesa (consider whole blocks/protrusions of upper portion of 20) having a thickness that is greater than thicknesses of other portions of the lower insulating film (20), wherein a trench (22) is arranged in an upper surface of the mesa, the trench (22) being recessed toward a lower surface of the lower insulating film (20), wherein the first surface of the lower insulating film (20) comprises the upper surface of the mesa, the at least one second surface of the lower insulating film (20) comprises a sidewall of the mesa portion and an inner sidewall of the trench (22), and Kou teaches, Fig. 4B, abstract, [0021, 0022, 0027], the at least one air gap comprises a first air gap (left 337-2) having a side facing the sidewall of the mesa (defined by 31) in the horizontal direction and a second air gap (right 337-2) having a side facing the inner sidewall of the trench (in between 331) in the horizontal direction, and wherein the second air gap (right 337-2) overlaps the capacitor (trench capacitor) in the vertical direction and is spaced apart from the inner sidewall of the trench with the capacitor (trench capacitor) therebetween.
Re claim 7, in combination cited above, Leobandung teaches, Fig. 3, wherein a trench (22) is arranged in an upper surface of the lower insulating film (20), the trench (22) being recessed toward a lower surface of the lower insulating film (20), and wherein the first surface of the lower insulating film (20) comprises the upper surface of the lower insulating film (20), the at least one second surface of the lower insulating film comprises an inner sidewall of the trench (22), and Kou teaches, Fig. 4B, the at least one air gap (337-2) comprises an air gap facing the inner sidewall of the trench (defined by 331) in the horizontal direction.
Re claim 8, Leobandung teaches, Fig. 10, [0033, 0037, 0044], wherein the capacitor comprises a metal-insulator-metal (MIM) capacitor (e.g., MIM capacitor) comprising a plurality of electrode plates (30P, 50P, 70) that are sequentially stacked on the lower insulating film (20), wherein the plurality of electrode plates (30, 50, 70) comprise: a lower electrode plate (30P); the upper electrode plate (70); and at least one intermediate electrode plate (50P) between the lower electrode plate (30P) and the upper electrode plate (70), and wherein the MIM capacitor further comprises a plurality of dielectric films (40, 60) each arranged between electrode plates (30P, 50P, 70) adjacent to each other from among the lower electrode plate (30P), the upper electrode plate (70), and the at least one intermediate electrode plate (50P), such that the lower electrode plate (30P), the upper electrode plate (70), and the at least one intermediate electrode plate (50P) are spaced apart from each other.
Re claim 9, Leobandung teaches, Figs. 10-13, [0047-0048], wherein the capacitor (MIM capacitor) comprises: a lower electrode plate (90); the upper electrode plate (98); an intermediate electrode plate (94) between the lower electrode plate (90) and the upper electrode plate (98); and a plurality of dielectric films (90, 96) each arranged between electrode plates (90, 94, 98) adjacent to each other from among the lower electrode plate (90), the upper electrode plate (98), and the intermediate electrode plate (94), such that the lower electrode plate (90), the upper electrode plate (98), and the intermediate electrode plate (94) are spaced apart from each other, wherein the first via contact (left 86) is in contact with the lower electrode plate (90) and the upper electrode plate (98) and is spaced apart from the intermediate electrode plate (94), and wherein the second via contact (right 86) is in contact with the intermediate electrode plate (94) and is spaced apart from the lower electrode plate (90) and the upper electrode plate (98).
Re claim 11, Leobandung teaches, under BRI, Figs. 3-13, [0022, 0024, 0031, 0033, 0037, 0041, 0045, 0047], an image sensor comprising:
-a plurality of lower wiring patterns (16, 18) over a substrate (8);
-a lower insulating film (20) covering the plurality of lower wiring patterns (16, 18) and having a surface that has a concave-convex shape (e.g., defined by trenches 22) and comprises a first surface (e.g., upper/higher surface) and at least one second surface (e.g., bottom/lower surface), the first surface (upper/higher surface) extending in at least one of a first horizontal direction and a second horizontal direction, which are parallel to a frontside surface of the substrate (8), and the at least one second surface (bottom/lower surface) extending from the first surface toward the substrate (8);
-at least one capacitor (e.g., MIM capacitor includes 30P, 40, 50P, 60, 70) arranged on the lower insulating film (20) to contact the surface of the lower insulating film (20), the at least one capacitor (MIM capacitor) conformally covering the surface of the lower insulating film (20) along a contour of the concave-convex shape of the surface of the lower insulating film (20) (Fig. 10);
an upper insulating film (80) covering the at least one capacitor (MIM capacitor) and the lower insulating film (20);
-a plurality of upper wiring patterns (left right 88) on the upper insulating film (80); and
-a first via contact and a second via contact (left right 86), each passing through the at least one capacitor (MIM capacitor), and each connected between one of the plurality of lower wiring patterns (16, 18) and one of the plurality of upper wiring patterns (left right 88), the first via contact and the second via contact (left right 86) being spaced apart from each other in the second horizontal direction (Fig. 13).
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Leobandung does not teach at least one air gap adjacent to the at least one second surface of the lower insulating film in the first horizontal direction or the second horizontal direction, the at least one air gap having a height, which is defined by the upper insulating film, in a vertical direction;
Kou teaches, Fig. 4B, [0021, 0022, 0027], at least one air gap (337-2) adjacent to the at least one second surface of the lower insulating film (331) in the first horizontal direction or the second horizontal direction, the at least one air gap (337-2) having a height, which is defined by the upper insulating film (336), in a vertical direction.
As taught by Kou, one of ordinary skill in the art would utilize & modify the above teaching into Leobandung to obtain at least one air gap having a side facing the at least one second surface of the lower insulating film in in the first horizontal direction or the second horizontal direction, the at least one air gap having a height, which is defined by the upper insulating film, in a vertical direction as claimed, because air gap is recognized as result of a trench filling process, and it aids in reducing warpage/breakage in the formed capacitor array.
Thus, it would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to employ the teaching as taught by Kou in combination with Leobandung due to above reason.
Leobandung/Kou does not explicitly teach the first via contact and the second via contact, each passing, in a vertical direction, through at least an upper electrode plate of the at least one capacitor, at a location where it covers the first surface of the lower insulating film.
Zhang teaches, Fig. 7, [0015, 0026], the first via contact and the second via contact (left & right 62) each passing, in a vertical direction, through at least an upper electrode plate (30) of the at least one capacitor (32), at a location where it covers the first surface of the lower insulating film (20).
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As taught by Zhang, one of ordinary skill in the art would utilize & modify the above teaching to obtain the first via contact and the second via contact, each passing, in a vertical direction, through at least an upper electrode plate of the at least one capacitor, at a location where it covers the first surface of the lower insulating film as claimed, because it aids in achieving a compact capacitor integration with reliable isolation abound vias. Further, it has been held that that rearranging part of an invention involves only routine skill in the art. In re Japikse, 86 USPQ 70.
Thus, it would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to employ the teaching as taught by Zhang in combination with Leobandung/Kou due to above reason.
Re claim 12, in combination cited above, Leobandung teaches, Fig. 3, wherein a portion of the lower insulating film (20) comprises a mesa (e.g., protrusion) having a thickness that is greater than thicknesses of other portions of the lower insulating film (20), and wherein the first surface of the lower insulating film (20) comprises an upper surface of the mesa (protrusion), the at least one second surface of the lower insulating film (20) comprises a sidewall of the mesa (protrusion), and Kou teaches, Fig. 4B, the at least one air gap (337-2) comprises a first air gap adjacent to the sidewall of the mesa (e.g., protrusion of 331) in the first horizontal direction or the second horizontal direction.
Re claim 13, in combination cited above, Leobandung teaches, Fig. 3, wherein a portion of the lower insulating film (20) comprises a mesa (e.g., protrusion) having a thickness that is greater than thicknesses of other portions of the lower insulating film (20), wherein a trench (22) is arranged in an upper surface of the lower insulating film (20), the trench (22) being recessed toward a lower surface of the lower insulating film (20), and wherein the first surface of the lower insulating film (20) comprises the upper surface of the lower insulating film (20), the at least one second surface of the lower insulating film (20) comprises a sidewall of the mesa (e.g., protrusion) and an inner sidewall of the trench (22), and Kou teaches, Fig. 4B, the at least one air gap (337-2) comprises a first air gap (left 337-2) adjacent to the sidewall of the mesa (defined by 331) in the first horizontal direction or the second horizontal direction and a second air gap (right 337-2) adjacent to the inner sidewall of the trench in the second horizontal direction.
Re claim 14, in combination cited above, Leobandung teaches, Fig. 3, wherein a trench (22) is arranged in an upper surface of the lower insulating film (20), the trench (22) being recessed toward a lower surface of the lower insulating film (20), and wherein the first surface of the lower insulating film (20) comprises the upper surface of the lower insulating film (20), the at least one second surface of the lower insulating film (20) comprises an inner sidewall of the trench (22), and Kou teaches, Fig. 4B, the at least one air gap comprises an air gap (337-2) adjacent to the inner sidewall of the trench (defined by 31) in the second horizontal direction.
Re claim 15, Leobandung teaches, Fig. 10, [0033, 0037, 0044], wherein the at least one capacitor comprises a metal-insulator-metal (MIM) capacitor (MIM capacitor) comprising a plurality of electrode plates (30P, 50P, 70) that are sequentially stacked on the lower insulating film (20), wherein the plurality of electrode plates comprise: a lower electrode plate (30P); the upper electrode plate (70); and at least one intermediate electrode plate (50P) between the lower electrode plate (30P) and the upper electrode plate (70), and wherein the MIM capacitor further comprises a plurality of dielectric films (40, 60) each arranged between electrode plates (30P, 50P, 70) adjacent to each other from among the lower electrode plate (30P), the upper electrode plate (70), and the at least one intermediate electrode plate (50P), such that the lower electrode plate (30P), the upper electrode plate (70), and the at least one intermediate electrode plate (50P) are spaced apart from each other.
Re claim 16, Leobandung teaches, Fig. 13, [0047-0048], wherein the at least one capacitor comprises: a lower electrode plate (90); the upper electrode plate (98); an intermediate electrode plate (94) between the lower electrode plate and the upper electrode plate; and a plurality of dielectric films (92, 96) each arranged between electrode plates (90, 94, 98) adjacent to each other from among the lower electrode plate (90), the upper electrode plate (98), and the intermediate electrode plate (94), such that the lower electrode plate (90), the upper electrode plate (98), and the intermediate electrode plate (94) are spaced apart from each other, wherein the first via contact (left 86) is in contact with the lower electrode plate (90) and the upper electrode plate (98) and is spaced apart from the intermediate electrode plate (94), and wherein the second via contact (right 86) is in contact with the intermediate electrode plate (94) and is spaced apart from the lower electrode plate (90) and the upper electrode plate (98).
3. Claims 10 and 17 are rejected under 35 U.S.C. 103 as being unpatentable over Leobandung as modified by Kuo/Zhang as applied to claims 1 & 11 above, and further in view of Yano et al. (US 2013/0258545).
The teachings of Leobandung/Kuo/Zhang have been discussed above.
Re claims 10 & 17, Leobandung teaches, Fig. 13, [0047-0048], wherein the capacitor comprises: a lower electrode plate (90); the upper electrode plate (98); a first intermediate electrode plate (94) from the lower electrode plate (90) toward the upper electrode plate (98); and a plurality of dielectric films (92, 96) each arranged between electrode plates adjacent to each other from among the lower electrode plate (90), the upper electrode plate (98), the first intermediate electrode plate (94) such that the lower electrode plate (90), the upper electrode plate (98), the first intermediate electrode plate (94) are spaced apart from each other.
Leobandung/Kou does not teach a first intermediate electrode plate, a second intermediate electrode plate, and a third intermediate electrode plate, which are arranged between the lower electrode plate and the upper electrode plate and stacked in the stated order, wherein the first via contact is in contact with the lower electrode plate, the second intermediate electrode plate, and the upper electrode plate and is spaced apart from the first intermediate electrode plate and the third intermediate electrode plate, and wherein the second via contact is in contact with the first intermediate electrode plate and the third intermediate electrode plate and is spaced apart from the lower electrode plate, the second intermediate electrode plate, and the upper electrode plate.
Yano teaches, Fig. 1A, [0019], a first intermediate electrode plate, a second intermediate electrode plate, and a third intermediate electrode plate (3 middle electrode layers 13), which are arranged between the lower electrode plate (bottommost 13) and the upper electrode plate (uppermost 13) and stacked in the stated order, wherein the first via contact (second 14 from left) is in contact with the lower electrode plate (bottommost 13), the second intermediate electrode plate (center 13), and the upper electrode plate (uppermost 13) and is spaced apart from the first intermediate electrode plate (lower 13) and the third intermediate electrode plate (upper 13), and wherein the second via (left 14) contact is in contact with the first intermediate electrode plate (lower 13) and the third intermediate electrode plate (upper 13) and is spaced apart from the lower electrode plate (bottom 13), the second intermediate electrode plate (center 13), and the upper electrode plate (uppermost 13).
As taught by Yano, one of ordinary skill in the art would utilize & modify the above teaching to obtain stack of intermediate electrode plates and first/second via contacts as claimed, because it aids in achieving thin film capacitor having improved stability of electric connection.
Thus, it would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to employ the teaching as taught by Yano in combination with Leobandung/Kou/Zhang due to above reason.
4. Claims 18 and 19 are rejected under 35 U.S.C. 103 as being unpatentable over Leobandung as modified by Kuo/Zhang as applied to claim 11 above, and further in view of Baek et al. (US 2020/0389608).
The teachings of Leobandung/Kou/Zhang have been discussed above.
Re claim 18, Leobandung/Kou/Zhang does not teach a plurality of photodiodes in the substrate, wherein the at least one capacitor comprises a plurality of capacitors, which are arranged over the substrate and respectively overlap the plurality of photodiodes in the vertical direction, and the plurality of capacitors are arranged at regular pitches in the first horizontal direction and the second horizontal direction.
Baek teaches, Figs. 6A-B, [0032, 0056, 0058], a plurality of photodiodes (111) in the substrate (101), wherein the at least one capacitor comprises a plurality of capacitors (LC, UC), which are arranged over the substrate (101) and respectively overlap the plurality of photodiodes (111) in the vertical direction, and the plurality of capacitors (LC, UC) are arranged at regular pitches in the first horizontal direction and the second horizontal direction (Fig. 6B).
As taught Baek, one of ordinary skill in the art would utilize & modify the above teaching to obtain a plurality of photodiodes and plurality of capacitors as claimed, because it aids in achieving an image sensor with improved shutter efficiency.
Thus, it would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to employ the teaching as taught by Baek in combination with Leobandung/Kou/Zhang due to above reason.
Re claim 19, in combination cited above, Baek teaches, Fig. 6B, [0032, 0056, 0058], a plurality of photodiodes (111) in the substrate (101), wherein the at least one capacitor comprises a plurality of capacitors (UC, LC), which are arranged over the substrate (101) and respectively overlap the plurality of photodiodes (101) in the vertical direction, and the plurality of capacitors comprise sets of two capacitors (LC1, LC2), wherein set of two capacitors overlaps one photodiode (111) selected from the plurality of photodiodes in the vertical direction and are includes two capacitors (LC1, LC2) spaced apart from each other in the first horizontal direction.
5. Claims 21 and 22 are rejected under 35 U.S.C. 103 as being unpatentable over Leobandung as modified by Kuo/Zhang as applied to claim 1 above, and further in view of Chang et al. (US 2022/0059546).
The teachings of Leobandung/Kou/Zhang have been discussed above.
Re claim 21, Leobandung/Kou/Zhang does not explicitly teach wherein the at least one air gap is formed horizontally adjacent to the capacitor and between the capacitor and an additional capacitor formed on the lower insulating film.
Chang teaches, Fig. 2N, [0027, 0043], wherein the at least one air gap (AG) is formed horizontally adjacent to the capacitor and between the capacitor and an additional capacitor (defined by CC1, 216a, CC2) formed on the lower insulating film (207).
As taught by Chang, one of ordinary skill in the art would utilize & modify the above teaching to obtain the air gap as claimed, because it aids in reducing parasitic capacitance and enhancing reliability of the DRAM.
Thus, it would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to employ the teaching as taught by Chang in combination with Leobandung/Kou/Zhang due to above reason.
Re claim 22, in combination cited above, Kou does teach, Figs. 4A-B, [0016, 0027], the capacitor (321) includes a trench therein, in which additional air gap (first air gap, 02-50nm) smaller than the at least one air gap (second air gap, 100-500nm) is provided.
6. Claim 20 is rejected under 35 U.S.C. 103 as being unpatentable over Leobandung in view of Kuo, Chang et al. (US 2022/0059546) and Baek.
Re claim 20, Leobandung teaches, under BRI, Figs. 3-12, [0024, 0031, 0033, 0037, 0041, 0045], an image sensor comprising:
-a lower insulating film (20) arranged over a substrate (8) and having a surface that has a concave-convex shape (e.g., defined by trenches 22) and comprises a first surface (e.g., upper/higher surface) and at least one second surface (e.g., bottom/lower surface), the first surface (upper/higher surface) extending in a horizontal direction that is parallel to a frontside surface of the substrate (8), and the at least one second surface (bottom/lower surface) extending from the first surface toward the substrate (8) (Fig. 3); and
-a capacitor (e.g., MIM capacitor including 30P, 40, 50P, 60, 70) arranged on the lower insulating film (20) to contact the surface of the lower insulating film (20) and conformally covering the surface of the lower insulating film (20) along a contour of the concave-convex shape of the lower insulating film (8) (Fig. 10); and
-an upper insulating film (80) covering the capacitor (MIM capacitor) and the lower insulating film (20) (Fig. 12).
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Leobandung does not teach at least one air gap having a side facing the at least one second surface of the lower insulating film in the horizontal direction, the at least one air gap formed in the upper insulating film.
Kou teaches, Fig. 4B, [0021, 0022, 0027], at least one air gap (337-2) having a side facing the at least one second surface of the lower insulating film (331) in the horizontal direction, the at least one air gap (337-2) formed in the upper insulating film (336).
As taught by Kou, one of ordinary skill in the art would utilize & modify the above teaching into Leobandung to obtain at least one air gap having a side facing the at least one second surface of the lower insulating film in the horizontal direction, the at least one air gap formed in the upper insulating film as claimed, because air gap is recognized as result of a trench filling process, and it aids in reducing warpage/breakage in the formed capacitor array.
Thus, it would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to employ the teaching as taught by Kou in combination with Leobandung due to above reason.
Leobanddung/Kou does not explicitly teach the at least one air gap horizontally adjacent to and not vertically overlapping the capacitor.
Chang teaches, Fig. 2N, the at least one air gap (AG) horizontally adjacent to and not vertically overlapping the capacitor (defined by CC1, CC2, 216a or 230 in Fig. 5).
As taught by Chang, one of ordinary skill in the art would utilize & modify the above teaching to obtain the at least one air gap horizontally adjacent to and not vertically overlapping the capacitor as claimed, because it aids in reducing parasitic capacitance and enhancing reliability of the DRAM.
Thus, it would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to employ the teaching as taught by Chang in combination with Leobandung/Kou due to above reason.
Leobandung/Kou/Chang does not teach an electronic system comprising: at least one camera module comprising the image sensor; and a processor configured to process image data from the at least one camera module.
Baek teaches, [0003], at least one camera module (e.g., digital, security camera) comprising the image sensor; and a processor (within the camera) configured to process image data from the at least one camera module.
As taught by Baek, one of ordinary skill in the art would utilize & modify the above teaching to obtain an electronic system with camera module & processor as claimed, because it aids in achieving a desired electronic system in which, in global shutter operation, lost of charges and occurrence of noise are reduced and shutter efficiency is improved.
Thus, it would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to employ the teaching as taught by Baek in combination with Leobandung/Kou/Chang due to above reason.
Response to Arguments
7. Applicant's arguments with respect to claims have been considered but are moot in view of the new ground(s) of rejection. Response to arguments on newly added limitations are responded to in the above rejection.
Conclusion
8. Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to DUY T.V. NGUYEN whose telephone number is (571)270-7431. The examiner can normally be reached Monday-Friday, 7AM-4PM, alternative Friday off.
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/DUY T NGUYEN/Primary Examiner, Art Unit 2818 6/11/26
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