DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Status of the Application
This Office Action is in response to Applicant’s application 18/242,867 filed on September 2, 2021 in which claims 9- 14 and 21-34 are pending.
Drawings
The drawings submitted on September 06 2023 have been reviewed and accepted by the Examiner.
Notation
References to patents will be in the form of (C: L) where C is the column number and L is the line number. References to pre-grant patent publications will be to the paragraph number in the form of (¶ xxxx).
Election/Restrictions
Applicant’s election without traverse of claims 9-14 in the reply filed on February 24 2026 is acknowledged. Claims 1-8 and 15-20 withdrawn from further consideration pursuant to 37 CFR 1.142(b) as being drawn to a nonelected invention, there being no allowable generic or linking claim. Claims 1-8 and 15-20 are canceled.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claim 28 recites the limitation "faces electrode layer " in “the first surface faces electrode layer.” There is insufficient antecedent basis for this limitation in the claim. The following limitation should define which electrode layer is it the top electrode layer or bottom electrode layer. The office interprets this limitation as faces the top electrode layer.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claims 21, 23, 28 and 30 are rejected under AIA 35 U.S.C. 102(a)(1) as being anticipate by Trinh et al. (US 2017/0141300 A1; hereinafter “Trinh”).
Regarding claim 21, Trinh teaches in Figures 1-18B and related text e.g. a manufacturing method of a semiconductor device, comprising:
forming a bottom electrode layer (312; Fig.7; ¶ 0032);
forming an insulator layer (308; Fig.8; ¶ 0032) on the bottom electrode layer (312);
forming a top electrode layer (304; Fig.8; ¶ 0034) on the insulator layer (308), wherein the top electrode layer (304), the insulator layer (308) and the bottom electrode layer (304) form a metal-insulator-metal structure (MIM capacitor; ¶ 0034);
forming a hard mask layer (902; Fig. 9; ¶ 0058) on the top electrode layer (304); and sequentially etching the hard mask layer (902; Fig.9-10; etched as shown; ¶ 0059), the top electrode layer (304), the insulator layer (308; Fig.12; ¶ 0060) and the bottom electrode layer (312), wherein part the top electrode layer located between the hard mask and the insulator layer is removed (left part of 304 that is formed between 902 and 308 is removed as shown in figure Figures 9 and 10) ,and part of the bottom electrode layer located below the insulator layer is removed (left part of 312 formed under 308 is removed as shown in Figures 11 and 12).
Regarding claim 23, Trinh teaches in Figures 1-18B and related text e.g. wherein the hard mask layer is etched through a vertical etching step (vertical etching step Fig. 9).
Regarding claim 28, Trinh teaches in Figures 1-18B and related text e.g. a manufacturing method of a semiconductor device, comprising:
forming a bottom electrode layer (312; Fig.7; ¶ 0032);
forming an insulator layer (308; Fig.8; ¶ 0032) on the bottom electrode layer (312);
forming a top electrode layer (304; Fig.8; ¶ 0034) on the insulator layer (308), wherein the top electrode layer (304), the insulator layer (308) and the bottom electrode layer (304) form a metal-insulator-metal structure (MIM capacitor; ¶ 0034);
forming a hard mask layer (902; Fig. 9; ¶ 0058) on the top electrode layer (304); and sequentially etching the hard mask layer (902; Fig.9-10; etched as shown; ¶ 0059), the top electrode layer (304), the insulator layer (308; Fig.12; ¶ 0060) and the bottom electrode layer (312), wherein part of a first surface (right side of 308 that is exposed by 306; Fig.12) and part of a second surface of the insulator layer are exposed (left side of 308 that is exposed by 306; Fig.12), the first surface faces electrode layer (left side faces 306), and the second surface faces the bottom electrode layer (right side faces 310; The limitation “faces” is a broad limitation and in a semiconductor device all the surface of the layers faces each other).
Regarding claim 30, Trinh teaches in Figures 1-18B and related text e.g. wherein the hard mask layer is etched through a vertical etching step (vertical etching step Fig. 9).
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries set forth in Graham v. John Deere Co., 383 U.S. 1, 148 USPQ 459 (1966), that are applied for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claims 24 and 31 are rejected under 35 U.S.C. 103 as being unpatentable over by Trinh et al. (US 2017/0141300 A1; hereinafter “Trinh”) as applied to claims 21 and 28 above, and further in view of Chen et al. (US 2017/0278921 A1; herein after “Chen”).
Regarding claim 24, Trinh does not explicitly state wherein the hard mask layer, the top electrode layer, the insulator layer and the bottom electrode layer are etched in same chamber with different parameters.
However, Chen teaches multiple layers including a top electrode (70, Fig.5; ¶ 0032) and a mask (72, Fig.5; ¶ 0032) are etched in same chamber with different parameters (¶ 0032).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filling date of the invention, to have the hard mask layer, the top electrode layer, the insulator layer and the bottom electrode layer are etched in same chamber with different parameters in the device of Trinh as taught by Chen for the purpose of preventing oxidation of the etched surface and improve device reliability.
Regarding claim 31, Trinh does not explicitly state wherein the hard mask layer, the top electrode layer, the insulator layer and the bottom electrode layer are etched in same chamber with different parameters.
However, Chen teaches multiple layers including a top electrode (70, Fig.5; ¶ 0032) and a mask (72, Fig.5; ¶ 0032) are etched in same chamber with different parameters (¶ 0032).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filling date of the invention, to have the hard mask layer, the top electrode layer, the insulator layer and the bottom electrode layer are etched in same chamber with different parameters in the device of Trinh as taught by Chen for the purpose of preventing oxidation of the etched surface and improve device reliability.
Allowable Subject Matter
Claims 9-14 are allowed.
Claims 22, 25-27, 29 and 32-34 objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is a statement of reasons for the indication of allowable subject matter:
Claim 9 is allowed over the prior art since the prior art does not teach the exact order of the following limitations: “… sequentially etching the hard mask layer, the top electrode layer, the insulator layer and the bottom electrode layer; wherein the top electrode layer is etched through a lateral-and-vertical etching step, the insulator layer is etched through a vertical etching step, and the bottom electrode layer is etched through a lateral-and-vertical etching step” with the rest of the limitations of claim 9.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Mounir S Amer whose telephone number is (571)270-3683. The examiner can normally be reached Monday-Friday 9:00-5:30.
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/Mounir S Amer/Primary Examiner, Art Unit 2818