DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Terminal Disclaimer
The terminal disclaimer filed on 6/22/2026 disclaiming the terminal portion of any patent granted on this application which would extend beyond the expiration date of Application No. 18/371,531 (US20250107161A1-Mendez31) has been reviewed and is accepted. The terminal disclaimer has been recorded.
Response to Amendment
The amendment filed on 08/17/2026 has been accepted and entered. Claims 1-16 remain pending in this application.
Interview Summary
During the interview conducted on August 13, 2026 with Attorney of record Merle Richman and Inventor Juan Mendez, the Inventor confirmed that any apparatus having the same structure, would have the same capabilities.
The 102 rejection of claim 1 was discussed in view of Mendez et al. ("Quantum Transport Simulations for Si- P δ-layer Tunnel Junctions", PPT presentation at 2021 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD) (2021)-NPLMendez21PPT). The Applicant's amendment proposal of claim 1, especially "wherein the gap provides charge-sensing of charged entity placed near the gap.", does not appear to overcome the current prior art (NPLMendez21PPT: Slide 3).
In view of this discussion, Applicant will determine the appropriate next steps in response to the Non-Final OA mailed on 02/20/2026. No agreement was reached regarding patentability of the application; further search and consideration are required.
Claim Objections
Claims 1-11 are objected to because of the following informalities:
Claim 1 recites “when a charge entity is placed near the gap” in Line L10 but should read -- when the charge entity is placed near the gap--.
The balance of claims are objected to for being dependent upon an already objected claim.
Appropriate correction is required.
Claim Interpretation
The claims in this application are given their broadest reasonable interpretation using the plain meaning of the claim language in light of the specification as it would be understood by one of ordinary skill in the art. The broadest reasonable interpretation of a claim element (also commonly referred to as a claim limitation) is limited by the description in the specification.
Under a broadest reasonable interpretation (BRI), words of the claim must be given their plain meaning, unless such meaning is inconsistent with the specification. The plain meaning of a term means the ordinary and customary meaning given to the term by those of ordinary skill in the art at the relevant time. The ordinary and customary meaning of a term may be evidenced by a variety of sources, including the words of the claims themselves, the specification, drawings, and prior art (MPEP 2111.01.(I)).
The paragraph [0041] gives an example of location of the charged impurity as being the location 610 where the current increases by 185%. The associated Fig 6 shows that the given percentage 185% corresponds to two areas in a boomerang shape cloud. In light of the drawing, the term location has been interpretated as being somewhere near these two areas.
Regarding claim 5, Applicant is obligated to present what was deleted from the claim while adding the amended new limitations. The claim 5 has been interpreted as having the following limitation “wherein the substrate body and the cap are formed of a semiconductor material” deleted. The Examiner requests confirmation, in the next response, that the examiner’s interpretation was correct.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 1-16 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Regarding claim 1, the limitation " the device" in Line L2, renders the claim indefinite because the antecedent basis is unclear as to whether “the device” (Line L2) refers to a new device or the “charge-sensing semiconductor device” previously cited in Line L1. In the purpose of compact prosecution, “the device” has been interpretated as the charge-sensing semiconductor device.
Regarding claim 1, the limitation " the presence" in Line L10, renders the claim indefinite because there is no antecedent basis. In the purpose of compact prosecution, “the presence” has been interpretated as a presence.
Claims 1, 5, and 12 recite “near”. The term "near" is a relative term which renders the claim indefinite; it is not defined by the claim, the specification does not provide a standard for ascertaining the requisite degree, and one of ordinary skill in the art would not be reasonably apprised of the scope of the invention. “Near” is defined as " at, within, or to a short distance or time” (see Merriam-webster.com). This language is indefinite as the specification does not describe what near means in regard of being placed near the device Would this mean that the charged entity is 1nm away from the device, or 10 nm away from the device? Thus, it is unclear because defining how the charge entity can be placed near the device or not is not clearly defined. Thus, determining whether one is infringing the limitation is subjective, rather than objective, and thus the claim is unclear.
Regarding claim 5, the limitation "a charge entity" in Lines L1-2, renders the claim indefinite because the antecedent basis is unclear as to whether “a charge entity” (Lines L1-2) refers to a new charged entity or the “charge entity” previously cited in claim 1 Lines L1-2. In the purpose of compact prosecution, “a charge entity” has been interpretated as the charge entity.
Regarding claim 5, the limitation "a function of tunneling current" in Line L3, renders the claim indefinite because the antecedent basis is unclear as to whether “a function of tunneling current" in Line L3, refers to a new function of tunneling current or the “function of tunneling current” previously cited in claim 1 Line L11. In the purpose of compact prosecution, “a function of tunneling current” has been interpretated as the function of tunneling current.
Regarding claim 5, the limitation " location" in Line L2, renders the claim indefinite because there is no antecedent basis. In the purpose of compact prosecution, “the location” has been interpretated as a location.
Regarding claim 12, the limitation " the presence" in Line L11, renders the claim indefinite because there is no antecedent basis. In the purpose of compact prosecution, “the presence” has been interpretated as a presence.
The balance of claims are rejected to for being dependent upon an already rejected claim.
Appropriate correction is required.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claim(s) 1-6 and 8-15 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Mendez et al. ("Quantum Transport Simulations for Si- P δ-layer Tunnel Junctions", PPT presentation at 2021 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD) (2021)-NPLMendez21PPT).
Regarding claim 1, NPLMendez21PPT discloses a charge-sensing semiconductor device for detecting (Examiner's annotated Slide 3) when a charged entity (a charge entity is defined in [0035] of the Application Specification, as being a single donor atom of an element which is placed in cap 326 which can also be a single charge impurity in the tunnel gap, which is placed near the device as being in the tunnel gap-Slide 15 L 5-8) is placed near the device, comprising:
a substrate body (Substrate body p-type Si Substrate-Examiner's annotated Slide 3);
a source formed along a first sidewall of the substrate body (Source formed along a first sidewall of the substrate body-Examiner's annotated Slide 3);
a drain formed along a second sidewall of the substrate body(Drain formed along a second sidewall of the substrate body-Examiner's annotated Slide 3);
first and second delta layers disposed on the substrate body and separated by a gap (First and second delta layers disposed on the substrate body, separated by a gap, and embedded between the substrate body and the cap-Examiner's annotated Slide 3),
wherein the first delta layer is in contact with the source (First delta layer disposed on the substrate body, separated from second delta-layer by a gap, and in contact with the source-Examiner's annotated Slide 3) and
the second delta layer is in contact with the drain (Second delta layer disposed on the substrate body, separated from first delta-layer by a gap, and in contact with the drain-Examiner's annotated Slide 3); and
a cap disposed over the first and second delta layers (Cap disposed over first and second delta layers-Examiner's annotated Slide 3),
wherein when a charged entity is placed near the gap the presence of the charged entity is signaled as a function of tunneling current in the gap (a charge entity is defined in [0035] of the Application Specification, as being a single donor atom of an element which is placed in cap 326 which can also be a single charge impurity in the tunnel gap, which is placed near the device as being in the tunnel gap. The charged impurity can alter the tunneling rate so being signaling as a function of tunneling rate in the gap. The tunneling rate is defined as a current ratio, so the charged impurity can alter the tunneling current so being signaling as a function of tunneling current in the gap -Slide 10, Slide 15 L 5-8).
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Regarding claim 2, NPLMendez21PPT discloses all the elements of claim 1, as noted above.
NPLMendez21PPT further discloses a charge-sensing semiconductor device
wherein the first and second delta layers are embedded between the substrate body and the cap (First and second delta layers disposed on the substrate body, separated by a gap, and embedded between the substrate body and the cap-Examiner's annotated Slide 3).
Regarding claim 3, NPLMendez21PPT discloses all the elements of claim 1, as noted above.
NPLMendez21PPT further discloses a charge-sensing semiconductor device
wherein the gap is embedded between the substrate body and the cap (Gap embedded between the substrate body and the cap-Examiner's annotated Slide 3).
Regarding claim 4, NPLMendez21PPT discloses all the elements of claim 1, as noted above.
NPLMendez21PPT further discloses a charge-sensing semiconductor device
wherein the first and second delta layers are formed by thin layers of phosphorus (First and second delta layers are mono-layers of Phosphorus (P), so thin layers of Phosphorus-Examiner's annotated Slide 3).
Regarding claim 5, NPLMendez21PPT discloses all the elements of claim 1, as noted above.
NPLMendez21PPT further discloses a charge-sensing semiconductor device
wherein when a charged entity is placed near the gap the presence and location of the charged entity is signaled as a function of tunneling current in the gap (a charge entity is defined in [0035] of the Application Specification, as being a single donor atom of an element which is placed in cap 326 which can also be a single charge impurity in the tunnel gap, which is placed near the device as being in the tunnel gap. The charged impurity can alter the tunneling rate so being signaling as a function of tunneling rate in the gap. The tunneling rate is defined as a current ratio, so the charged impurity can alter the tunneling current so being signaling as a function of tunneling current in the gap. Additionally, the two delta layers disposed on a substrate and separated by a gap has all the element of the apparatus so having the capability to signal both the presence and the location of the charged entity near the gap -Slide 10, Slide 15 L 5-8, Examiner's annotated Slide 3. Reference teaches the structure and the applicant admitted during the interview on 08/13/2026 that apparatus with the same structure has the same capabilities see attached PTO-413 interview summary).
As stated in MPEP 2114.(II), “[A]pparatus claims cover what a device is, not what a device does.” Hewlett-Packard Co.v.Bausch & Lomb Inc., 909 F.2d 1464, 1469, 15 USPQ2d 1525, 1528 (Fed. Cir. 1990) (emphasis in original). A claim containing a “recitation with respect to the manner in which a claimed apparatus is intended to be employed does not differentiate the claimed apparatus from a prior art apparatus” if the prior art apparatus teaches all the structural limitations of the claim. Ex parte Masham, 2 USPQ2d 1647 (Bd. Pat. App. & Inter. 1987) (The preamble of claim 1 recited that the apparatus was “for mixing flowing developer material” and the body of the claim recited “means for mixing ..., said mixing means being stationary and completely submerged in the developer material.” The claim was rejected over a reference which taught all the structural limitations of the claim for the intended use of mixing flowing developer. However, the mixer was only partially submerged in the developer material. The Board held that the amount of submersion is immaterial to the structure of the mixer and thus the claim was properly rejected.).
Regarding claim 6, NPLMendez21PPT discloses all the elements of claim 1, as noted above.
NPLMendez21PPT further discloses a charge-sensing semiconductor device
wherein the substrate body and the cap are formed of silicon doped with a dopant (p-doped Silicon (Si) cap and p-type Silicon (Si) substrate body so formed of silicon doped with a dopant-Examiner's annotated Slide 3).
Regarding claim 8, NPLMendez21PPT discloses all the elements of claim 1, as noted above.
NPLMendez21PPT further discloses a charge-sensing semiconductor device
wherein the first delta layer extends from the source into a region between the substrate body and the cap (First delta layer extending from the source into a region between the substrate body and the cap-Examiner's annotated Slide 3), and
wherein the second delta layer extends from the drain into another region between the substrate body and the cap (Second delta layer extending from the drain into a region between the substrate body and the cap-Examiner's annotated Slide 3).
Regarding claim 9, NPLMendez21PPT discloses all the elements of claim 1, as noted above.
NPLMendez21PPT further discloses a charge-sensing semiconductor device
wherein the gap separating the two delta layers has a controlled width to enable tunable charge sensing capability (low-energy electron contribution on the current is depressed with the tunnel gap width Lgap, so the gap width between the two delta layers tunes the charge sensing capability-Slide 9).
Regarding claim 10, NPLMendez21PPT discloses all the elements of claim 1, as noted above.
NPLMendez21PPT further discloses a charge-sensing semiconductor device
wherein the gap separating the two delta layers is between 4 nano-meters and 20 nano-meters (the gap width is 6nm so between 4nm and 20 nm-Slide 9).
Regarding claim 11, NPLMendez21PPT discloses all the elements of claim 1, as noted above.
NPLMendez21PPT further discloses a charge-sensing semiconductor device
wherein the thickness of the delta layers is between 0.2 and 5 nm (Thickness of the delta layers can be 0.2nm, or 1.0nm, or 5.0nm so between 0.2 and 5nm-Slide 10).
Regarding claim 12, NPLMendez21PPT discloses a charge-sensing semiconductor device (Examiner's annotated Slide 3), comprising:
a substrate body (Substrate body p-type Si Substrate-Examiner's annotated Slide 3);
a source formed along a first sidewall of the substrate body (Source formed along a first sidewall of the substrate body-Examiner's annotated Slide 3);
a drain formed along a second sidewall of the substrate body(Drain formed along a second sidewall of the substrate body-Examiner's annotated Slide 3);
first and second delta layers disposed on the substrate body and separated by a gap (First and second delta layers disposed on the substrate body, separated by a gap, and embedded between the substrate body and the cap-Examiner's annotated Slide 3),
wherein the first delta layer is in contact with the source (First delta layer disposed on the substrate body, separated from second delta-layer by a gap, and in contact with the source-Examiner's annotated Slide 3) and
the second delta layer is in contact with the drain (Second delta layer disposed on the substrate body, separated from first delta-layer by a gap, and in contact with the drain-Examiner's annotated Slide 3); and
a cap disposed over the first and second delta layers (Cap disposed over first and second delta layers-Examiner's annotated Slide 3),
wherein the first and second delta layers are embedded between the substrate body and the cap (First and second delta layers disposed on the substrate body, separated by a gap, and embedded between the substrate body and the cap-Examiner's annotated Slide 3), and
wherein the gap separating the first and second delta layers has a controlled width to enable tunable charge sensing capability of a charged entity placed near the gap and the presence of the charged entity is signaled as a function of tunneling current in the gap (a charge entity is defined in [0035] of the Application Specification, as being a single donor atom of an element which is placed in cap 326 which can also be a single charge impurity in the tunnel gap, which is placed near the device as being in the tunnel gap. The charged impurity can alter the tunneling rate so being signaling as a function of tunneling rate in the gap. The tunneling rate is defined as a current ratio, so the charged impurity can alter the tunneling current so being signaling as a function of tunneling current in the gap.
Additionally, the two delta layers disposed on a substrate and separated by a gap has all the element of the apparatus so having the capability to enable tunable charge sensing capability of a charged entity placed near the gap and to signal the presence of the charged entity near the gap-Slide 10, Slide 15 L 5-8, Examiner's annotated Slide 3).
As stated in MPEP 2114.(II), “[A]pparatus claims cover what a device is, not what a device does.” Hewlett-Packard Co.v.Bausch & Lomb Inc., 909 F.2d 1464, 1469, 15 USPQ2d 1525, 1528 (Fed. Cir. 1990) (emphasis in original). A claim containing a “recitation with respect to the manner in which a claimed apparatus is intended to be employed does not differentiate the claimed apparatus from a prior art apparatus” if the prior art apparatus teaches all the structural limitations of the claim. Ex parte Masham, 2 USPQ2d 1647 (Bd. Pat. App. & Inter. 1987) (The preamble of claim 1 recited that the apparatus was “for mixing flowing developer material” and the body of the claim recited “means for mixing ..., said mixing means being stationary and completely submerged in the developer material.” The claim was rejected over a reference which taught all the structural limitations of the claim for the intended use of mixing flowing developer. However, the mixer was only partially submerged in the developer material. The Board held that the amount of submersion is immaterial to the structure of the mixer and thus the claim was properly rejected.).
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Regarding claim 13, NPLMendez21PPT discloses all the elements of claim 12, as noted above.
NPLMendez21PPT further discloses a charge-sensing semiconductor device
wherein the first and second delta layers are formed by thin layers of phosphorus (First and second delta layers are mono-layers of Phosphorus (P), so thin layers of Phosphorus-Examiner's annotated Slide 3).
Regarding claim 14, NPLMendez21PPT discloses all the elements of claim 12, as noted above.
NPLMendez21PPT further discloses a charge-sensing semiconductor device
wherein the substrate body and the cap are formed of a semiconductor material (Silicon (Si) Gap and Silicon (Si) cap-Examiner's annotated Slide 3).
Regarding claim 15, NPLMendez21PPT discloses all the elements of claim 12, as noted above.
NPLMendez21PPT further discloses a charge-sensing semiconductor device
Wherein the first and second delta layers has a controlled width to enable tunable charge sensing of a charged entity placed near the gap and the presence and location of the charged entity is signaled as a function of tunneling current in the gap (Physical dimensions of the delta layers affect the charge sensing as evidence by Slide 9, Slide 13 so enabling tunable charge sensing of a charge entity placed near the gap. a charge entity is defined in [0035] of the Application Specification, as being a single donor atom of an element which is placed in cap 326 which can also be a single charge impurity in the tunnel gap, which is placed near the device as being in the tunnel gap. The charged impurity can alter the tunneling rate so being signaling as a function of tunneling rate in the gap. The tunneling rate is defined as a current ratio, so the charged impurity can alter the tunneling current so being signaling as a function of tunneling current in the gap. Additionally, the two delta layers disposed on a substrate and separated by a gap has all the element of the apparatus so having the capability to signal both the presence and the location of the charged entity near the gap -Slide 10, Slide 15 L 5-8, Examiner's annotated Slide 3. Reference teaches the structure and the applicant admitted during the interview on 08/13/2026 that apparatus with the same structure has the same capabilities see attached PTO-413 interview summary.)
As stated in MPEP 2114.(II), “[A]pparatus claims cover what a device is, not what a device does.” Hewlett-Packard Co.v.Bausch & Lomb Inc., 909 F.2d 1464, 1469, 15 USPQ2d 1525, 1528 (Fed. Cir. 1990) (emphasis in original). A claim containing a “recitation with respect to the manner in which a claimed apparatus is intended to be employed does not differentiate the claimed apparatus from a prior art apparatus” if the prior art apparatus teaches all the structural limitations of the claim. Ex parte Masham, 2 USPQ2d 1647 (Bd. Pat. App. & Inter. 1987) (The preamble of claim 1 recited that the apparatus was “for mixing flowing developer material” and the body of the claim recited “means for mixing ..., said mixing means being stationary and completely submerged in the developer material.” The claim was rejected over a reference which taught all the structural limitations of the claim for the intended use of mixing flowing developer. However, the mixer was only partially submerged in the developer material. The Board held that the amount of submersion is immaterial to the structure of the mixer and thus the claim was properly rejected.).
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 7 and 16 is/are rejected under 35 U.S.C. 103 as being unpatentable over Mendez et al. ("Quantum Transport Simulations for Si- P δ-layer Tunnel Junctions", PPT presentation at 2021 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD) (2021)-NPLMendez21PPT) in view of Mamaluy et al. ("Revealing quantum effects in highly conductive δ-layer systems. Commun Phys 4, 205 (2021)-NPLMamaluy21).
Regarding claim 7, NPLMendez21PPT discloses all the elements of claim 1, as noted above.
NPLMendez21PPT does not disclose a charge-sensing semiconductor device
wherein the source and the drain are formed of a semiconductor material doped with a dopant.
NPLMamaluy21 teaches a charge-sensing semiconductor device
wherein the source and the drain are formed of a semiconductor material doped with a dopant (Source and drain having the same property as the channel, the channel being doped Silicon so doped semiconductor-[Results and Discussion] L1-8).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the charge-sensing semiconductor device of NPLMendez21PPT as taught by NPLMamaluy21 for the purpose of selectively filtering charge carriers based on their kinetic energy (NPLMamaluy21:[Conclusion] L11-13).
Regarding claim 16, NPLMendez21PPT discloses all the elements of claim 12, as noted above.
NPLMendez21PPT does not disclose a charge-sensing semiconductor device
wherein the source and the drain are formed of a semiconductor material doped with a dopant.
NPLMamaluy21 teaches a charge-sensing semiconductor device
wherein the source and the drain are formed of a semiconductor material doped with a dopant (Source and drain having the same property as the channel, the channel being doped Silicon so doped semiconductor-[Results and Discussion] L1-8).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the charge-sensing semiconductor device of NPLMendez21PPT as taught by NPLMamaluy21 for the purpose of selectively filtering charge carriers based on their kinetic energy (NPLMamaluy21:[Conclusion] L11-13).
Response to Arguments
Claims 1, 5, 12, and 15 have been amended to further define the claimed subject matter see pages 3-5 of Amendments to Claims, filed on 08/17/2026.
Applicant’s arguments see pages 6-8 of Remarks, filed on 8/17/2026 with respect to claim(s) 1-16 have been considered but they are not persuasive. Applicant’s argument focuses on the fact that the Prior art Mendez et al. ("Quantum Transport Simulations for Si- P δ-layer Tunnel Junctions", PPT presentation at 2021 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD) (2021)-NPLMendez21PPT), does not discuss how the device with the two delta-layers separated by a gap uses the gap to provide charge sensing of charge entity near the device. NPLMendez21PPT discloses an apparatus having the two delta-layers separated by a gap, so having all the structural limitation of the claims. Consequently, limitation about how to use the apparatus would not be enough to differentiate the apparatus from the prior art, which was also discussed and confirmed during the interview of 08/17/2026.
As stated in MPEP 2114.(II), “[A]pparatus claims cover what a device is, not what a device does.” Hewlett-Packard Co.v.Bausch & Lomb Inc., 909 F.2d 1464, 1469, 15 USPQ2d 1525, 1528 (Fed. Cir. 1990) (emphasis in original). A claim containing a “recitation with respect to the manner in which a claimed apparatus is intended to be employed does not differentiate the claimed apparatus from a prior art apparatus” if the prior art apparatus teaches all the structural limitations of the claim. Ex parte Masham, 2 USPQ2d 1647 (Bd. Pat. App. & Inter. 1987) (The preamble of claim 1 recited that the apparatus was “for mixing flowing developer material” and the body of the claim recited “means for mixing ..., said mixing means being stationary and completely submerged in the developer material.” The claim was rejected over a reference which taught all the structural limitations of the claim for the intended use of mixing flowing developer. However, the mixer was only partially submerged in the developer material. The Board held that the amount of submersion is immaterial to the structure of the mixer and thus the claim was properly rejected.).
Therefore, the Applicant’s arguments see pages 6-8 of Remarks, filed on 8/17/2026 with respect to claim(s) 1-16 have been considered but they are not persuasive.
Amended claim(s) 1-6 and 8-15 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Mendez et al. ("Quantum Transport Simulations for Si- P δ-layer Tunnel Junctions", PPT presentation at 2021 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD) (2021)-NPLMendez21PPT), as described above.
Therefore, claims 1-6 and 8-15 stand rejected under 35 U.S.C. 102(a)(1) as being anticipated by Mendez et al. ("Quantum Transport Simulations for Si- P δ-layer Tunnel Junctions", PPT presentation at 2021 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD) (2021)-NPLMendez21PPT).
Claim 7 and 16 are rejected under 35 U.S.C. 103 as being unpatentable over Mendez et al. ("Quantum Transport Simulations for Si- P δ-layer Tunnel Junctions", PPT presentation at 2021 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD) (2021)-NPLMendez21PPT.in view of Mamaluy et al. ("Revealing quantum effects in highly conductive δ-layer systems. Commun Phys 4, 205 (2021)-NPLMamaluy21), as described above.
Therefore, claims 7 and 16 stand rejected under 35 U.S.C. 103 as being unpatentable over Mendez et al. ("Quantum Transport Simulations for Si- P δ-layer Tunnel Junctions", PPT presentation at 2021 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD) (2021)-NPLMendez21PPT.in view of Mamaluy et al. ("Revealing quantum effects in highly conductive δ-layer systems. Commun Phys 4, 205 (2021)-NPLMamaluy21).
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to NATHALIE R FAYETTE whose telephone number is (571)272-1220. The examiner can normally be reached Monday-Friday 8:30 am-6pm ET.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Christine Kim can be reached at (571) 272-8458. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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NATHALIE R. FAYETTE
Examiner
Art Unit 2812
/NATHALIE R FAYETTE/Examiner, Art Unit 2812 08/20/2026
/CHRISTINE S. KIM/Supervisory Patent Examiner, Art Unit 2812
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