DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Election/Restrictions
Applicant’s election without traverse of Invention II (claims 7-21) in the reply filed on 12/4/2025 is acknowledged.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 7, 8, and 9 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Goto et al. U.S. PGPUB No. 2016/0071688.
Regarding claim 7, Goto discloses a pattern inspection method comprising: inspecting a sample 108 with a scanning electron microscope (SEM) (“the SEM image acquired from the reference sample 108 irradiated with the electron beam 103” [0056]); inspecting a wafer 109 (“an etched wafer sample is loaded as the sample 109 “ [0090]) with the SEM (“an SEM image acquired from the sample 109” [0057]); and inspecting a quality of an SEM image of the wafer (“the sample 109 including concave portions (observation target portions) to be actually observed is observed by the scanning electron microscope at any acceleration voltage. The scanning electron microscope generates an image at the acceleration voltage and calculates brightness ratios of the concave portions and their neighboring portions” [0053]), wherein the sample 108 comprises a plurality of holes having thicknesses that are different from each other (“the holes 301 have different, depths (H1, H2, H3, and H4). In addition, the holes 301 have different diameters (D1, D2, and D3). In this example, the depths of the hole sample A have a relationship of H1<H2<H3<H4. The diameters of the hole sample A have a relationship of D1>D2>D3” [0060]).
Regarding claim 8, Goto discloses that the plurality of holes comprises: one or more first holes having a first thickness; one or more second holes having a second thickness, wherein the second thickness is less than the first thickness; one or more third holes having a third thickness, wherein the third thickness is less than the second thickness; and one or more fourth holes having a fourth thickness, and the fourth thickness is less than the third thickness (“the holes 301 have different, depths (H1, H2, H3, and H4). In addition, the holes 301 have different diameters (D1, D2, and D3). In this example, the depths of the hole sample A have a relationship of H1<H2<H3<H4. The diameters of the hole sample A have a relationship of D1>D2>D3” [0060]).
Regarding claim 9, Goto discloses that the plurality of holes 301 are spaced apart from each other in a horizontal direction (as illustrated in figure 3A).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 10, 12, and 13 is/are rejected under 35 U.S.C. 103 as being unpatentable over Goto et al. U.S. PGPUB No. 2016/0071688 in view of Tsuchiya et al. U.S. PGPUB No. 2019/0369035.
Regarding claim 10, Goto discloses the claimed invention except that while Goto discloses that “The image parameter calculation section 202 generates a graph corresponding to the brightness ratios and structures of a portion selected from the SEM image acquired from the reference sample 108 irradiated with the electron beam 103” [0056], there is no explicit disclosure of converting the SEM image of the sample into a gray level histogram; and correcting a gray level of the gray level histogram.
Tsuchiya discloses a pattern inspection method comprising: preparing a wafer and a sample (“the electron beam inspection apparatus according to the first embodiment captures the images of the same pattern at different positions on a wafer to acquire two inspection images” [0024]); optimizing a condition of an input electron beam incident on the wafer and the sample (“The multiple beams 20 which have passed through the limiting aperture substrate 206 between a beam-on state and a beam-off state are focused by the objective lens 207 to form a pattern image with a desired reduction ratio” [0051]); inspecting the sample with a scanning electron microscope (SEM) (“a first inspection image acquired by irradiating a first inspection region of the substrate with the multiple beams” [Abstract]); converting an SEM image of the sample into a first gray level histogram (“a histogram of an image in a case where the electron beams are emitted two times. For example, a grayscale value X1 of a first peak, a grayscale value Y1 of a second peak, and a grayscale value Z1 of the highest brightness are calculated from FIG. 6A” [0070-0071]); generating a second gray level histogram by correcting a gray level of the first gray level histogram (“The grayscale values calculated from two histograms are fitted to calculate the value of the brightness amplitude a and offset grayscale value b which are the correction coefficients” [0071]); using the corrected gray level, inspecting the wafer with the SEM (“The image of the overlap portion of the first inspection image and the image of the overlap portion of the second inspection image are corrected by the image correction circuit 170. Specifically, the correlation between the brightness (I0) of the pattern of a non-overlap portion and the brightness (Ix) of the pattern of the overlap portion is determined using the correction coefficients which are described in the correction table stored in the correction coefficient storage unit 171” [0072]); and inspecting a quality of an SEM image of the wafer (“The comparison circuit 108 compares the first inspection image with the second inspection image, recognizes the difference between the patterns, and determines whether there is a defect” [0074]), wherein the inspecting of the sample with the SEM comprises: converting the SEM image of the sample into a gray level histogram (“a histogram of an image in a case where the electron beams are emitted two times. For example, a grayscale value X1 of a first peak, a grayscale value Y1 of a second peak, and a grayscale value Z1 of the highest brightness are calculated from FIG. 6A” [0070-0071]); and correcting a gray level of the gray level histogram (“The grayscale values calculated from two histograms are fitted to calculate the value of the brightness amplitude a and offset grayscale value b which are the correction coefficients” [0071]).
It would have been obvious to one possessing ordinary skill in the art before the effective filing date of the claimed invention to have modified Goto with the histogram-forming method of Tsuchiya in order to provide a more accurate method of measuring topography of a sample in an electron microscope.
Regarding claim 12, Goto discloses the claimed invention except that while Goto discloses that “The image parameter calculation section 202 generates a graph corresponding to the brightness ratios and structures of a portion selected from the SEM image acquired from the reference sample 108 irradiated with the electron beam 103” [0056], there is no explicit disclosure of converting the SEM image of the sample into a gray level histogram; and correcting a gray level of the gray level histogram.
Tsuchiya discloses converting an SEM image of the sample into a gray level histogram (“a histogram of an image in a case where the electron beams are emitted two times. For example, a grayscale value X1 of a first peak, a grayscale value Y1 of a second peak, and a grayscale value Z1 of the highest brightness are calculated from FIG. 6A” [0070-0071]); and correcting a gray level of the gray level histogram (“The grayscale values calculated from two histograms are fitted to calculate the value of the brightness amplitude a and offset grayscale value b which are the correction coefficients” [0071]).
It would have been obvious to one possessing ordinary skill in the art before the effective filing date of the claimed invention to have modified Goto with the histogram-forming method of Tsuchiya in order to provide a more accurate method of measuring topography of a sample in an electron microscope. Goto and Tsuchiya disclose the claimed invention except that while Tsuchiya discloses that after the correcting of the gray level of the gray level histogram, peak values of the gray level histogram are different than respective peak values of the gray level histogram before the correcting of the gray level of the gray level histogram (“For example, a grayscale value X1 of a first peak, a grayscale value Y1 of a second peak, and a grayscale value Z1 of the highest brightness are calculated from FIG. 6A. Then, a grayscale value X2 of a first peak, a grayscale value Y2 of a second peak, and a grayscale value Z2 of the highest brightness are calculated from FIG. 6B. The grayscale values calculated from two histograms are fitted to calculate the value of the brightness amplitude a and offset grayscale value b which are the correction coefficients” [0071]), there is no explicit disclosure that after the correcting of the gray level of the gray level histogram, peak values of the gray level histogram are greater than respective peak values of the gray level histogram before the correcting of the gray level of the gray level histogram. A person of ordinary skill would have had good reason to pursue the finite number of identified, predictable potential solutions to the recognized need or problem – in this case that the peak values would either be greater than, less than, or equal to respective peak values before the correction. Therefore, the claimed invention would have been obvious to one possessing ordinary skill at the time the invention was filed to try peak values of the gray level histogram that are greater than respective peak values of the gray level histogram before the correcting of the gray level of the gray level histogram in order to appropriately correct the gray levels of the histogram so as to most accurately measure the sample. See MPEP 2143 I. E.
Regarding claim 13, Goto discloses the claimed invention except that while Goto discloses that “The image parameter calculation section 202 generates a graph corresponding to the brightness ratios and structures of a portion selected from the SEM image acquired from the reference sample 108 irradiated with the electron beam 103” [0056], there is no explicit disclosure of converting the SEM image of the sample into a gray level histogram; and correcting a gray level of the gray level histogram.
Tsuchiya discloses converting an SEM image of the sample into a gray level histogram (“a histogram of an image in a case where the electron beams are emitted two times. For example, a grayscale value X1 of a first peak, a grayscale value Y1 of a second peak, and a grayscale value Z1 of the highest brightness are calculated from FIG. 6A” [0070-0071]); and correcting a gray level of the gray level histogram (“The grayscale values calculated from two histograms are fitted to calculate the value of the brightness amplitude a and offset grayscale value b which are the correction coefficients” [0071]).
It would have been obvious to one possessing ordinary skill in the art before the effective filing date of the claimed invention to have modified Goto with the histogram-forming method of Tsuchiya in order to provide a more accurate method of measuring topography of a sample in an electron microscope. Goto and Tsuchiya disclose the claimed invention except that while Tsuchiya discloses that after the correcting of the gray level of the gray level histogram, peak values of the gray level histogram are different than respective peak values of the gray level histogram before the correcting of the gray level of the gray level histogram (“For example, a grayscale value X1 of a first peak, a grayscale value Y1 of a second peak, and a grayscale value Z1 of the highest brightness are calculated from FIG. 6A. Then, a grayscale value X2 of a first peak, a grayscale value Y2 of a second peak, and a grayscale value Z2 of the highest brightness are calculated from FIG. 6B. The grayscale values calculated from two histograms are fitted to calculate the value of the brightness amplitude a and offset grayscale value b which are the correction coefficients” [0071]), there is no explicit disclosure that after the correcting of the gray level of the gray level histogram, a width between adjacent peaks in the gray level histogram is greater than a width between adjacent peaks in the gray level histogram before the correcting of the gray level of the gray level histogram. A person of ordinary skill would have had good reason to pursue the finite number of identified, predictable potential solutions to the recognized need or problem – in this case that a width between adjacent peaks in the gray level histogram would either be greater than, less than, or equal to a width between adjacent peaks in the gray level histogram before the correcting of the gray level of the gray level histogram. Therefore, the claimed invention would have been obvious to one possessing ordinary skill at the time the invention was filed to try a width between adjacent peaks in the gray level histogram that is greater than a width between adjacent peaks in the gray level histogram before the correcting of the gray level of the gray level histogram in order to appropriately correct the gray levels of the histogram so as to most accurately measure the sample. See MPEP 2143 I. E.
Claim(s) 14, 19, and 20 is/are rejected under 35 U.S.C. 103 as being unpatentable over Tsuchiya et al. U.S. PGPUB No. 2019/0369035 in view of Goto et al. U.S. PGPUB No. 2016/0071688.
Regarding claim 14, Tsuchiya discloses a pattern inspection method comprising: preparing a wafer and a sample (“the electron beam inspection apparatus according to the first embodiment captures the images of the same pattern at different positions on a wafer to acquire two inspection images” [0024]); optimizing a condition of an input electron beam incident on the wafer and the sample (“The multiple beams 20 which have passed through the limiting aperture substrate 206 between a beam-on state and a beam-off state are focused by the objective lens 207 to form a pattern image with a desired reduction ratio” [0051]); inspecting the sample with a scanning electron microscope (SEM) (“a first inspection image acquired by irradiating a first inspection region of the substrate with the multiple beams” [Abstract]); converting an SEM image of the sample into a first gray level histogram (“a histogram of an image in a case where the electron beams are emitted two times. For example, a grayscale value X1 of a first peak, a grayscale value Y1 of a second peak, and a grayscale value Z1 of the highest brightness are calculated from FIG. 6A” [0070-0071]); generating a second gray level histogram by correcting a gray level of the first gray level histogram (“The grayscale values calculated from two histograms are fitted to calculate the value of the brightness amplitude a and offset grayscale value b which are the correction coefficients” [0071]); using the corrected gray level, inspecting the wafer with the SEM (“The image of the overlap portion of the first inspection image and the image of the overlap portion of the second inspection image are corrected by the image correction circuit 170. Specifically, the correlation between the brightness (I0) of the pattern of a non-overlap portion and the brightness (Ix) of the pattern of the overlap portion is determined using the correction coefficients which are described in the correction table stored in the correction coefficient storage unit 171” [0072]); and inspecting a quality of an SEM image of the wafer (“The comparison circuit 108 compares the first inspection image with the second inspection image, recognizes the difference between the patterns, and determines whether there is a defect” [0074]). Tsuchiya discloses the claimed invention except that there is no explicit disclosure that the sample comprises a plurality of holes having thicknesses that are different from each other.
Goto discloses a pattern inspection method comprising: inspecting a sample 108 with a scanning electron microscope (SEM) (“the SEM image acquired from the reference sample 108 irradiated with the electron beam 103” [0056]); inspecting a wafer 109 (“an etched wafer sample is loaded as the sample 109 “ [0090]) with the SEM (“an SEM image acquired from the sample 109” [0057]); and inspecting a quality of an SEM image of the wafer (“the sample 109 including concave portions (observation target portions) to be actually observed is observed by the scanning electron microscope at any acceleration voltage. The scanning electron microscope generates an image at the acceleration voltage and calculates brightness ratios of the concave portions and their neighboring portions” [0053]), wherein the sample 108 comprises a plurality of holes having thicknesses that are different from each other (“the holes 301 have different, depths (H1, H2, H3, and H4). In addition, the holes 301 have different diameters (D1, D2, and D3). In this example, the depths of the hole sample A have a relationship of H1<H2<H3<H4. The diameters of the hole sample A have a relationship of D1>D2>D3” [0060]).
It would have been obvious to one possessing ordinary skill in the art before the effective filing date of the claimed invention to have modified Tsuchiya with the hole thicknesses of Goto in order to inspect any one of a number of samples using the apparatus of Tsuchiya, and to measure the depths of holes on a sample specimen where it is desired to understand the production of various-sized holes on a sample specimen.
Regarding claim 19, Tsuchiya discloses that the wafer comprises a plurality of pixels, and the inspecting of the quality of the SEM image of the wafer is performed on each of the plurality of pixels (“The brightness of each measurement pixel 58 is defined by, for example, 256 grayscale values. The brightness of each measurement pixel 58 corresponds to the amount of secondary electrons in each measurement pixel 58 detected by the multi-detector 222” [0065]).
Regarding claim 20, Tsuchiya discloses converting an SEM image of the sample into a gray level histogram (“a histogram of an image in a case where the electron beams are emitted two times. For example, a grayscale value X1 of a first peak, a grayscale value Y1 of a second peak, and a grayscale value Z1 of the highest brightness are calculated from FIG. 6A” [0070-0071]); and correcting a gray level of the gray level histogram (“The grayscale values calculated from two histograms are fitted to calculate the value of the brightness amplitude a and offset grayscale value b which are the correction coefficients” [0071]). Tsuchiya discloses the claimed invention except that while Tsuchiya discloses that after the correcting of the gray level of the gray level histogram, peak values of the gray level histogram are different than respective peak values of the gray level histogram before the correcting of the gray level of the gray level histogram (“For example, a grayscale value X1 of a first peak, a grayscale value Y1 of a second peak, and a grayscale value Z1 of the highest brightness are calculated from FIG. 6A. Then, a grayscale value X2 of a first peak, a grayscale value Y2 of a second peak, and a grayscale value Z2 of the highest brightness are calculated from FIG. 6B. The grayscale values calculated from two histograms are fitted to calculate the value of the brightness amplitude a and offset grayscale value b which are the correction coefficients” [0071]), there is no explicit disclosure that a width between adjacent peaks of the second gray level histogram are greater than respective peak values and a width between adjacent peaks of the first gray level histogram. A person of ordinary skill would have had good reason to pursue the finite number of identified, predictable potential solutions to the recognized need or problem – in this case that a width between adjacent peaks in the gray level histogram would either be greater than, less than, or equal to a width between adjacent peaks in the gray level histogram before the correcting of the gray level of the gray level histogram. Therefore, the claimed invention would have been obvious to one possessing ordinary skill at the time the invention was filed to try a width between adjacent peaks in the gray level histogram that is greater than a width between adjacent peaks in the gray level histogram before the correcting of the gray level of the gray level histogram in order to appropriately correct the gray levels of the histogram so as to most accurately measure the sample. See MPEP 2143 I. E.
Claim(s) 17 is/are rejected under 35 U.S.C. 103 as being unpatentable over Tsuchiya et al. U.S. PGPUB No. 2019/0369035 in view of Goto et al. U.S. PGPUB No. 2016/0071688 in further view of Oosaki et al. U.S. PGPUB No. 2008/0067337.
Regarding claim 17, Tsuchiya discloses the claimed invention except that there is no explicit disclosure of performing fast Fourier transformation (FFT) on the SEM image of the wafer.
Oosaki discloses performing fast Fourier transformation (FFT) on an SEM image of the wafer (“In a scanning electron microscope apparatus for measuring dimensions of a pattern, a conventional resolution measuring process in which a picked-up image is used comprises the steps of (A-1) acquiring a picked-up image from a sample which is silicon substrate deposited thereon with gold or a porous silicon substrate, and (B-1) subjecting the picked-up image to Fast Fourier Transformation in order to analyze frequencies so as to calculate an index value of resolution” [0007]).
It would have been obvious to one possessing ordinary skill in the art before the effective filing date of the claimed invention to have modified Tsuchiya with the fast Fourier transform of Oosaki in order to provide a scanning electron microscope image having enhanced resolution.
Claim(s) 21 is/are rejected under 35 U.S.C. 103 as being unpatentable over Tsuchiya et al. U.S. PGPUB No. 2019/0369035 in view of Goto et al. U.S. PGPUB No. 2016/0071688 in further view of Noji et al. U.S. PGPUB No. 2005/0045821.
Regarding claim 21, Tsuchiya and Goto disclose the method of claim 14, as discussed above, with respect to the rejection of claim 14, but do not disclose a semiconductor device fabrication method comprising: providing at least one layer on a substrate of a wafer; performing processing on the at least one layer on the substrate of the wafer; and based on a result of a pattern inspection method, forming a semiconductor device from the wafer.
Noji discloses a semiconductor device fabrication method comprising: providing at least one layer on a substrate of a wafer; performing processing on the at least one layer on the substrate of the wafer; and based on a result of a pattern inspection method, forming a semiconductor device from the wafer (“(G) Step of inspecting the processed wafer. Furthermore, the wafer processing step is repeated for a necessary number of layers to produce a semiconductor device operating as designed” [1031]).
It would have been obvious to one possessing ordinary skill in the art before the effective filing date of the claimed invention to have modified Tsuchiya and Goto with the processing method of Noji in order to provide an accurate processing of a semiconductor device informed by an electron microscopy method which accounts for surface topography of the sample specimen.
Allowable Subject Matter
Claims 11, 15, 16, and 18 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Regarding claim 11; Goto et al. U.S. PGPUB No. 2016/0071688 discloses a pattern inspection method comprising: inspecting a sample 108 with a scanning electron microscope (SEM) (“the SEM image acquired from the reference sample 108 irradiated with the electron beam 103” [0056]); inspecting a wafer 109 (“an etched wafer sample is loaded as the sample 109 “ [0090]) with the SEM (“an SEM image acquired from the sample 109” [0057]); and inspecting a quality of an SEM image of the wafer (“the sample 109 including concave portions (observation target portions) to be actually observed is observed by the scanning electron microscope at any acceleration voltage. The scanning electron microscope generates an image at the acceleration voltage and calculates brightness ratios of the concave portions and their neighboring portions” [0053]), wherein the sample 108 comprises a plurality of holes having thicknesses that are different from each other (“the holes 301 have different, depths (H1, H2, H3, and H4). In addition, the holes 301 have different diameters (D1, D2, and D3). In this example, the depths of the hole sample A have a relationship of H1<H2<H3<H4. The diameters of the hole sample A have a relationship of D1>D2>D3” [0060]). Goto discloses the claimed invention except that while Goto discloses that “The image parameter calculation section 202 generates a graph corresponding to the brightness ratios and structures of a portion selected from the SEM image acquired from the reference sample 108 irradiated with the electron beam 103” [0056], there is no explicit disclosure of converting the SEM image of the sample into a gray level histogram; and correcting a gray level of the gray level histogram.
Tsuchiya et al. U.S. PGPUB No. 2019/0369035 discloses a pattern inspection method comprising: preparing a wafer and a sample (“the electron beam inspection apparatus according to the first embodiment captures the images of the same pattern at different positions on a wafer to acquire two inspection images” [0024]); optimizing a condition of an input electron beam incident on the wafer and the sample (“The multiple beams 20 which have passed through the limiting aperture substrate 206 between a beam-on state and a beam-off state are focused by the objective lens 207 to form a pattern image with a desired reduction ratio” [0051]); inspecting the sample with a scanning electron microscope (SEM) (“a first inspection image acquired by irradiating a first inspection region of the substrate with the multiple beams” [Abstract]); converting an SEM image of the sample into a first gray level histogram (“a histogram of an image in a case where the electron beams are emitted two times. For example, a grayscale value X1 of a first peak, a grayscale value Y1 of a second peak, and a grayscale value Z1 of the highest brightness are calculated from FIG. 6A” [0070-0071]); generating a second gray level histogram by correcting a gray level of the first gray level histogram (“The grayscale values calculated from two histograms are fitted to calculate the value of the brightness amplitude a and offset grayscale value b which are the correction coefficients” [0071]); using the corrected gray level, inspecting the wafer with the SEM (“The image of the overlap portion of the first inspection image and the image of the overlap portion of the second inspection image are corrected by the image correction circuit 170. Specifically, the correlation between the brightness (I0) of the pattern of a non-overlap portion and the brightness (Ix) of the pattern of the overlap portion is determined using the correction coefficients which are described in the correction table stored in the correction coefficient storage unit 171” [0072]); and inspecting a quality of an SEM image of the wafer (“The comparison circuit 108 compares the first inspection image with the second inspection image, recognizes the difference between the patterns, and determines whether there is a defect” [0074]), wherein the inspecting of the sample with the SEM comprises: converting the SEM image of the sample into a gray level histogram (“a histogram of an image in a case where the electron beams are emitted two times. For example, a grayscale value X1 of a first peak, a grayscale value Y1 of a second peak, and a grayscale value Z1 of the highest brightness are calculated from FIG. 6A” [0070-0071]); and correcting a gray level of the gray level histogram (“The grayscale values calculated from two histograms are fitted to calculate the value of the brightness amplitude a and offset grayscale value b which are the correction coefficients” [0071]). However, Tsuchiya does not disclose that correcting of the gray level of the gray level histogram is performed based on a gradient value of a line defined by a peak of the gray level histogram.
The prior art fails to teach or reasonably suggest, in combination with the other claim limitations, a pattern inspection method comprising: converting a scanning electron microscope (SEM) image of a sample into a gray level histogram; and correcting a gray level of the gray level histogram based on a gradient value of a line defined by a peak of the gray level histogram.
Regarding claim 15; Tsuchiya et al. U.S. PGPUB No. 2019/0369035 discloses a pattern inspection method comprising: preparing a wafer and a sample (“the electron beam inspection apparatus according to the first embodiment captures the images of the same pattern at different positions on a wafer to acquire two inspection images” [0024]); optimizing a condition of an input electron beam incident on the wafer and the sample (“The multiple beams 20 which have passed through the limiting aperture substrate 206 between a beam-on state and a beam-off state are focused by the objective lens 207 to form a pattern image with a desired reduction ratio” [0051]); inspecting the sample with a scanning electron microscope (SEM) (“a first inspection image acquired by irradiating a first inspection region of the substrate with the multiple beams” [Abstract]); converting an SEM image of the sample into a first gray level histogram (“a histogram of an image in a case where the electron beams are emitted two times. For example, a grayscale value X1 of a first peak, a grayscale value Y1 of a second peak, and a grayscale value Z1 of the highest brightness are calculated from FIG. 6A” [0070-0071]); generating a second gray level histogram by correcting a gray level of the first gray level histogram (“The grayscale values calculated from two histograms are fitted to calculate the value of the brightness amplitude a and offset grayscale value b which are the correction coefficients” [0071]); using the corrected gray level, inspecting the wafer with the SEM (“The image of the overlap portion of the first inspection image and the image of the overlap portion of the second inspection image are corrected by the image correction circuit 170. Specifically, the correlation between the brightness (I0) of the pattern of a non-overlap portion and the brightness (Ix) of the pattern of the overlap portion is determined using the correction coefficients which are described in the correction table stored in the correction coefficient storage unit 171” [0072]); and inspecting a quality of an SEM image of the wafer (“The comparison circuit 108 compares the first inspection image with the second inspection image, recognizes the difference between the patterns, and determines whether there is a defect” [0074]), wherein the inspecting of the sample with the SEM comprises: converting the SEM image of the sample into a gray level histogram (“a histogram of an image in a case where the electron beams are emitted two times. For example, a grayscale value X1 of a first peak, a grayscale value Y1 of a second peak, and a grayscale value Z1 of the highest brightness are calculated from FIG. 6A” [0070-0071]); and correcting a gray level of the gray level histogram (“The grayscale values calculated from two histograms are fitted to calculate the value of the brightness amplitude a and offset grayscale value b which are the correction coefficients” [0071]). However, although Tsuchiya discloses that “the high-voltage power supply circuit applies an accelerating voltage” [0036], there is no explicit disclosure of converting the SEM image of the wafer into a third gray level histogram.
The prior art fails to teach or reasonably suggest, in combination with the other claim limitations, a pattern inspection method comprising: converting an SEM image of a sample into a first gray level histogram; generating a second gray level histogram by correcting a gray level of the first gray level histogram; converting the SEM image of the wafer into a third gray level histogram; and using the corrected gray level, inspecting a wafer with the SEM.
Regarding claim 16; claim 16 would be allowable at least for its dependence upon claim 15.
Regarding claim 18; Tsuchiya et al. U.S. PGPUB No. 2019/0369035 discloses a pattern inspection method comprising: preparing a wafer and a sample (“the electron beam inspection apparatus according to the first embodiment captures the images of the same pattern at different positions on a wafer to acquire two inspection images” [0024]); optimizing a condition of an input electron beam incident on the wafer and the sample (“The multiple beams 20 which have passed through the limiting aperture substrate 206 between a beam-on state and a beam-off state are focused by the objective lens 207 to form a pattern image with a desired reduction ratio” [0051]); inspecting the sample with a scanning electron microscope (SEM) (“a first inspection image acquired by irradiating a first inspection region of the substrate with the multiple beams” [Abstract]); converting an SEM image of the sample into a first gray level histogram (“a histogram of an image in a case where the electron beams are emitted two times. For example, a grayscale value X1 of a first peak, a grayscale value Y1 of a second peak, and a grayscale value Z1 of the highest brightness are calculated from FIG. 6A” [0070-0071]); generating a second gray level histogram by correcting a gray level of the first gray level histogram (“The grayscale values calculated from two histograms are fitted to calculate the value of the brightness amplitude a and offset grayscale value b which are the correction coefficients” [0071]); using the corrected gray level, inspecting the wafer with the SEM (“The image of the overlap portion of the first inspection image and the image of the overlap portion of the second inspection image are corrected by the image correction circuit 170. Specifically, the correlation between the brightness (I0) of the pattern of a non-overlap portion and the brightness (Ix) of the pattern of the overlap portion is determined using the correction coefficients which are described in the correction table stored in the correction coefficient storage unit 171” [0072]); and inspecting a quality of an SEM image of the wafer (“The comparison circuit 108 compares the first inspection image with the second inspection image, recognizes the difference between the patterns, and determines whether there is a defect” [0074]), wherein the inspecting of the sample with the SEM comprises: converting the SEM image of the sample into a gray level histogram (“a histogram of an image in a case where the electron beams are emitted two times. For example, a grayscale value X1 of a first peak, a grayscale value Y1 of a second peak, and a grayscale value Z1 of the highest brightness are calculated from FIG. 6A” [0070-0071]); and correcting a gray level of the gray level histogram (“The grayscale values calculated from two histograms are fitted to calculate the value of the brightness amplitude a and offset grayscale value b which are the correction coefficients” [0071]). Tsuchiya discloses the claimed invention except that there is no explicit disclosure of performing fast Fourier transformation (FFT) on the SEM image of the wafer.
Oosaki et al. U.S. PGPUB No. 2008/0067337 discloses performing fast Fourier transformation (FFT) on an SEM image of the wafer (“In a scanning electron microscope apparatus for measuring dimensions of a pattern, a conventional resolution measuring process in which a picked-up image is used comprises the steps of (A-1) acquiring a picked-up image from a sample which is silicon substrate deposited thereon with gold or a porous silicon substrate, and (B-1) subjecting the picked-up image to Fast Fourier Transformation in order to analyze frequencies so as to calculate an index value of resolution” [0007]).
The prior art fails to teach or reasonably suggest, in combination with the other claim limitations, a pattern inspection method comprising: converting an SEM image of a sample into a first gray level histogram; generating a second gray level histogram by correcting a gray level of the first gray level histogram; using the corrected gray level, inspecting a wafer with the SEM; and performing fast Fourier transformation (FFT) on an SEM image of the wafer, based on an intensity or a width of each second-order or higher-order peak of an FFT graph generated by the performing of the FFT on the SEM image of the wafer.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to JASON L MCCORMACK whose telephone number is (571)270-1489. The examiner can normally be reached M-Th 7:00AM-5:00PM EST.
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/JASON L MCCORMACK/Examiner, Art Unit 2881