DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Priority
Receipt is acknowledged of certified copies of papers required by 37 CFR 1.55.
Information Disclosure Statement
The information disclosure statements (IDSs) submitted on 09/08/2023 is being considered by the examiner.
Double Patenting
The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969).
A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP § 2146 et seq. for applications not subject to examination under the first inventor to file provisions of the AIA . A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b).
The filing of a terminal disclaimer by itself is not a complete reply to a nonstatutory double patenting (NSDP) rejection. A complete reply requires that the terminal disclaimer be accompanied by a reply requesting reconsideration of the prior Office action. Even where the NSDP rejection is provisional the reply must be complete. See MPEP § 804, subsection I.B.1. For a reply to a non-final Office action, see 37 CFR 1.111(a). For a reply to final Office action, see 37 CFR 1.113(c). A request for reconsideration while not provided for in 37 CFR 1.113(c) may be filed after final for consideration. See MPEP §§ 706.07(e) and 714.13.
The USPTO Internet website contains terminal disclaimer forms which may be used. Please visit www.uspto.gov/patent/patents-forms. The actual filing date of the application in which the form is filed determines what form (e.g., PTO/SB/25, PTO/SB/26, PTO/AIA /25, or PTO/AIA /26) should be used. A web-based eTerminal Disclaimer may be filled out completely online using web-screens. An eTerminal Disclaimer that meets all requirements is auto-processed and approved immediately upon submission. For more information about eTerminal Disclaimers, refer to www.uspto.gov/patents/apply/applying-online/eterminal-disclaimer.
Claims 1-20 are rejected on the ground of nonstatutory double patenting as being unpatentable over claims 1-20 of U.S. Patent No. 17/389,306. The instant application claims similar subject matter as the patent with differences that are obvious to one ordinary skilled in the art. For instance:
Pertaining to claim 1, Claim 1, U.S. Patent No. 17/389,306 teaches connector assembly (claim 1, line 1) comprising: a substrate layer having a first side (claim 1, line 1), a second side (claim 1, line 2) substantially opposite the first side (claim 1, line 2), an inner aperture (claim 1, line 2) and an outer periphery radially outwardly (claim 1, lines 2-3) disposed relative to the inner aperture (claim 1, line 3); at least one signal trace disposed on the substrate layer (claim 1, line 4), and each extending at least from a respective first location to a respective second location (claim 1, line 5), wherein each of the second locations is radially outwardly disposed relative to the respective first locations (claim 1, line 6); an inner connector configured in electronic communication with the at least one signal trace (claim 1, lines 7-8) at the respective first location of each of the at least one signal trace (claim 1, lines 7-8); an outer connector configured in electronic communication with the at least one signal trace at the respective second location of each of the at least one signal trace (claim 1, lines 9-10); a first substantially flat exterior surface disposed on the substrate layer and extending between the respective first locations and the respective second locations on the first side of the substrate layer (claim 1, lines 10-13); and a second substantially flat exterior surface disposed on the substrate layer and extending between the respective first locations and the respective second locations on the second side of the substrate layer (claim 1, lines 14-16).
Pertaining to claim 14, Claim 14, U.S. Patent No. 17/389,306 teaches A system for data communicating between an interior and an exterior of an enclosed vessel, the interior (claim 14, lines and the exterior separated by first and second flange connectors each characterized by a flange face and an aperture; the system comprising: a connector assembly (claim 14, line 5) including: a substrate layer having a first side, a second side substantially opposite the first side, an inner aperture and an outer periphery outwardly disposed relative to the inner aperture (claim 14, lines 6-7); at least one signal trace disposed on the substrate layer (claim 14, line 8) , and each extending at least from a first location to a second location, wherein the second location is outwardly disposed relative to the first location (claim 14, lines 9-10); an inner connector conductively connected to the at least one signal trace at the first location (claim 14, lines 11-12); an outer connector conductively connected to the at least one signal trace at the second location (claim 14, lines 13-14); a first substantially flat exterior surface disposed on the substrate layer and extending radially over a first region between the first location and the second location on the first side of the substrate layer (claim 14, lines15-17) ; and. a second substantially flat exterior surface disposed on the substrate layer and extending radially over a second region between the first location and the second location on the second side of the substrate layer (claim 14, lines 18-20); a first gasket; and a second gasket; wherein the connector assembly (claim 14, lines 21-22), the first gasket, and the second gasket are configured to form a seal between a volume defined at least in part by the interior of the enclosed vessel, the aperture of the first flange connector, the inner aperture of the connector assembly, and the aperture of the second flange connector with the first gasket disposed between the flange face of the first flange connector and the first substantially flat exterior surface of the connector assembly, with the second gasket disposed between the flange face of the second flange connector and the second substantially flat exterior surface of the connector assembly, and with the first flange connector mechanically connected to the second flange connector by one or more fasteners (claim 14, lines 23-27).
Pertaining to claim 16, Claim 16, U.S. Patent No. 17/389,306 teaches A method of manufacturing a connector assembly (claim 16, line 1), comprising: fabricating a substrate layer having a first side, a second side substantially opposite the first side, an inner aperture and an outer periphery radially outwardly disposed relative to the inner aperture (claim 16, lines 2-4); laminating a copper layer on the first side of the substrate layer (claim 16; line 4) etching at least one signal trace from the copper layer, with each of the at least one signal trace extending at least from a respective first location to a respective second location, wherein the respective second location is radially outwardly disposed relative to the first respective location (claim 16, lines 5-7); applying a non-conductive epoxy layer over the at least one signal trace; laminating a substantially flat first metal layer over the non-conductive epoxy layer on the first side of the substrate layer, wherein the first metal layer extends radially over at least a portion of a first region between the respective first locations and the respective second locations on the first side of the substrate layer (claim 16, lines 8-12); laminating a substantially flat second metal layer over the second side of the substrate layer, wherein the second metal layer extends radially over at least a portion of a second region between the respective first locations and the respective second locations on the second side of the substrate layer; attaching an inner connector in electronic communication with the at least one signal trace at the respective first locations; and attaching an outer connector in electronic communication with the at least one signal trace at the respective second locations (claim 16, 14-20).
Pertaining to claims, 2-13, 15 and 17-20 and of U.S. Patent No. 17/389,306 further teaches dependent claims 2-13, 15 and 17-20 of the instant application.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to ANDARGIE M AYCHILLHUM whose telephone number is (571)270-1607. The examiner can normally be reached M-F 9-5.
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/ANDARGIE M AYCHILLHUM/Primary Examiner, Art Unit 2847
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