DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Status
Previous action: claims 22 through 41 are rejected
Present action: claims 22 through 41 are rejected
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Rejection Note: Italicized and struck through claim limitations indicate limitations that are not explicitly disclosed in the primary reference, but disclosed in the secondary reference(s).
Claim(s) 22, 23, 24, 26, 27, 28, 29, 30, 31, 33, and 34 is/are rejected under 35 U.S.C. 103 as being unpatentable over Tsai (US 2018/0130749) in view of Chang (US 2020/0381348) in view of Kim (US 2020/0335441)
Regarding claim 22.
Tsai teaches:
A method of manufacturing a semiconductor package comprising:
forming a redistribution substrate (fig 1c; [para 0027]);
and placing a semiconductor chip (fig 1d:210; [para 0028]) on the redistribution substrate, wherein the forming the redistribution substrate includes: forming a first layer (fig 1a:110; [para 0016]) on a carrier substrate (fig 1a:100; [para 0016]);
forming a first dielectric pattern (fig 1a:120; [para 0017]) including a first opening (fig 1a:130; [para 0017]) on the first layer (fig 1a:110; [para 0016]);
after forming the first dielectric pattern (fig 1a:120; [para 0017]), forming an under-bump pattern (fig 1b:140,150; [para 0021]) within the first opening (fig 1a:130; [para 0017]);
forming a second dielectric pattern (fig 1c:160; [para 0025]) including a second opening on the first dielectric pattern (fig 1a:120; [para 0017]) and the under-bump pattern (fig 1b:140,150; [para 0021]), the second opening exposing a top surface of the under-bump pattern (fig 1b:150; [para 0021]);
sequentially forming a second seed layer (fig 1c:170; [para 0026,0023]) and a conductive layer (fig 1c:180; [para 0026,0023]) that fill the second opening and extend to a top surface of the second dielectric pattern (fig 1c:160; [para 0026]);
and forming a redistribution pattern (fig 1C:170,180; [para 0026]) by patterning (; [para 0024,0026]) the second seed layer (fig 1c:170; [para 0026,0023]) and the conductive layer (fig 1c:180; [para 0026,0023]), wherein the second opening overlaps the first opening in a vertical direction, wherein a bottom surface of the first dielectric pattern (fig 1a:120; [para 0017]) and a bottom surface of the under-bump pattern (fig 1b:140,150; [para 0021])contact a top surface of the first layer (fig 1a:110; [para 0016]), wherein the bottom surface of the first dielectric pattern (fig 1a:120; [para 0017]) and the bottom surface of the under-bump pattern (fig 1b:140,150; [para 0021])are at the same vertical level, wherein a bottom surface of the second dielectric pattern (fig 1c:160; [para 0025]) contacts the top surface of the under-bump pattern (fig 1b:140,150; [para 0021]), wherein the width of the top surface of the under-bump pattern (fig 1b:140,150; [para 0021]) is greater than a width of the bottom surface of the under-bump pattern (fig 1b:140,150; [para 0021]).
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Tsai does not teach that the first layer comprises a seed layer.
Chang teaches
forming a first seed layer (fig 2a:20s1; [para 0034]) on a carrier substrate (fig 2a:29; [para 0034]);
forming a first dielectric pattern (fig 2b:20d1; [para 0035]) including a first opening (fig 2b:20d1h; [para 0035]) on the first seed layer (fig 2a:20s1; [para 0034]); after forming the first dielectric pattern (fig 2b:20d1; [para 0035]), forming an under-bump pattern (fig 2c:21; [para 0036]) within the first opening (fig 2b:20d1h; [para 0035])
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to form the first seed layer before forming the first dielectric pattern in order to ensure that the bottom of the opening has a complete seed surface to use.
Tsai does not teach that the width of the top surface of the under-bump pattern is equal to the width of the opening.
Kim teaches:
wherein a width of the top surface of the under-bump pattern (fig 2d:112; [para 0018]) is the same as a width of the first opening
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It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention for the width of the opening and the top surface to be the same so that the surface can be substantially planar and thereby facilitate layer steps (paragraph 25)
Regarding claim 23.
Tsai in view of Chang in view of Kim teaches the method of claim 22, further
Tsai teaches:
the first dielectric pattern (fig 1a:120; [para 0017]) and the second dielectric pattern (fig 1c:160; [para 0025]) include the same dielectric material (; [para 0025]).
Regarding claim 24
Tsai in view of Chang in view of Kim teaches the method of claim 22, further
Tsai teaches:
the first dielectric pattern (fig 1a:120; [para 0017]) and the second dielectric pattern (fig 1c:160; [para 0025]) include a photosensitive polymer (ie polyimide (PI), benzocyclobutene (BCB), or polybenzoxazole (PBO); [para 0019]).
Regarding claim 26.
Tsai in view of Chang in view of Kim teaches the method of claim 22, further
Tsai teaches:
forming the under- bump pattern (fig 1b:140,150; [para 0021]) includes performing an electroplating process (; [para 0024]) using seed layer (fig 1b:140; [para 0021]) as an electrode.
Kim teaches:
forming the under- bump pattern (fig 2e:112; [para 0023]) includes performing an electroplating process using the first seed layer (fig 2b:111; [para 0023]) as an electrode ([para 0023]).
Regarding claim 27.
Tsai in view of Chang in view of Kim teaches the method of claim 22, further
Tsai teaches:
the under-bump pattern (fig 1b:140,150; [para 0021])and the first layer (fig 1a:110; [para 0016]) include different materials, and the under-bump pattern (fig 1b:140,150; [para 0021]) is in direct contact with a sidewall of the first dielectric pattern (fig 1a:120; [para 0017]) exposed by the first opening.
Chang teaches:
the under-bump pattern (fig 2c:21; [para 0036,0037])and the first seed layer (fig 2c:20s1; [para 0034,0036]) include different metal materials (; [para 0034,0037]), and the under-bump pattern (fig 2c:21; [para 0036,0037]) is in direct contact with a sidewall of the first dielectric pattern (fig 2c:20d1; [para 0035]) exposed by the first opening (fig 2b:20d1h; [para 0036]).
Regarding claim 28.
Tsai in view of Chang in view of Kim teaches the method of claim 22, further
Tsai teaches:
the top surface of the under-bump pattern (fig 1b:140,150; [para 0021]) and a top surface of the first dielectric pattern (fig 1a:120; [para 0017])
Kim teaches:
the top surface of the under-bump pattern (fig 2d:112; [para 0018]) and a top surface of the first dielectric pattern (fig 2d:113; [para 0018]) are at the same vertical level.
Regarding claim 29.
Tsai in view of Chang in view of Kim teaches the method of claim 22, further
Chang teaches:
disposing a release layer (fig 2a:29r; [para 0034]) between the carrier substrate (fig 2a:29; [para 0034]) and the first seed layer (fig 2a:20s1; [para 0034]) before forming the first seed layer (fig 2a:20s1; [para 0034]).
Regarding claim 30.
Tsai in view of Chang in view of Kim teaches the method of claim 29, further
Chang teaches:
Chang teaches exposing the first seed layer (fig 2j:20s1; [para 0034]) by removing the carrier substrate (fig 2j:29; [para 0034]) and the release layer (fig 2a:29r; [para 0034]);
and removing the first seed layer (fig 2j:20s1; [para 0034]) to expose a lower surface of the first dielectric pattern (fig 2j:20d1; [para 0034]) and a lower surface of the under-bump pattern (fig 2j:21,20s2,20r1; [para 0045]).
Regarding claim 31.
Tsai in view of Chang in view of Kim teaches the method of claim 30, further
Tsai teaches:
forming an external connection terminal (fig 1H:260; [para 0052]) directly on the exposed bottom surface of the under-bump pattern (fig 1b:140,150; [para 0021]).
Regarding claim 33.
Tsai in view of Chang in view of Kim teaches the method of claim 22, further
Tsai teaches:
wherein the redistribution pattern includes a via portion and a wiring portion on the via portion, wherein the via portion is formed within the second opening, and the wiring portion is formed on the top surface of the second dielectric pattern (fig 1c:160; [para 0025]) and the via portion, and wherein a thickness of the under-bump pattern (fig 1b:140,150; [para 0021]) is greater than a thickness of the wiring portion.
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Regarding claim 34.
Tsai in view of Chang in view of Kim teaches the method of claim 33, further
Tsai teaches:
the thickness of the under-bump pattern (fig 1b:140,150; [para 0021]) is 2.5 to 10 times the thickness of the wiring portion (fig 1b,1c).
Claim(s) 25 is/are rejected under 35 U.S.C. 103 as being unpatentable over Tsai (US 2018/0130749) in view of Chang (US 2020/0381348) in view of Kim (US 2020/0335441) as applied to claim 22 and further in view of Wang (US 2019/0393160)
Regarding claim 25.
Tsai in view of Chang in view Kim teaches the method of claim 22.
Chang teaches
dielectric pattern includes: coating a first dielectric layer (fig 2b:20d1; [para 0035]) on the first seed layer (fig 2b:20s1; [para 0035])
Tsai in view of Chang in view of Kim does not teach the steps of photo-patterning
Wang teaches:
forming the first dialectic pattern (fig 2:140; [para 0050]) includes: coating a first dielectric layer (fig 2:140; [para 0050]);
forming a preliminary opening by performing an exposure and development process ([para 0050]) on the first dielectric layer (fig 9:140; [para 0050]);
and forming the first opening by curing the first dielectric layer (fig 9:140; [para 0050]).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to use a photosensitive polymer and patterning, developing and curing (paragraph 50) in order that the image is transferred to the dielectric, unwanted material is removed, and the structure is solidified thereby forming a part of the overall structure.
Claim(s) 32 is/are rejected under 35 U.S.C. 103 as being unpatentable over Tsai (US 2018/0130749) in view of Chang (US 2020/0381348) in view of Kim (US 2020/0335441) as applied to claim 29 and further in view of Hu (US 2020/0126923)
Regarding claim 32.
Tsai in view of Chang in view Kim teaches the method of claim 29.
Chang teaches:
exposing the first seed layer (fig 2J:20s1; [para 0045]) by removing the carrier substrate (2J:29; [para 0045])) and the release layer (fig 2j:29r; [para 0045])
Kim teaches:
exposing the first seed layer (2j:111; [para 0048]) by removing the carrier substrate (fig 2j:171; [para 0048]) forming a mask pattern (not shown) including a third opening (opening can be formed on seed layer 151) exposing [a] seed layer (fig 2l:151; [para 0050]) on a lower surface of the first seed layer (fig 2L:111; [para 0051,0052]);
forming a lower under-bump pattern (2L:152; [para 0050]) within the third opening (fig 2L; [para 0052]), wherein a metal material ([para 0052]) is different from the first seed layer (fig 2j:111; [para 0022]) and the under-bump pattern (fig 2j:112; [para 0023]);
removing the mask pattern (fig 2L; [para 0052]);
and forming a first seed pattern (fig 2L:151; [para 0052,0053]) by patterning the seed layer (fig 2L:151; [para 0052]).
Tsai in view of Chang in view Kim does not teach that the seed layer is the first seed layer.
Hu teaches:
a mask pattern (fig 16:104; [para 0038]) including a third opening exposing the first the seed layer (fig 16:Sl1; [para 0039]) on a lower surface of the seed layer (fig 16:Sl1; [para 0038]).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to form the mask pattern and third opening of the first seed layer in order to eliminate the step of forming an additional seed layer.
Claim(s) 35, 36, 37, 38, 39, and 41 is/are rejected under 35 U.S.C. 103 as being unpatentable over Tsai (US 2018/0130749) in view of Chang (US 2020/0381348) in view of Kim (US 2020/0335441)
Regarding claim 35
Tsai teaches:
A method of manufacturing a semiconductor package comprising: forming a redistribution substrate (fig 1c; [para 0027]);
and placing a semiconductor chip (fig 1d:210; [para 0028]) on the redistribution substrate, wherein the forming the redistribution substrate includes: forming a first layer (fig 1a:110; [para 0016]) on a carrier substrate (fig 1a:100; [para 0016]);
forming a first dielectric pattern (fig 1a:120; [para 0017]) including a first opening on the first layer (fig 1a:110; [para 0016]);
after forming the first dielectric pattern (fig 1a:120; [para 0017]), forming an under-bump pattern (fig 1b:140,150; [para 0021]) within the first opening (fig 1a:130; [para 0017]);
forming a second dielectric pattern (fig 1c:160; [para 0025]) including a second opening on the first dielectric pattern (fig 1a:120; [para 0017]) and the under-bump pattern (fig 1b:140,150; [para 0021]), wherein the second opening exposes a top surface of the under-bump pattern (fig 1b:140,150; [para 0021]);
and forming a redistribution pattern (fig 1C:170,180; [para 0026]) that fills the second opening and extends onto a top surface of the second dielectric pattern (fig 1c:160; [para 0025]), wherein the second opening overlaps the first opening (fig 1a:130; [para 0017]) in a vertical direction, wherein a bottom surface of the first dielectric pattern (fig 1a:120; [para 0017]) and a bottom surface of the under-bump pattern (fig 1b:140,150; [para 0021]) contact a top surface of the first layer (fig 1a:110; [para 0016]), wherein the bottom surface of the first dielectric pattern (fig 1a:120; [para 0017]) and the bottom surface of the under-bump pattern (fig 1b:140,150; [para 0021]) are at the same vertical level, wherein a bottom surface of the second dielectric pattern (fig 1c:160; [para 0025]) contacts the top surface of the under-bump pattern (fig 1b:140,150; [para 0021]), , and wherein the width of the top surface of the under-bump pattern (fig 1b:140,150; [para 0021]), is greater than a width of the bottom surface of the under-bump pattern (fig 1b:140,150; [para 0021]).
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Tsai does not teach that the first layer comprises a seed layer.
Chang teaches:
forming a first seed layer (fig 2a:20s1; [para 0034]) on a carrier substrate (fig 2a:29; [para 0034]);
forming a first dielectric pattern (fig 2b:20d1; [para 0035]) including a first opening (fig 2b:20d1h; [para 0035]) on the first seed layer (fig 2a:20s1; [para 0034]); after forming the first dielectric pattern (fig 2b:20d1; [para 0035]), forming an under-bump pattern (fig 2c:21; [para 0036]) within the first opening (fig 2b:20d1h; [para 0035])
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to form the first seed layer before forming the first dielectric pattern in order to ensure that the bottom of the opening has a complete seed surface to use.
Tsai does not teach that the width of the top surface of the under-bump pattern is equal to the width of the opening.
Kim teaches:
wherein a width of the top surface of the under-bump pattern (fig 2d:112; [para 0018]) is the same as a width of the first opening
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It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention for the width of the opening and the top surface to be the same so that the surface can be substantially planar and thereby facilitate layer steps (paragraph 25)
Regarding claim 36.
Tsai in view of Chang in view of Kim teaches the method of claim 35, further
Kim teaches:
the first seed layer (fig 2d:111; [para 0022]) is spaced apart from a side surface of the first dielectric pattern (fig 2c,2e:110; [para 0024]).
Regarding claim 37.
Tsai in view of Chang in view of Kim teaches the method of claim 35, further
Tsai teaches:
forming the redistribution pattern includes: sequentially forming a second seed layer (fig 1c:170; [para 0026,0023]) and a conductive layer (fig 1c:180; [para 0026,0023]) that fill the second opening and extend to the top surface of the second dielectric pattern (fig 1c:160; [para 0025]);
and patterning (; [para 0024,0026]) the second seed layer (fig 1c:170; [para 0026,0023]) and the conductive layer (fig 1c:180; [para 0026,0023]), wherein the redistribution pattern (fig 1C:170,180; [para 0026]) includes a via portion and a wiring portion on the via portion, wherein the via portion is formed within the second opening, and wherein the wiring portion is formed on the top surface of the second dielectric pattern (fig 1c:160; [para 0025])and the via portion.
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Regarding claim 38.
Tsai in view of Chang in view of Kim teaches the method of claim 37, further
Tsai teaches:
the second seed layer (fig 1c:170; [para 0026,0023])is formed directly on the top surface of the under-bump pattern (fig 1b:140,150; [para 0021]) and contacts the top surface of the under-bump pattern (fig 1b:140,150; [para 0021]).
Regarding claim 39.
Tsai in view of Chang in view of Kim teaches the method of claim 35, further
Tsai teaches:
wherein the first layer (fig 1A:110; [para 0016]) and the under-bump pattern (fig 1a:140,150; [para 0021]) include different materials, and wherein the under-bump pattern (fig 1a:140,150; [para 0021]) is in direct contact with the first dielectric pattern (fig 1a:120; [para 0017]).
Chang teaches:
the first seed layer (fig 2c:20s1; [para 0034,0036]) and the under-bump pattern include (fig 2c:21; [para 0036,0037]) different metal materials (; [para 0034,0037]), and wherein the under-bump pattern (fig 2c:21; [para 0036,0037]) is in direct contact with the first dielectric pattern (fig 2c:20d1; [para 0035]).
Regarding claim 41.
Tsai in view of Chang in view of Kim teaches the method of claim 35, further
Kim teaches:
forming the under-bump pattern (fig 2d:112; [para 0018])includes forming the top surface of the under-bump pattern (fig 2d:112; [para 0018]) at a vertical level equal to a vertical level of a top surface of the first dielectric pattern (fig 2d:113; [para 0018]).
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It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention for the surface to be substantially planar and thereby facilitate layer steps (paragraph 25)
Claim(s) 40 is/are rejected under 35 U.S.C. 103 as being unpatentable over Tsai (US 2018/0130749) in view of Chang (US 2020/0381348) in view of Kim (US 2020/0335441) as applied to claim 35 and further in view of Wang (US 2019/0393160)
Regarding claim 40.
Tsai in view of Chang in view Kim teaches the method of claim 35.
Chang teaches:
forming the first dielectric pattern includes: coating a first dielectric layer (fig 2b:20d1; [para 0035]) on the first seed layer (fig 2b:20s1; [para 0035]);
Tsai in view of Chang in view of Kim does not teach the steps of photo-patterning
Wang teaches:
forming the first dialectic pattern (fig 2:140; [para 0050]) includes: coating a first dielectric layer (fig 2:140; [para 0050]);
forming a first preliminary opening by performing an exposure and development process ([para 0050])on the first dielectric layer (fig 9:140; [para 0050]);
and curing the first dielectric layer to form the first opening from the first preliminary opening (fig 9:140; [para 0050]).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to use a photosensitive polymer and patterning, developing and curing (paragraph 50) in order that the image is transferred to the dielectric, unwanted material is removed, and the structure is solidified thereby forming a part of the overall structure.
Response to Arguments
Applicant’s arguments with respect to claim(s) have been considered but are moot because the new ground of rejection does not rely on any reference combination applied in the prior rejection of record for any teaching or matter specifically challenged in the argument.
Newly applied reference Tsai (US 2018/0130749) in view of Chang (US 2020/0381348) and Kim (US 2020/0335441) anticipates the amended claims
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
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/D.J.G/Examiner, Art Unit 2817
/Kretelia Graham/Supervisory Patent Examiner, Art Unit 2817
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