Prosecution Insights
Last updated: May 29, 2026
Application No. 18/244,739

SEMICONDUCTOR PACKAGE

Non-Final OA §102§103§112
Filed
Sep 11, 2023
Priority
Sep 15, 2022 — RE 10-2022-0116634
Examiner
TOBERGTE, NICHOLAS J
Art Unit
2817
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Samsung Electronics Co., Ltd.
OA Round
1 (Non-Final)
94%
Grant Probability
Favorable
1-2
OA Rounds
0m
Est. Remaining
96%
With Interview

Examiner Intelligence

Grants 94% — above average
94%
Career Allowance Rate
843 granted / 892 resolved
+26.5% vs TC avg
Minimal +2% lift
Without
With
+1.9%
Interview Lift
resolved cases with interview
Fast prosecutor
1y 8m
Avg Prosecution
24 currently pending
Career history
924
Total Applications
across all art units

Statute-Specific Performance

§101
1.1%
-38.9% vs TC avg
§103
59.6%
+19.6% vs TC avg
§102
17.8%
-22.2% vs TC avg
§112
3.6%
-36.4% vs TC avg
Black line = Tech Center average estimate • Based on career data from 892 resolved cases

Office Action

§102 §103 §112
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Election/Restrictions Applicant’s election without traverse of Species I (Claims 1-16) in the reply filed on 2/12/26 is acknowledged. Drawings The drawings are objected to because Figure 5 is incomplete for omitting element 240’s arrow to the specific element in the Figure. Corrected drawing sheets in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. The figure or figure number of an amended drawing should not be labeled as “amended.” If a drawing figure is to be canceled, the appropriate figure must be removed from the replacement sheet, and where necessary, the remaining figures must be renumbered and appropriate changes made to the brief description of the several views of the drawings for consistency. Additional replacement sheets may be necessary to show the renumbering of the remaining figures. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance. Claim Objections Claim 15 is objected to because of the following informalities: Claim 15 states a spacing of 100mm, and the Examiner believes this to be a typo, and should read 100µm as supported in the specification in paragraph [0057]. Appropriate correction is required. Claim Rejections - 35 USC § 112 The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. Claims 3 is rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. Claim 3 recites the limitation "wherein the fiducial mark is provided on the upper insulating layer" in line 3. There is insufficient antecedent basis for this limitation in the claim. Claim 3 depends upon Claim 1. Claim 1 establishes that the fiducial mark is provided on the second package substrate. Claim 3 establishes an upper insulating layer “provided on the second package substrate”. The fiducial mark can’t be in both distinct layers at once as claimed, rendering the claim indefinite. Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention. Claim(s) 1-4 is/are rejected under 35 U.S.C. 102(a)(2) as being anticipated by Brun US 2023/0307341. Pertaining to claim 1, Brun teaches a semiconductor package comprising: a first package substrate 114(1) comprising a first redistribution structure see Figure 1A marked up below; [0075] a second package substrate 114(2) comprising a second redistribution structure see Figure 1A marked up below; [0075] a semiconductor chip 132 provided between the first package substrate and the second package substrate, and attached to the first package substrate see Figure 1A marked up below; and a fiducial mark 142 [0086] provided on the second package substrate and separated from the second redistribution structure in a plan view See Figure 1D marked up below. PNG media_image1.png 302 682 media_image1.png Greyscale PNG media_image2.png 318 594 media_image2.png Greyscale Pertaining to claim 2, Brun teaches the semiconductor package of claim 1, wherein the fiducial mark has a uniform surface roughness. This claim is overly broad, as “surface roughness” without additional explanation can include anything from perfectly flat to very rough. Brun element 142 as illustrate in Figure 1D and described in the specification has a surface that appears uniform. Pertaining to claim 3, Brun teaches the semiconductor package of claim 1, further comprising an upper insulating layer 116 provided on the second package substrate, wherein the fiducial mark is provided on the upper insulating layer see 112b rejection above. Pertaining to claim 4, Brun teaches the semiconductor package of claim 1, further comprising an upper insulating layer 116 provided on the second package substrate 114(2), wherein the fiducial mark 142 and the upper insulating layer 116 are provided at a same level in a vertical direction See Figure 1B and [0086] which describes the fiducial mark being made of the same elements as 118 which is at a same level in a vertical direction as the upper insulating layer. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim(s) 5-7 is/are rejected under 35 U.S.C. 103 as being unpatentable over Brun as applied to claim 1 above, and further in view of Kim US 2020/0035762. Pertaining to claim 5, Brun teaches the semiconductor package of claim 1, but fails to teach wherein the second package substrate further comprises a dummy pattern overlapping the fiducial mark in a vertical direction. Kim teaches a dummy pattern 211 overlapping a fiducial mark (alignment mark AM) in a vertical direction. See Figure 9 marked up below. It would have been obvious to one of ordinary skill in the art at the time the invention was filed to incorporate the teachings of Kim into the device of Brun by including a dummy pattern overlapping a fiducial mark. The ordinary artisan would have been motivated to modify Brun in the manner set forth above for at least the purpose of facilitating proper layer alignment during processing and/or manufacture. Pertaining to claim 6, Brun in view of Kim teaches the semiconductor package of claim 5, wherein the fiducial mark is provided on an upper surface of the dummy pattern. Kim teaches that the fiducial mark AM is on an upper surface of the dummy pattern 211 see Figure 9 marked up below. PNG media_image3.png 342 666 media_image3.png Greyscale Pertaining to claim 7, Brun in view of Kim teaches the semiconductor package of claim 5, wherein the dummy pattern is separated from the fiducial mark in the vertical direction. [0157] of Kim note alignment mark is taught to be on different layers Claim(s) 8 is/are rejected under 35 U.S.C. 103 as being unpatentable over Brun as applied to claim 5 above, and further in view of Kim US 2020/0035762 and further in view of Chia et al US 2007/0090548. Pertaining to claim 8, Brun/Kim teaches the semiconductor package of claim 5, but are silent wherein the dummy pattern has one of a lattice structure and a dot structure. Chia teaches that alignment marks can have a lattice structure [0022][0029]. It would have been obvious to one of ordinary skill in the art at the time the invention was filed to select the alignment mark shape as taught by Chia and use it in the device of Brun/Kim, as the shape only serves to facilitate alignment and is an obvious design choice. See In re Dailey, 149 USPQ 47 (CCPA 1976) As noted above, Matzen discloses that the flexible portion of his container is drawn into the rigid top portion, filling the space thereof. Appellants have presented no argument which convinces us that the particular configuration of their container is significant or is anything more than one of numerous configurations a person of ordinary skill in the art would find obvious for the purpose of providing mating surfaces in the collapsed container of Matzen. See Grahm v. John Deere Co., 383 U.S. l, 148 USPQ 459. Claim(s) 9, 10 is/are rejected under 35 U.S.C. 103 as being unpatentable over Brun as applied to claim 1 above and further in view of Shoki et al US 2019/0079382. Pertaining to claim 9, Brun teaches the semiconductor package of claim 1, but fails to teach further comprising a plurality of fiducial marks including the fiducial mark, wherein at least two of the plurality of fiducial marks are point-symmetric with respect to a central portion of the second package substrate. Shoki teaches having multiple fiducial marks point-symmetric on a surface. It would have been obvious to one of ordinary skill in the art at the time the invention was filed to modify Brun to include multiple fiducial marks in a point-symmetric configuration such as that taught by Shoki for the purpose of improving displacement of a reference point during placement [0097]. Pertaining to claim 10, Brun teaches the semiconductor package of claim 1, but fails to teach a plurality of fiducial marks including the fiducial mark, and wherein at least two of the plurality of fiducial marks have different planar shapes. Shoki teaches fiducial marks 22 and 42 that are different shapes. It would have been obvious to one of ordinary skill in the art at the time the invention was filed to modify Brun to include multiple fiducial marks such as that taught by Shoki for the purpose of enhancing alignment accuracy. Claim(s) 11, 12 and 16 is/are rejected under 35 U.S.C. 103 as being unpatentable over Brun US 2023/0307341 and further in view of Yu US 2022/0020676. Pertaining to claim 11, Brun teaches a semiconductor package comprising: a semiconductor chip 132; a first package substrate 114(1) provided on the active surface, the first package substrate comprising a first base insulating layer 116 and a first redistribution structure [0075]; a second package substrate 114(2), the second package substrate comprising a second base insulating layer 116 and a second redistribution structure [0075]; a plurality of upper surface pads provided on an upper surface of the second package substrate See Figure 7C and 7D marked up below; a plurality of lower surface pads provided on a lower surface of the second package substrate See Figure 7C and 7D marked up below; and a fiducial mark 142 provided on the second package substrate and provided outside the plurality of upper surface pads relative to a central portion of the second package substrate in a plan view without overlapping the second redistribution structure in a vertical direction See Figure 1D. PNG media_image4.png 460 604 media_image4.png Greyscale Brun fails to teach wherein the semiconductor chip has an active surface and an inactive surface opposite to the active surface. Brun teaching a chip that has active surfaces on top and bottom. Yu teaches in an analogous art, first and second redistribution substrates with a chip placed between them, the first redistribution substrate being connected to an active layer of the chip, with the opposing surface of the chip being inactive. See Figure 1A of Yu, elements 120, 220 and 14. It would have been obvious to one of ordinary skill in the art at the time the invention was filed to select a chip based on desired function. Brun teaches bridge dies for communicating between two additional chips necessitating two active surfaces. If that wasn’t the desired function of the device, it would be obvious to select a chip with a different function, such as that which is taught by Yu, which includes image sensors [0035], and only includes one active surface. When there is a design need or market pressure to solve a problem and there are a finite number of identified, predictable solutions, a person of ordinary skill in the art has good reason to pursue the known options within his or her technical grasp. If this leads to the anticipated success, it is likely the product not of innovation but of ordinary skill and common sense. KSR Int'l Co v. Teleflex Inc. Pertaining to claim 12, Brun in view of Yu teaches the semiconductor package of claim 11, wherein the fiducial mark 142 has an independent island shape (arbitrary, as an “island” can look like anything) separated from the second redistribution structure in a plan view See Brun Figure 1D, element 142 is separated from the redistribution structures. Pertaining to claim 16, Brun in view of Yu teaches the semiconductor package of claim 11, wherein the fiducial mark 142 has a shape other than a circular planar shape (not circular) and a regular polygonal planar shape (142 is irregularly shaped, see Figure 1D of Brun). Claim(s) 15 is/are rejected under 35 U.S.C. 103 as being unpatentable over Brun US 2023/0307341 and further in view of Yu US 2022/0020676 as applied to claim 11 above. Pertaining to claim 15, Brun/Yu teaches the semiconductor package of claim 11, but is silent on the specific spacing (Brun) wherein the fiducial mark is separated from the second redistribution structure by at least 100 mm in a plan view. However, sufficient spacing is obvious in order for the fiducial mark to be discernable and to not interfere with subsequent operation or manufacturing processes that, if the mark were too close to features, could cause failures. It would have been obvious to one of ordinary skill in the art of making semiconductor devices to determine the workable or optimal value for the spacing through routine experimentation and optimization to obtain optimal or desired device performance because the is a result-effective variable (visibility/function) and there is no evidence indicating that it is critical or produces any unexpected results and it has been held that it is not inventive to discover the optimum or workable ranges of a result-effective variable within given prior art conditions by routine experimentation. See MPEP § 2144.05 Given the teaching of the references, it would have been obvious to determine the optimum thickness, temperature as well as condition of delivery of the layers involved. See In re Aller, Lacey and Hall (10 USPQ 233-237) “It is not inventive to discover optimum or workable ranges by routine experimentation.” Note that the specification contains no disclosure of either the critical nature of the claimed ranges or any unexpected results arising therefrom. Where patentability is said to be based upon particular chosen dimensions or upon another variable recited in a claim, the Applicant must show that the chosen dimensions are critical. In re Woodruff, 919 f.2d 1575, 1578, 16 USPQ2d 1934, 1936 (Fed. Cir. 1990). Any differences in the claimed invention and the prior art may be expected to result in some differences in properties. The issue is whether the properties differ to such an extent that the difference is really unexpected. In re Merck & Co., 800 F.2d 1091, 231 USPQ 375 (Fed. Cir. 1986). Applicants have the burden of explaining the data in any declaration they proffer as evidence of non-obviousness. Ex parte Ishizaka, 24 USPQ2d 1621, 1624 (Bd. Pat. App. & Inter. 1992). An Affidavit or declaration under 37 CFR 1.132 must compare the claimed subject matter with the closest prior art to be effective to rebut a prima facie case of obviousness. In re Burckel, 592 F.2d 1175, 201 USPQ 67 (CCPA 1979). Allowable Subject Matter Claims 13 and 14 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. The following is an examiner’s statement of reasons for allowance: Pertaining to claim 13, the prior art does not teach nor suggest in combination with claim 11, wherein the second base insulating layer comprises a light-transmitting organic layer. Pertaining to claim 14, the prior art does not teach nor suggest in combination with claim 11, wherein the second package substrate further comprises a dummy pattern overlapping the fiducial mark in the vertical direction, and wherein the dummy pattern and the second redistribution structure comprise a same material. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to NICHOLAS J TOBERGTE whose telephone number is (571)272-6458. The examiner can normally be reached M-F 7:30-4:30. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Kretelia Graham can be reached at (571) 272-5055. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /NICHOLAS J TOBERGTE/Primary Examiner, Art Unit 2817
Read full office action

Prosecution Timeline

Sep 11, 2023
Application Filed
Apr 28, 2026
Non-Final Rejection mailed — §102, §103, §112 (current)

Precedent Cases

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
94%
Grant Probability
96%
With Interview (+1.9%)
1y 8m (~0m remaining)
Median Time to Grant
Low
PTA Risk
Based on 892 resolved cases by this examiner. Grant probability derived from career allowance rate.

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