DETAILED ACTION
This Notice is responsive to communication filed on 04/29/2026.
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Amendment
The amendment filed on 04/29/2026 has overcome the drawing objection to Fig. 3 set forth in the previous Office Action dated 01/30/2026.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 14-16, 19-24, and 30-31 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Choi (US 20140346549).
Regarding claim 14, Choi discloses an optoelectronic device comprising:
an optoelectronic semiconductor component Fig. 7: 100 having an active region configured to generate light and having a light emitting surface (i.e. upper surface of Fig. 7: 100) through which the generated light is emittable from the semiconductor component (para. 0029), the light emitting surface being arranged on a top surface of the semiconductor component;
a converter Fig. 7: 440 centered above the light emitting surface (i.e. upper surface of Fig. 7: 100) and configured to convert the generated light into converted light of at least one other wavelength (para. 0030); and
an adhesive Fig. 7: 90 fixing the converter Fig. 7: 440 to the top surface of the semiconductor component Fig. 7: 100 (para. 0068),
wherein a contour line (annotated below), projected onto the top surface of the semiconductor component Fig. 7: 100, completely circumvents the converter Fig. 7: 440 in a circumferential direction and lies completely within the light emitting surface Fig. 7: 100,
wherein the adhesive Fig. 7: 90 is arranged between the light emitting surface Fig. 7: 100 and the converter Fig. 7: 440 and/or in the circumferential direction around the converter Fig. 7: 440 in such a way that the adhesive Fig. 7: 90 is arranged only on the light emitting surface Fig. 7: 100, and
wherein at least one metallic region Fig. 7: 70 is arranged laterally next to the light emitting surface Fig. 7: 100 (upper surface) on the top surface of the semiconductor component Fig. 7: 100.
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Regarding claim 15, Choi teaches the optoelectronic device according to claim 14, wherein the contour line corresponds to an outer circumference of a bottom surface Fig. 7: 50 of the converter Fig 7: 440.
Regarding claim 16, Choi teaches the optoelectronic device according to claim 14, wherein the light emitting surface Fig. 7: 100 (top surface) comprises a peripheral outer edge line (annotated above) surrounding the light emitting surface Fig. 2: 1 in the circumferential direction, and wherein the projected contour line lies completely within the outer edge line (shown in annotated Fig. 7 above).
Regarding claim 19, Choi teaches the optoelectronic device according to claim 14, wherein the light emitting surface Fig. 7: 100 (top surface) is formed by an epitaxial layer of the semiconductor component lying on the top surface (para. 0028), and/or wherein a white material surrounds the converter.
Regarding claim 20, Choi teaches the optoelectronic device according to claim 14, wherein the adhesive Fig. 7: 90 is arranged between the light emitting surface Fig. 7: 100 (top surface) and the converter Fig. 7: 440 and/or in the circumferential direction around the converter such that the adhesive Fig. 7: 90 does not cover the at least one metallic region Fig. 7: 70 (Fig. 7 shows no coverage).
Regarding claim 21, Choi teaches the optoelectronic device according to claim 20, wherein the adhesive Fig. 7: 90 does not even partially cover the at least one metallic region Fig. 7: 70 (Fig. 7 shows no coverage).
Regarding claim 22, Choi teaches the optoelectronic device according to claim 14, wherein the converter comprises:
an upper portion Fig. 7: 440 and a lower portion Fig. 7: 50,
the lower portion Fig. 7: 50 being closer to the light emitting surface than the upper portion Fig. 7: 440, and
wherein the upper portion Fig. 7: 440 comprises a larger cross-section than the lower portion Fig. 7: 50 when viewed in a plane parallel to the top surface (shown in Fig. 7).
Regarding claim 23, Choi teaches the optoelectronic device according to claim 22, wherein the contour line extends in the circumferential direction around the lower portion Fig. 7: 50 (contour line drawn around the bottom portion of the annotated lower portion).
Regarding claim 24, Choi teaches the optoelectronic device according to claim 22, wherein a contour line projected on the top surface of the semiconductor component Fig. 7: 100 and surrounding the upper portion Fig. 7: 440 of the converter in the circumferential direction is completely outside a projected contour line of the lower portion Fig. 7: 50.
Regarding claim 30, Choi teaches the optoelectronic device according to claim 14, wherein the optoelectronic semiconductor component Fig. 7: 100 is an LED chip (para. 0009).
Regarding claim 31, an optoelectronic device comprising:
an optoelectronic semiconductor component Fig. 7: 100 having an active region configured to generate light and having a light emitting surface through which the generated light is emittable from the semiconductor component Fig. 7: 100, the light emitting surface being arranged on an top surface of the semiconductor component Fig. 7: 100;
a window Fig. 7: 440 centered above the light emitting surface (para. 0029, glass); and
an adhesive Fig. 7: 90 fixing the window Fig. 7: 440 to the top surface of the semiconductor component Fig. 7: 100,
wherein a contour line (see annotated fig. 7 above), projected onto the top surface of the semiconductor component Fig. 7: 100, completely circumvents the window Fig. 7: 440 in a circumferential direction and lies completely within the light emitting surface Fig. 7: 100 (upper surface), and
wherein the adhesive Fig. 7: 90 is arranged between the light emitting surface Fig. 7: 100 and the window Fig. 7: 440 and/or in the circumferential direction around the window Fig. 7: 440 such that the adhesive Fig. 7: 90 is arranged only on the light emitting surface Fig. 7: 100.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Rejection Note: Italicized claim limitations indicate limitations that are not explicitly disclosed in the primary reference(s).
Claims 17 and 18 are rejected under 35 U.S.C. 103 as being unpatentable over Choi (US 20140346549), as applied to claim 16 above, and further in view of Shichijo (US 20180029523).
Regarding claim 17, Choi teaches the optoelectronic device according to claim 16:
wherein the projected contour line and the outer edge line (annotated Fig. 7 above) form a circumferential stripe on the light emitting surface (top surface of Fig. 7: 100), and
wherein the stripe has at each location a width between 5µm and 50µm, inclusive.
Shichijo teaches the following claim limitation not explicitly disclosed by Choi:
wherein the stripe (i.e. width of second transmissive member Fig. 1B: 30) has at each location a width between 5µm and 50µm, inclusive (para. 0033 teaches a 10µm or less range).
Shichijo teaches the area surrounding the first light transmissive member Fig. 1B: 20 includes a second transmissive member (including resin) disposed on the exposed portion of the upper surface of the light emitting element Fig. 1B: 10, and teaches a width of this portion.
Since the applicants have not established the criticality (see Criticality paragraph below) of the width of the stripe and the Prior Art shows that the stripe would necessarily have a width, it would have been obvious to one of ordinary skill in the art before the effective filing date to select the width of the stripe to be between 5um and 50um.
CRITICALITY
The specification contains no disclosure of either the critical nature of the claimed width of the stripe or any unexpected results arising therefrom. Where patentability is said to be based upon particular chosen values or upon another variable recited in a claim, the applicant must show that the chosen values are critical. In re Woodruff, 919 F.2d 1575, 1578, 16 USPQ2d 1934, 1936 (Fed. Cir. 1990). MPEP 2144.05 (III)(A).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to modify Choi with Shichijo based on the criticality paragraph above.
Regarding claim 18, Choi teaches the optoelectronic device according to claim 16,
wherein the projected contour line and the outer edge line (annotated Fig. 7 above) form a circumferential stripe on the light emitting surface (top surface of Fig. 7: 100), and
wherein the stripe has at each location a width between 10µm and 15µm, inclusive.
Shichijo teaches the following claim limitation not explicitly disclosed by Choi:
wherein the stripe (i.e. width of second transmissive member Fig. 1B: 30) has at each location a width between 10µm and 15µm, inclusive (para. 0033 teaches a 10µm or less range).
Shichijo teaches the area surrounding the first light transmissive member Fig. 1B: 20 includes a second transmissive member (including resin) disposed on the exposed portion of the upper surface of the light emitting element Fig. 1B: 10, and teaches a width of this portion.
Since the applicants have not established the criticality (see Criticality paragraph above) of the width of the stripe and the Prior Art shows that the stripe would necessarily have a width, it would have been obvious to one of ordinary skill in the art before the effective filing date to select the width of the stripe to be between 10um and 15um.
It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to modify Choi with Shichijo based on the criticality paragraph above.
Claim 25 is rejected under 35 U.S.C. 103 as being unpatentable over Choi (US 20140346549) as applied to claim 22 above, and further in view of Bang (US 20200220060).
Regarding claim 25, Bang teaches the following claim limitations not disclosed by Choi: the optoelectronic device according to claim 22,
wherein the lower portion Fig. 3B: 220 comprises a converter material (para. 0081, phosphor)
while the upper portion Fig. 3B: 230 comprises a transparent carrier material (para. 0082, transparent silicon).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to modify the teachings of Choi with the teachings of Bang for the purpose of blocking moisture from penetrating into the wavelength converter (para. 0082).
Claim 26 is rejected under 35 U.S.C. 103 as being unpatentable over Choi (US 20140346549) as applied to claim 14 above, and further in view of Eisert et al. (US 20140117396).
Regarding claim 26, Eisert teaches the following claim limitations not disclosed by Choi: the optoelectronic device according to claim 12,
wherein the converter Fig. 2: 20 is a component with an upper portion Fig. 2: 22 and a lower portion Fig. 2: 21,
wherein both portions are each cuboid elements (para. 0040),
wherein the upper portion Fig. 2: 22 comprises a square or rectangular first side (bottom surface of 22) on which a square or rectangular second side (top surface of 21) of the lower portion Fig. 2: 21 is arranged, and
wherein the first side has a larger area than the second side (shown in Fig. 1B), or at least partially a truncated conical or pyramidal element.
It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to modify the teachings of Choi and Eisert for the purpose of having a converter that is able to absorb light emitted from the exposed surface of the light emitting element, and light that is scattered in the lower portion of the converter without being converted (para. 0113).
Claim(s) 27-29 are rejected under 35 U.S.C. 103 as being unpatentable over Choi (US 20140346549) as applied to claim 14 above, and further in view of Kim et al. (US 20150263253).
Regarding claim 27, Kim teaches the following claim limitations not disclosed by Choi:
the optoelectronic device according to claim 14, wherein the metallic region Fig. 1B: 131 is covered by a dielectric material Fig. 1B: 150 (para. 0045).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to modify the teachings of Choi with the teachings of Kim in order to reflect light emitted from the sides of the LED chip (para. 0046).
Regarding claim 28, Kim further discloses the optoelectronic device according to claim 27,
wherein the adhesive Fig. 2: 9 is arranged between the light emitting surface Fig. 2: 1 and the converter Fig. 2: 3 and/or in the circumferential direction around the converter Fig. 2: 3 such that the adhesive Fig. 2: 9 does not cover the dielectric material.
Claim(s) 29 is rejected under 35 U.S.C. 103 as being unpatentable over Choi (US 20140346549) as applied to claim 14 above, and further in view of Kim et al. (US 20150263253) and Sugimoto et al. (US 9469465).
Regarding claim 29, Sugimoto teaches the following claim limitations not disclosed by Choi:
an LED device wherein the adhesive does not even partially cover the dielectric material (col. 7, lines 30-36 “insulating member”).
Sugimoto teaches a metal member on which a dielectric (col. 7, lines 30-36 “insulating member”) has been formed. Sujimoto an adhesive agent used to join the light emitting elements and the light transmissive member, avoiding leakage or creep of the adhesive to the side surfaces of the light transmissive member, and teaches that preferably no adhesive material or other such joining member is elsewhere but at these joining surfaces of the light emitting element and light transmissive member for the purpose of efficiently reflecting light by the reflecting member included in the device.
It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to modify Choi with Sugimoto so that the adhesive agent used to join the light emitting element and the converter is only on these surfaces, and not provided elsewhere on the device, including the dielectric material, for the purpose of efficiently reflecting the light emitted from the light emitting element (col. 4, lines 65-67; col 5, lines 1-8).
Response to Arguments
Applicant’s arguments with respect to claim(s) 14-31 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to NKECHINYERE ESIABA whose telephone number is (571)272-0720. The examiner can normally be reached Monday - Friday 10am-5pm EST.
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/Nkechinyere Esiaba/Examiner, Art Unit 2817
/Kretelia Graham/Supervisory Patent Examiner, Art Unit 2817
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