DETAILED ACTION
Notice of AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Amendment
The amendment with respect to claims 1, 4, and 20 filed on 09/17/2025 have been fully considered for examination based on their merits. The previously presented claims 2, and 5-19 have been considered. Claim 3 is canceled.
Response to Arguments
Applicant’s arguments, see Remarks, pages 18-13, filed 09/17/2025, with respect to the rejection(s) of claim(s) 1-20 under 35 U.S.C. 103 have been fully considered and are persuasive. Therefore, the rejection has been withdrawn. However, upon further consideration, a new ground(s) of rejection is made in view of KUCHIYAMA, LI, ZHANG and LIN.
Regarding Independent Claim 1. Applicant argues (see Remarks, pages 8–12, filed on 09/17/2025) that none of the prior art addresses all the claim limitations regarding [A] the display substrate with accompanying plating regions in the mark region and the display region, and [B] light emitting diode on a side of the anti-oxidation layer away from the base substrate. The Examiner agrees that the arguments have been fully considered and are persuasive. Therefore, the rejection has been withdrawn. However, upon further consideration, a new ground(s) of rejection is made as mentioned above. More specifically, KUCHIYAMA art addresses the base substrate, a metal layer, and an anti-oxidation layer, with defined thicknesses as part of the display device. LI further supports KUCHIYAMA with a light-emitting diode disposed on the conductive protection layer as an anti-oxidation layer that comprises a driving electrode which is electrically connected to the metal layer of the light-emitting diode, so that the micro LED, 200 serves as a switching device for controlling the lighting state by a corresponding TFT and a driving backplane which has a beneficial effect, such as reducing the manufacturing cost of the display device and the driving power consumption is low for display devices, for example, a tablet computer, a television, an electronic paper or a display screen (LI, [0054]). ZHANG further teaches the similar claim features of KUCHIYAMA and additional dependent limitations such as openings or via holes on the structures, so that the pixel electrode, 31, is connected to the drain electrode, 24, through the first via hole and has a positive potential and further connected to the source electrode, 24 and has a negative potential for the electrical current flow in the device (ZHANG, [0070-0073]). Finally, LIN art supports the Claim 1 features which have not been previously addressed by KUCHIYAMA, LI and ZHANG. For example, a base substrate comprises a display region and a mark region (or peripheral region) and the display substrate further comprises a first and a second accompanying plating region (or the alignment marks, and the metal layer/black matrix metallic film) and their area ratio relationship with respect to display region and the mark region. The aforementioned arrangements with alignment marks may be used for monitoring a deformation of a base substrate, for example, an internal contraction and an external expansion, to modify the deformation of the base substrate in a timely manner (LIN, [0003]).
Regarding Independent Claim 12. Applicant argues (see Remarks, page 12, filed on 09/17/2025) that none of the prior art addresses all the claim limitations similar to Claim 1 as mentioned above. The Examiner agrees that the arguments have been fully considered and are persuasive. Therefore, the rejection has been withdrawn. However, upon further consideration, a new ground(s) of rejection is made of LI and KUCHIYAMA. LI teaches a method for manufacturing a display substrate, with steps S201-S206/S301-313 and KUCHIYAMA art further teaches the base substrate, a metal layer, and an anti-oxidation layer, with defined thicknesses as part of the display device.
Regarding Claim(s) 2, and 4-20. Claims(s) 2, 4–11 have been on claim 1, and claim(s) 13-20 have been dependent on claim 12. Therefore, similar arguments mentioned above are valid to reject these claims.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claim(s) 1-2, 6-10, and 20 is/are rejected under 35 U.S.C. 103 as being unpatentable over Takashi Kuchiyama et al, (hereinafter KUCHIYAMA), US 20180098422 A1, in view of Feng Li et al, (hereinafter LI), US 20210050497 A1, further in view of Wei Zhang et al, (hereinafter ZHANG), US 20210398952 A1, and further in view of Haiyun Lin et al, (hereinafter LIN), US 20180275458 A1.
Regarding Claim 1, KUCHIYAMA teaches a display substrate (Fig. 6, 31, display device; Fig. 4, 22, conductive film), comprising:
a base substrate (Fig. 4, 12, transparent film base);
a metal layer (Fig. 4, 14, metal layer) on the base substrate (Fig. 4, 12, transparent film base), comprising a copper layer ([0009]) having a first thickness (the metal layer has a layer thickness of 50 nm or more and 250 nm or less, [0007]);
an anti-oxidation layer (Fig. 4, 13, conductive oxide layer, [0024]) away (annotated Figure 4) from the base substrate (Fig. 4, 12, transparent film base), having a second thickness (the layer thickness, T of the transparent conductive oxide layer, 13 is preferably 10nm or more and 120 nm or less, [0045]); and
wherein the first thickness of the metal layer the metal layer has a layer thickness of 50 nm or more and 250 nm or less, [0007]) is larger than the second thickness of the anti-oxidation layer (the layer thickness, T of the transparent conductive oxide layer, 13 is preferably 10nm or more and 120 nm or less, [0045]),
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KUCHIYAMA does not explicitly disclose a display, comprising: a light emitting diode on a side of the anti-oxidation layer away from the base substrate, comprising at least one electrode, wherein the at least one electrode of the light emitting diode electrically connected to the metal layer.
LI teaches a display (Fig. 1, display device, [0017]), comprising: a light emitting diode (Fig. 1, 200, micro LED) on a side of the anti-oxidation layer (Fig. 1, 22, conductive protection layer) away ([0045]) from the base substrate (Fig. 1, 1), comprising at least one electrode (Fig. 1, 20, driving electrode, [0047]), wherein the at least one electrode (Fig. 1, 20, driving electrode, [0047]) of the light emitting diode (Fig. 1, 200, micro LED) is electrically connected (20a/20b are connected to circuits of the driving backplane, 100, [0047]) to the metal layer (Fig. 1, 21, [0047-0048]).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention (AIA ) to have modified KUCHIYAMA to incorporate the teachings of LI, such that a display device comprising: a light emitting diode on a side of the anti-oxidation layer away from the base substrate, comprising at least one electrode, wherein the at least one electrode of the light emitting diode electrically connected to the metal layer, so that the micro LED, 200 serves as a switching device for controlling the lighting state by a corresponding TFT and a driving backplane which has a the beneficial effects, such as reducing the manufacturing cost of the display device and the driving power consumption is low for display devices, for example, a tablet computer, a television, an electronic paper or a display screen (LI, [0054]).
Though LI teaches display device comprising: a light emitting diode electrically connected to the driving backplane of the substrate, KUCHIYAMA as modified by LI does not explicitly disclose a display device comprising: a light emitting diode on a side of the anti-oxidation layer away from the base substrate, comprising at least one electrode, wherein the at least one electrode of the light emitting diode electrically connected to the metal layer.
ZHANG teaches a display device (Fig. 1, micro light emitting diode display panel, [0056]) comprising: a light emitting diode (Fig. 1, 4, micro light emitting diode) on a side of the anti-oxidation layer (Fig. 1, 34, metal common electrode) away from the base substrate (Fig. 1, 101), comprising at least one electrode (Fig. 1, 31, pixel electrode), wherein the at least one electrode (Fig. 1, 31, pixel electrode) of the light emitting diode (Fig. 1, 4, micro light emitting diode) electrically connected to the metal layer (Fig. 1, 32, metal electrode).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention (AIA ) to have modified KUCHIYAMA as modified by LI to incorporate the teachings of ZHANG, such that a display device comprising: a light emitting diode on a side of the anti-oxidation layer away from the base substrate, comprising at least one electrode, wherein the at least one electrode of the light emitting diode electrically connected to the metal layer, so that the pixel electrode, 31 is connected to the drain electrode, 24, through the first via hole and has a positive potential and further connected to source electrode, 24 and has a negative potential for the electrical current flow in the device (ZHANG, [0070-0073]).
KUCHIYAMA as modified by LI and ZHANG does not explicitly disclose a display, comprising: wherein the base substrate comprises a display region and a mark region, and the display substrate comprises a first accompanying plating region in the mark region and a second accompanying plating region in the display region, wherein each of the first accompanying plating region and the second accompanying plating region comprises a copper layer and wherein a ratio of an area of the first accompanying plating region to an area of the mark region is larger than a ratio of an area of the second accompanying plating region to an area of the display region.
LIN teaches a display (Figs. 3/8, 100/300, display substrate/array substrate), comprising:
wherein the base substrate (Figs. 3/8, 101, base substrate) comprises a display region (Figs. 3/8, 102) and a mark region (Figs. 3/8, 103/104, peripheral region/filling areas), and the display substrate (Figs. 3/8, 101, base substrate) comprises a first accompanying plating region (Fig. 3/8, 1051, first alignment marks) in the mark region (Figs. 3/8, 103/104, peripheral region/filling areas) and a second accompanying plating region (Figs. 6/8, 110/106, first metal layer/black matrix metallic film) in the display region (Figs. 3/8, 102),
wherein each of the first accompanying plating region (Fig. 3/8, 1051, first alignment marks) and the second accompanying plating region (Fig. 8, 110, first metal layer) comprises a copper layer (the alignment marks, 1051 and the black matrix, 106 are made of a same material, [0044], [0074]) and
wherein a ratio of an area of the first accompanying plating region (Fig. 3/8, 1051, first alignment marks) to an area of the mark region (Figs. 3/8, 103/104, peripheral region/filling areas) is larger than a ratio (annotated Figure 6) of an area of the second accompanying plating region (Figs. 6/8, 110/106, first metal layer/black matrix metallic film) to an area of the display region (Figs. 3/8, 102).
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Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention (AIA ) to have modified KUCHIYAMA as modified by LI and ZHANG to incorporate the teachings of LIN, such that a display device comprising: wherein the base substrate comprises a display region and a mark region, and the display substrate comprises a first accompanying plating region in the mark region and a second accompanying plating region in the display region, wherein each of the first accompanying plating region and the second accompanying plating region comprises a copper layer and wherein a ratio of an area of the first accompanying plating region to an area of the mark region is larger than a ratio of an area of the second accompanying plating region to an area of the display region. The aforementioned arrangements with alignment marks may be used for monitoring a deformation of a base substrate, for example, an internal contraction and an external expansion, so as to modify the deformation of the base substrate timely (LIN, [0003]).
Regarding Claim 2, KUCHIYAMA as modified by LI, ZHANG and LIN teaches the display substrate of claim 1.
ZHANG further teaches the display substrate (Fig. 1, display panel, [0089]), wherein the anti-oxidation layer (Figs. 14/25, 110/34, metal layer/metal common electrode; ) comprises a nickel-containing alloy (a nickel-chromium alloy or the like, [0130]).
Regarding Claim 6, KUCHIYAMA as modified by LI, ZHANG and LIN teaches the display substrate of claim 1.
ZHANG further teaches the display substrate (Fig. 1, display panel, [0089]), wherein the anti-oxidation layer (Figs. 14/25, 110/34, metal layer/metal common electrode) covers the metal layer (Fig. 25, 32, metal electrode), and the at least one electrode (Fig. 25, 31, pixel electrode) of the light emitting diode (Fig. 25, 4, micro light emitting diode) is electrically connected ([0075]) to the metal layer (Fig. 25, 32, metal electrode) through the anti-oxidation layer (Figs. 14/25, 110/34, metal layer/metal common electrode).
Regarding Claim 7, KUCHIYAMA as modified by LI, ZHANG and LIN teaches the display substrate of claim 1.
ZHANG further teaches the display substrate (Fig. 1, display panel, [0089]), wherein the display substrate (Fig. 25, 101) further comprises a passivation layer (Figs. 16/25, 111, second passivation layer) on the anti-oxidation layer (Figs. 14/25, 110/34, metal layer/metal common electrode) away from the base substrate (Figs. 16/25, 101) and a first via hole (Fig. 25, via hole c, [0010]) in the passivation layer (Figs. 16/25, 111, second passivation layer), wherein the first via hole (Fig. 25, via hole c, [0010]) exposing at least a part of the anti-oxidation layer (Figs. 14/25, 110/34, metal layer/metal common electrode), and the at least one electrode (Fig. 25, 31, pixel electrode) of the light emitting diode (Fig. 25, 4, micro light emitting diode) is electrically connected ([0069-0074]) to the metal layer (Fig. 25, 32, metal electrode, a copper-molybdenum stack, a copper-molybdenum-titanium stack, nickel-chromium alloy, [0087]) through the first via hole (Fig. 25, via hole c, [0010]).
Regarding Claim 8, KUCHIYAMA as modified by LI, ZHANG and LIN teaches the display substrate of claim 1.
ZHANG further teaches, the display substrate (Fig. 1, display panel, [0089]), wherein the anti-oxidation layer (Figs. 14/25, 110/34, metal layer/metal common electrode) covers the metal layer (Fig. 25, 32, metal electrode).
Regarding Claim 9, KUCHIYAMA as modified by LI, ZHANG and LIN teaches the display substrate of claim 1.
ZHANG further teaches, the display substrate (Fig. 1, display panel, [0089]), wherein the display substrate (Fig. 1, display panel, [0089]) further comprises a passivation layer (Fig. 25, 114, third passivation layer) on the anti-oxidation layer (Figs. 14/25, 110/34, metal layer/metal common electrode) away from the base substrate (Fig. 25, 101) and a third via hole (Fig. 25, via hole c, [0010], [0155]) in the passivation layer (Fig. 25, 114, third passivation layer),
wherein the third via hole (Fig. 25, via hole c, [0010], [0155]) is located at a pad position of the display region and exposes at least a part of the metal layer (Fig. 25, 32, metal electrode), and the at least one electrode (Fig. 25, 31, pixel electrode) of the light emitting diode (Fig. 25, 4, micro light emitting diode) is electrically connected ([0069-0074]) to the metal layer (Fig. 25, 32, metal electrode) through the third via hole ([0155]).
Regarding Claim 10, KUCHIYAMA as modified by LI, ZHANG and LIN teaches the display substrate of claim 9.
ZHANG further teaches, the display substrate (Fig. 1, display panel, [0089]), wherein the fourth via hole (Fig. 25, via hole c, [0010], [0164]) is located at a bonding position and exposes at least a part of the anti-oxidation layer (Figs. 14/25, 110/34, metal layer/metal common electrode), and the at least one electrode (Fig. 25, 31, pixel electrode) of the light emitting diode (Fig. 25, 4, micro light emitting diode) is electrically connected ([0069-0074]) to the metal layer (Fig. 25, 32, metal electrode) through the exposed part of the anti-oxidation layer Figs. 14/25, 110/34, metal layer/metal common electrode.
Regarding Claim 20, KUCHIYAMA as modified by LI, ZHANG and LIN teaches a display device comprising the display substrate according to claim 1.
KUCHIYAMA further teaches, a display device (Fig. 6, 31, display device; Fig. 4, 22, conductive film) comprising the display substrate (Fig. 4, 12, transparent film base).
Claim(s) 4, 5, and 11 is/are rejected under 35 U.S.C. 103 as being unpatentable over KUCHIYAMA, in view of LI, further in view of ZHANG, further in view of LIN, and further in view of Yo-Jong Kim, (hereinafter KIM), US 20080106738 A1.
Regarding Claim 4, KUCHIYAMA as modified by LI, ZHANG and LIN teaches the display substrate of claim 1.
LIN though teaches the display substrate, wherein the mark regions defined with alignment mark, KUCHIYAMA as modified by LI, ZHANG and LIN does not disclose the display substrate, wherein the display substrate further comprises a mark in the mark region and a clearance region in the mark region, and the first accompanying plating region surrounds the mark, and the clearance region is between the mark and the first accompanying plating region and surrounds the mark.
KIM teaches in Figure 7, the display substrate (display device, [0005]; Fig. 6, 100, substrate), wherein the display substrate (display device, [0005]; Fig. 6, 100, substrate) further comprises a mark (Fig. 6, 152, second pattern) in the mark region (Fig. 6, 600, alignment mark) and a clearance region (Fig. 6, 150, first pattern) in the mark region (Fig. 6, 600, alignment mark), and
the first accompanying plating region (Fig. 6, 154, third pattern) surrounds the mark (Fig. 6, 152, second pattern), and the clearance region (Fig. 6, 150, first pattern) is between the mark (Fig. 6, 152, second pattern) and the first accompanying plating region (Fig. 6, 154, third pattern) and surrounds the mark (Fig. 6, 152, second pattern).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention (AIA ) to have modified KUCHIYAMA as modified by LI and ZHANG and LIN to incorporate the teachings of KIM, such that the display substrate, wherein the display substrate further comprises a mark in the mark region and a clearance region in the mark region, and the first accompanying plating region surrounds the mark, and the clearance region is between the mark and the first accompanying plating region and surrounds the mark, so that this arrangement of mark, clearance region and the accompanying plating region in the mark regions thus increase the efficiency of the alignment mark for the fabrication or assembling of display devices within a permitted error limit (KIM, [0026]).
Regarding Claim 5 KUCHIYAMA as modified by LI, ZHANG, LIN and KIM teaches the display substrate of claim 4.
KIM further teaches in Figure 7, the display substrate (display device, [0005]; Fig. 6, 100, substrate), wherein an orthographic projection (Fig. 5, 500, alignment mark) of the first accompanying plating region (Fig. 6, 154, third pattern) on the base substrate (display device, [0005]; Fig. 6, 100, substrate) is a loop-shaped region (Fig. 5, 154 in square loop shape) surrounding the mark (Fig. 6, 152, second pattern).
Regarding Claim 11, KUCHIYAMA as modified by LI, ZHANG, and LIN teaches the display substrate of claim 9.
LI further teaches the display substrate (Fig. 1, display device, [0017]), wherein the anti-oxidation layer (Fig. 1, 22, conductive protection layer) comprises an opening (Fig. 1, 72, second via structure) exposing at least a part of the metal layer (Fig. 1, 21, [0047-0048]), and an orthographic projection of the third via hole (Fig. 1, 73, third via structure) on the base substrate (Fig. 1, 1) is within an orthographic projection (Fig. 1, 92, alignment mark layer comprises at least one alignment mark, [0061-0062]) of the opening on the base substrate (Fig. 1, 1).
KUCHIYAMA as modified by LI, ZHANG, and LIN does not disclose the display substrate, wherein an orthographic projection of the third via hole on the base substrate is within an orthographic projection of the opening on the base substrate.
KIM teaches in Figure 7, the display substrate (display device, [0005]; Fig. 6, 100, substrate), wherein an orthographic projection (Fig. 5, 400, alignment mark) of the third via hole (Fig. 6, 110, opening) on the base substrate (Fig. 6, 100) is within an orthographic projection (Fig. 5, 400, alignment mark) of the opening on the base substrate (Fig. 6, 100).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention (AIA ) to have modified KUCHIYAMA as modified by LI and ZHANG and LIN to incorporate the teachings of KIM, such that the display substrate, wherein an orthographic projection of the third via hole on the base substrate is within an orthographic projection of the opening on the base substrate, so that this arrangement of mark, thus increase the efficiency of the alignment mark for the fabrication or assembling of display devices within a permitted error limit (KIM, [0026]).
Claim(s) 12, 16 is/are rejected under 35 U.S.C. 103 as being unpatentable over LI in view of KUCHIYAMA.
Regarding Claim 12, LI teaches a method for manufacturing a display substrate (Fig. 3, steps S301-S313, a method for a manufacturing the driving backplane, [0034]), comprising:
depositing a copper seed layer (Fig. 2, S201, 210/220, bonding metal film/transparent conductive material film, [0070]) on a base substrate (Fig. 2, 1);
forming a photoresist layer (Fig. 2, step 201, 230, photoresist film, [0070]) on a side of the copper seed layer (Fig. 2, S201, bonding metal film/transparent conductive material film, 210/220, [0070]) away from the base substrate (Fig. 2, 1);
patterning (Fig. 2, S201-S206, forming the pattern of the bonding layer, [0070]) the photoresist layer (Fig. 2, step 201, 230, photoresist film, [0070]) by using a patterning process (Fig. 2, S202-S204, [0072-0074]) to form a photoresist pattern (Fig. 2, S204, 230′, etching mask to form a pattern of the conductive protection layer, 22, [0074]);
forming a copper layer (Fig. 2, S204-S205, the bonding metal film 210, is etched through the etching mask, 230′, to form a pattern of the bonding metal layer, 21, [0075]) on a part of the copper seed layer (Fig. 2, S201, bonding metal film/transparent conductive material film, 210/220, [0070]) not covered by the photoresist pattern (Fig. 2, S204, 230′, etching mask to form a pattern of the conductive protection layer, 22, [0074]) by using an electroplating process (Fig. 2, S205, form a pattern of the bonding metal layer, 21, [0075]; note: according to Wikipedia, electroplating is a process for producing metal coating on a solid substrate);
removing the photoresist pattern (Fig. 2, S206, the etching mask, 230′, on the surface of the conductive protection layer, 22 is removed, [0076]) and a part of the copper seed layer (Fig. 2, 210, bonding metal film [0070]) not covered by the metal layer (Fig. 2, bonding metal layer, 21, [0075]) to form a metal layer comprising copper (Fig. 2, bonding metal layer, 21, [0075]; Ti layer, Al layer, Mo layer, [0077-0078]; note: it should be noted that substituting Cu or copper layer for (Ti or Al or Mo layer) is a simple substitution of one known element for another to obtain predictable results, [see MPEP2143]);
forming an anti-oxidation layer (Fig. 2, bonding metal layer 21, is a composite metal layer comprising a first titanium layer, an aluminum layer and a second titanium layer, [0049]; note: see NPL supportive evidence, corrosion science, volume 192, November 2021, 109845, titled: revealing anti-oxidation mechanisms of titanium composite materials) on a side of the metal layer (Fig. 2, bonding metal layer, 21, [0075]) away from the base substrate (Fig. 2, 1); and
mounting a light emitting diode (Fig. 1, 200, micro LED) on a side of the anti-oxidation layer (Fig. 2, bonding metal layer 21, is a composite metal layer comprising a first titanium layer, an aluminum layer and a second titanium layer, [0049]; note: see NPL supportive evidence, corrosion science, volume 192, November 2021, 109845, titled: revealing anti-oxidation mechanisms of titanium composite materials) away from the base substrate (Fig. 2, 1), wherein the light emitting diode (Fig. 1, 200, micro LED) comprises at least one electrode (Fig. 1, 20, driving electrode, [0047]) electrically connected ([0049]) to the metal layer (Fig. 2, bonding metal layer, 21, [0049], [0075]).
Though LI teaches the metal layer comprising titanium composite material with its functionality equated to an anti-oxidation layer, LI does not disclose a display substrate comprising: forming an anti-oxidation layer on a side of the metal layer away from the base substrate; and wherein a first thickness of the metal layer is larger than a second thickness of the anti-oxidation layer.
KUCHIYAMA teaches a method for manufacturing a display substrate (Fig. 6, 31, display device; Fig. 4, 22, conductive film) comprising: forming an anti-oxidation layer (Fig. 4, 13, conductive oxide layer, [0024]) on a side of the metal layer (Fig. 4, 14, metal layer is preferably a copper layer or a copper alloy layer, [0009]) away from the base substrate (Fig. 4, 12, transparent film base); and wherein a first thickness (the metal layer has a layer thickness of 50 nm or more and 250 nm or less, [0007]) of the metal layer (Fig. 4, 14, metal layer is preferably a copper layer or a copper alloy layer, [0009]) is larger than a second thickness of the anti-oxidation layer (the layer thickness, T of the transparent conductive oxide layer, 13 is preferably 10nm or more and 120 nm or less, [0045]).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention (AIA ) to have modified LI to incorporate the teachings of KUCHIYAMA, such that a method for manufacturing a display substrate comprising: forming an anti-oxidation layer on a side of the metal layer away from the base substrate; and wherein a first thickness of the metal layer is larger than a second thickness of the anti-oxidation layer, so that if the layer thickness of the transparent electrode layer, 13 is within the above-mentioned range, warpage due to stress can be suppressed while the transparent electrode layer has both transparency and conductivity (KUCHIYAMA, [0045]).
Regarding Claim 16, LI as modified by KUCHIYAMA teaches the method of claim 12.
KUCHIYAMA teaches the method (Fig. 6, 31, display device; Fig. 4, 22, conductive film), wherein the forming an anti-oxidation layer (Fig. 4, 13, conductive oxide layer, [0024]) on a side of the metal layer (Fig. 4, 14, metal layer is preferably a copper layer or a copper alloy layer, [0009]) away from the base substrate (Fig. 4, 12, transparent film base) comprises:
forming a nickel-containing alloy layer covering the metal layer on the side of the metal layer (Fig. 4, 14, metal layer is preferably a copper layer or a copper alloy layer, [0009]) away from the base substrate (Fig. 4, 12, transparent film base) [note: it should be noted that substituting nickel-alloy layer for (copper alloy layer) is a simple substitution of one known element for another to obtain predictable results, [see MPEP2143]).
Claim(s) 13 is/are rejected under 35 U.S.C. 103 as being unpatentable over LI in view of KUCHIYAMA, and further in view of LIN.
Regarding Claim 13, LI as modified by KUCHIYAMA teaches the method of claim 12.
LI further teaches the method (Fig. 3, steps S301-S313, a method for a manufacturing the driving backplane, [0034]), wherein forming the copper layer (Fig. 2, S204-S205, the bonding metal film 210, is etched through the etching mask, 230′, to form a pattern of the bonding metal layer, 21, [0075]) on a part of the copper seed layer (Fig. 2, S201, bonding metal film/transparent conductive material film, 210/220, [0070]) not covered by the photoresist pattern (Fig. 2, S204, 230′, etching mask to form a pattern of the conductive protection layer, 22, [0074]) by using an electroplating process (Fig. 2, S205, form a pattern of the bonding metal layer, 21, [0075]; note: according to Wikipedia, electroplating is a process for producing metal coating on a solid substrate);
LI as modified by KUCHIYAMA does not explicitly disclose the method, wherein the base substrate comprises a display region and a mark region, and the forming a copper layer by using an electroplating process comprises: forming a first accompanying plating region in the mark region; and forming a second accompanying plating region in the display region, wherein each of the first accompanying plating region and the second accompanying plating region comprises a part of the copper layer; and wherein a ratio of an area of the first accompanying plating region to an area of the mark region is larger than a ratio of an area of the second accompanying plating region to an area of the display region.
LIN teaches the method (Fig. 10, flow diagram of a method for manufacturing a display substrate, [0015]), wherein the base substrate (Figs. 3/8, 101, base substrate) comprises a display region (Figs. 3/8, 102) and a mark region (Figs. 3/8, 103/104, peripheral region/filling areas), and the forming a copper layer by using an electroplating process (the alignment marks, 1051 and the black matrix, 106 are made of a same material, [0044], [0074]) comprises:
forming a first accompanying plating region (Fig. 3/8, 1051, first alignment marks) in the mark region (Figs. 3/8, 103/104, peripheral region/filling areas); and
forming a second accompanying plating region (Fig. 8, 110, first metal layer) in the display region (Figs. 3/8, 102),
wherein each of the first accompanying plating region (Fig. 3/8, 1051, first alignment marks) and the second accompanying plating region (Fig. 8, 110, first metal layer) comprises a part of the copper layer (the alignment marks, 1051 and the black matrix, 106 are made of a same material, [0044], [0074]); and
wherein a ratio of an area of the first accompanying plating region (Fig. 3/8, 1051, first alignment marks) to an area of the mark region (Figs. 3/8, 103/104, peripheral region/filling areas) is larger than a ratio (annotated Figure 6) of an area of the second accompanying plating region (Figs. 6/8, 110/106, first metal layer/black matrix metallic film) to an area of the display region (Figs. 3/8, 102).
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Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention (AIA ) to have modified LI as modified by KUCHIYAMA to incorporate the teachings of LIN, such that a display device, wherein the base substrate comprises a display region and a mark region, and the forming a copper layer by using an electroplating process comprises: forming a first accompanying plating region in the mark region; and forming a second accompanying plating region in the display region, wherein each of the first accompanying plating region and the second accompanying plating region comprises a part of the copper layer; and wherein a ratio of an area of the first accompanying plating region to an area of the mark region is larger than a ratio of an area of the second accompanying plating region to an area of the display region. The aforementioned arrangements with alignment marks may be used for monitoring a deformation of a base substrate, for example, an internal contraction and an external expansion, so as to modify the deformation of the base substrate timely (LIN, [0003]).
Claim(s) 14 is/are rejected under 35 U.S.C. 103 as being unpatentable over LI in view of KUCHIYAMA, further in view of LIN, and further in view of KIM.
Regarding Claim 14, LI as modified by KUCHIYAMA and LIN teaches the method of claim 13.
LI as modified by KUCHIYAMA and LIN does not explicitly disclose the method, wherein the method further comprises forming a mark by using an electroplating process in a region surrounded by the first accompanying plating region.
KIM teaches the method (Fig. 7, alignment marks, [0016]), wherein the method further comprises forming a mark (Fig. 6, 152, second pattern) by using an electroplating process in a region surrounded by the first accompanying plating region (Fig. 6, 154, third pattern).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention (AIA ) to have LI as modified by KUCHIYAMA and LIN to incorporate the teachings of KIM, such that the display substrate, wherein the method, wherein the method further comprises forming a mark by using an electroplating process in a region surrounded by the first accompanying plating region, so that this arrangement of mark, and the accompanying plating region in the mark regions thus increase the efficiency of the alignment mark for the fabrication or assembling of display devices within a permitted error limit (KIM, [0026]).
Claim(s) 15, 17-19 is/are rejected under 35 U.S.C. 103 as being unpatentable over LI in view of KUCHIYAMA, and further in view of ZHANG.
Regarding Claim 15, LI as modified by KUCHIYAMA teaches the method of claim 12.
KUCHIYAMA further teaches the method for manufacturing a display substrate (Fig. 6, 31, display device; Fig. 4, 22, conductive film), wherein the forming an anti-oxidation layer (Fig. 4, 13, conductive oxide layer, [0024]) on a side of the metal layer (Fig. 4, 14, metal layer) away from the base substrate (Fig. 4, 12, transparent film base).
LI as modified by KUCHIYAMA does not explicitly disclose the method, wherein forming a passivation layer on the side of the metal layer away from the base substrate; forming a first via hole in the passivation layer, wherein the first via exposes at least a part of the metal layer; and forming the anti-oxidation layer in the first via hole.
ZHANG further teaches the method (Figs. 2-25, schematic flowcharts of a method for fabricating the micro light emitting diode display panel, [0057]), wherein forming a passivation layer (Figs. 16/25, 111, second passivation layer) on the side of the metal layer (Fig. 25, 32, metal electrode) away from the base substrate (Figs. 16/25, 101);
forming a first via hole (Fig. 25, via hole c, [0010]) in the passivation layer (Figs. 16/25, 111, second passivation layer), wherein the first via (Fig. 25, via hole c, [0010]) exposes at least a part of the metal layer (Fig. 25, 32, metal electrode); and
forming the anti-oxidation layer (Fig. 25, 114, encapsulation layer) in the first via hole (Fig. 25, via hole c, [0010]),
wherein the anti-oxidation layer (Fig. 25, 114, encapsulation layer) comprises an organic solderability preservative film (Fig. 25, 114, the encapsulation layer may be an organic protection film or the like, [0146]).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention (AIA ) to have LI as modified by KUCHIYAMA to incorporate the teachings of ZHANG, such that the method, wherein forming a passivation layer on the side of the metal layer away from the base substrate; forming a first via hole in the passivation layer, wherein the first via exposes at least a part of the metal layer; and forming the anti-oxidation layer in the first via hole, so that the metal electrode on the pixel electrode, wherein the micro light emitting diode is connected to the pixel electrode through the via hole and the electrode for reducing the shift of the threshold voltage of the thin film transistor as a major improvement (ZHANG, [0004], [0015]).
Regarding Claim 17, LI as modified by KUCHIYAMA teaches the method of claim 12.
KUCHIYAMA further teaches the method for manufacturing a display substrate (Fig. 6, 31, display device; Fig. 4, 22, conductive film), wherein the forming an anti-oxidation layer (Fig. 4, 13, conductive oxide layer, [0024]) on a side of the metal layer (Fig. 4, 14, metal layer) away from the base substrate (Fig. 4, 12, transparent film base) comprises:
forming a nickel-containing alloy layer covering the metal layer on the side of the metal layer (Fig. 4, 14, metal layer is preferably a copper layer or a copper alloy layer, [0009]) away from the base substrate (Fig. 4, 12, transparent film base) [note: it should be noted that substituting nickel-alloy layer for (copper alloy layer) is a simple substitution of one known element for another to obtain predictable results, [see MPEP2143]).
LI as modified by KUCHIYAMA does not explicitly disclose the method, wherein forming a passivation layer on a side of the nickel-containing alloy layer away from the base substrate; and forming a second via hole in the passivation layer, wherein the second via hole exposes at least a part of the nickel-containing alloy layer.
ZHANG teaches the method (Figs. 2-25, schematic flowcharts of a method for fabricating the micro light emitting diode display panel, [0057]), wherein
forming a passivation layer (Figs. 16/25, 111, second passivation layer) on a side of the nickel-containing alloy layer (Fig. 25, 32, metal electrode, a copper-molybdenum stack, a copper-molybdenum-titanium stack, nickel-chromium alloy, [0087]) away from the base substrate (Figs. 16/25, 101); and
forming a second via hole (Fig. 25, via hole c, [0010]) in the passivation layer (Figs. 16/25, 111, second passivation layer), wherein the second via hole (Fig. 25, via hole c, [0010]) exposes at least a part of the nickel-containing alloy layer (Fig. 25, 32, metal electrode, a copper-molybdenum stack, a copper-molybdenum-titanium stack, nickel-chromium alloy, [0087]).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention (AIA ) to have LI as modified by KUCHIYAMA to incorporate the teachings of ZHANG, such that the method, wherein forming a passivation layer on a side of the nickel-containing alloy layer away from the base substrate; and forming a second via hole in the passivation layer, wherein the second via hole exposes at least a part of the nickel-containing alloy layer, so that the metal electrode on the pixel electrode, wherein the micro light emitting diode is connected to the pixel electrode through the via hole and the electrode for reducing the shift of the threshold voltage of the thin film transistor as a major improvement (ZHANG, [0004], [0015]).
Regarding Claim 18, LI as modified by KUCHIYAMA teaches the method of claim 12.
KUCHIYAMA further teaches the method for manufacturing a display substrate (Fig. 6, 31, display device; Fig. 4, 22, conductive film), wherein
forming an anti-oxidation layer (Fig. 4, 13, conductive oxide layer, [0024]) on a side of the metal layer (Fig. 4, 14, metal layer) away from the base substrate (Fig. 4, 12, transparent film base) comprises:
forming a nickel-containing alloy layer covering the metal layer on the side of the metal layer (Fig. 4, 14, metal layer is preferably a copper layer or a copper alloy layer, [0009]) away from the base substrate (Fig. 4, 12, transparent film base) [note: it should be noted that substituting nickel-alloy layer for (copper alloy layer) is a simple substitution of one known element for another to obtain predictable results, [see MPEP2143]).
LI further teaches the method (Fig. 1, display device, [0017]), wherein
forming an opening (Fig. 1, 72, second via structure) in the nickel-containing alloy layer (Fig. 1, 21, [0047-0048]) at a pad position of the display region, wherein the opening (Fig. 1, 72, second via structure) exposes at least a part of the metal layer (Fig. 1, 21, [0047-0048]);
an orthographic projection (Fig. 1, 92, alignment mark layer comprises at least one alignment mark, [0061-0062]) of the third via hole (Fig. 1, 73, third via structure) on the base substrate (Fig. 1, 1) is located within an orthographic projection (Fig. 1, 92, alignment mark layer comprises at least one alignment mark, [0061-0062]) of the opening (Fig. 1, 72, second via structure) on the base substrate (Fig. 1, 1).
LI as modified by KUCHIYAMA does not explicitly disclose the method, wherein
forming a passivation layer on a side of the nickel-containing alloy layer away from the base substrate; and forming a third via hole in the passivation layer at the pad position of the display region, wherein the third via hole exposes at least a part of the metal layer.
ZHANG teaches the method (Figs. 2-25, schematic flowcharts of a method for fabricating the micro light emitting diode display panel, [0057]), wherein
forming a passivation layer (Figs. 16/25, 111, second passivation layer) on a side of the nickel-containing alloy layer (Fig. 25, 32, metal electrode, a copper-molybdenum stack, a copper-molybdenum-titanium stack, nickel-chromium alloy, [0087]) away from the base substrate (Figs. 16/25, 101); and
forming a third via hole (Fig. 25, via hole c, [0010], [0155]) in the passivation layer (Figs. 16/25, 111, second passivation layer) at the pad position of the display region (Fig. 25, schematic flowcharts of a method for fabricating the micro light emitting diode display panel, [0057]), wherein the third via hole (Fig. 25, via hole c, [0010], [0155]) exposes at least a part of the metal layer (Fig. 25, 32, metal electrode, a copper-molybdenum stack, a copper-molybdenum-titanium stack, nickel-chromium alloy, [0087]) away from the base substrate (Figs. 16/25, 101).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention (AIA ) to have LI as modified by KUCHIYAMA to incorporate the teachings of ZHANG, such that the method, wherein forming a passivation layer on a side of the nickel-containing alloy layer away from the base substrate; and forming a third via hole in the passivation layer at the pad position of the display region, wherein the third via hole exposes at least a part of the metal layer, so that the metal electrode on the pixel electrode, wherein the micro light emitting diode is connected to the pixel electrode through the via hole and the electrode for reducing the shift of the threshold voltage of the thin film transistor as a major improvement (ZHANG, [0004], [0015]).
Regarding Claim 19, LI as modified by KUCHIYAMA teaches the method of claim 12.
KUCHIYAMA further teaches the method for manufacturing a display substrate (Fig. 6, 31, display device; Fig. 4, 22, conductive film), wherein
forming an anti-oxidation layer (Fig. 4, 13, conductive oxide layer, [0024]) on a side of the metal layer (Fig. 4, 14, metal layer) away from the base substrate (Fig. 4, 12, transparent film base).
LI as modified by KUCHIYAMA does not explicitly disclose the method, wherein forming a fourth via hole in the passivation layer at a bonding position, wherein the fourth via hole exposes at least a part of the nickel-containing alloy layer.
ZHANG teaches the method (Figs. 2-25, schematic flowcharts of a method for fabricating the micro light emitting diode display panel, [0057]), wherein
forming a fourth via hole (Fig. 25, via hole c, [0010], [0164]) in the passivation layer (Figs. 16/25, 111, second passivation layer) at a bonding position, wherein the fourth via hole (Fig. 25, via hole c, [0010], [0164]) exposes at least a part of the nickel-containing alloy layer (Fig. 25, 32, metal electrode, a copper-molybdenum stack, a copper-molybdenum-titanium stack, nickel-chromium alloy, [0087]).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention (AIA ) to have LI as modified by KUCHIYAMA to incorporate the teachings of ZHANG, such that the method, wherein forming a fourth via hole in the passivation layer at a bonding position, wherein the fourth via hole exposes at least a part of the nickel-containing alloy layer, so that the metal electrode on the pixel electrode, wherein the micro light emitting diode is connected to the pixel electrode through the via hole and the electrode for reducing the shift of the threshold voltage of the thin film transistor as a major improvement (ZHANG, [0004], [0015]).
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
US 20220037379 A1 – Figure 4
STATEMENT OF RELEVANCE – Schematic diagram of a manufacturing process for forming a first metal layer (Copper layer).
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/SESHA SAIRAMAN SRINIVASAN/ Examiner, Art Unit 2812 /CHRISTINE S. KIM/ Supervisory Patent Examiner, Art Unit 2812