DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Arguments
Applicant’s arguments, filed 10/23/2025, with respect to claim 1 have been fully considered and are persuasive. The rejection has been withdrawn. However after further search and/or consideration new rejection is presented.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 28-37 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Rotzoll et al (US 2018/0197471; hereinafter Rotzoll).
Regarding claim 28, Figs 1-3 of Rotzoll discloses an optoelectronic system, the system comprising:
more than one pixel (20; Fig 1; ¶ [0070]);
each pixel having multiple microdevices (22; Fig 1; ¶ [0070]); and
wherein first common lines (62; Fig 1; ¶ [0080]) connect microdevices (22; Fig 1; ¶ [0070]) and second common lines (60; Fig 1; ¶ [0080]) connect pixels (20; Fig 1; ¶ [0070]).
Regarding claim 32, Figs 1-3 of Rotzoll discloses the first common lines (62; Fig 1; ¶ [0080]) are columns (Fig 1) and the second common lines (60; Fig 1; ¶ [0080]) are rows (Fig 1).
Regarding claim 33, Figs 1-3 of Rotzoll discloses the first common lines and second column lines are select lines (Figs 1-3).
Regarding claim 34, Figs 1-3 of Rotzoll discloses firstly a first column is activated and microdevices in the first column are driven followed by a second column being activated and microdevices in the second column are driven. (Figs 1-5)
Regarding claim 35, Figs 1-3 of Rotzoll discloses firstly a first row is activated and microdevices in the first row are driven followed by a second row being activated and microdevices in the second row are driven. (Figs 1-5)
Regarding claim 36, Figs 1-3 of Rotzoll discloses firstly a first column is activated and pixels in the first column are driven followed by a second column being activated and pixels in the second column are driven. (Figs 1-5)
Regarding claim 37, Figs 1-3 of Rotzoll discloses firstly a first row is activated and pixels in the first row are driven followed by a second row being activated and pixels in the second row are driven. (Figs 1-5)
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 1-15 are rejected under 35 U.S.C. 103 as being unpatentable over Chaji et al (US 2016/0218143; hereinafter Chaji) in view of Oh et al (US 2020/0287110; hereinafter Oh).
Regarding claim 1, Figs 3 and 6 of Chaji discloses an optoelectronic system, the system comprising:
microdevices (601a/601b; Fig 6A; ¶ [0159]/ 102a/102b; Fig 3A; ¶ [0147]) transferred to a substrate (100; Figs 3A/6A; ¶ [0147]);
openings (Figs 2B/ 6B; opening formed in layer 201) formed to provide access (Figs 4A and 6B) to the top of the microdevices (601a/601b; Fig 6A; ¶ [0159]/ 102a/102b; Fig 3A; ¶ [0147]);
a common electrode (301; Fig 6F; ¶ [0154]);
However Chaji does not expressly disclose a second opening providing access to a common electrode; and pads formed on top of openings coupling microdevices and the common electrode.
In the same field of endeavor, Fig 5H of Oh discloses forming a common electrode (574; Fig 5H; ¶ [0073]) formed and a second opening (576; Fig 5H; ¶ [0074]) providing access (Fig 5H) to the common electrode (303; Fig 3D; ¶ [0154]) and pads (577; Fig 5H; ¶ [0075]) formed on top of openings (576; Fig 5H; ¶ [0074]) coupling microdevices (530; Fig 5H; ¶ [0062]) and the common electrode (574; Fig 5H; ¶ [0073]).
Accordingly it would have been obvious to the person in the ordinary skill in the art before the effective filing date of the invention such that a second opening providing access to a common electrode and pads formed on top of openings coupling microdevices and the common electrode in order to the metal patterns for the contact layers and hence form the common electrode and connect them to the pads (¶ [0075]).
Regarding claim 2, Figs 3 and 6 of Chaji discloses the common electrode (301; Fig 6F; ¶ [0154]) is transparent (¶ [0150]).
Regarding claim 3, Figs 3 and 6 of Chaji discloses the common electrode (301; Fig 6F; ¶ [0154]) is formed on top of the substrate (100; Figs 3A/6A; ¶ [0147]).
Regarding claim 4, Figs 3 and 6 of Chaji discloses there are buffer layers (201/202; Fig 2B; ¶ [0148]) before the common electrode (301; Fig 6F; ¶ [0154]).
Regarding claim 5, Fig 3 and 6 of Chaji does not expressly disclose dielectric layers form on top of the common electrode with an opening in the dielectric layers.
In the same field of endeavor, Fig 5H of Oh discloses dielectric layers (570; Fig 5H; ¶ [0069]) form on top of the common electrode (574; Fig 5H; ¶ [0073]) with an opening in the dielectric layers.
Accordingly it would have been obvious to the person in the ordinary skill in the art before the effective filing date of the invention such a dielectric layers is formed on top of the common electrode with opening in dielectric layer in order to form the circuit board and forming connections in the opening in order to connect pads to the top of microdevice (¶ [0069]).
Regarding claim 6, Figs 3 and 6 of Chaji discloses a bonding pad (101a/101b; Fig 2B; ¶ [0147]) is coupled to the common electrode (301; Fig 6F; ¶ [0154]).
Regarding claim 7, Figs 3 and 6 of Chaji discloses the microdevice is on top (Fig 2B) of the bonding pad (101a/101b; Fig 2B; ¶ [0147]).
Regarding claim 8, Chaji does not expressly disclose a third opening to the microdevice and a fourth opening provide access to the common electrode.
In the same field of endeavor, Fig 5H of Oh discloses a third opening to the micro device and a fourth opening provide access to the common electrode (Fig 5H).
Accordingly it would have been obvious to the person in the ordinary skill in the art before the effective filing date of the invention such that openings are formed to the microdevice and to provide access to the common electrode in order to form the vias which can in turn can provide connectivity between the microdevices and common electrode. (¶ [0069])
Regarding claim 9, Figs 3 and 6 of Chaji discloses a planarization layer (201; Fig 2B; ¶ [0148]) is formed on top of the substrate (Fig 2B).
Regarding claim 10, Chaji in view of Oh as modified above in claim 8 (Fig 5H of Oh in particular) discloses pads (577; Fig 5H; ¶ [0075] of Oh) formed on top of third and fourth openings to provide access to the microdevice and the common electrode (303; Fig 3D; ¶ [0154]).
Regarding claim 11, Chaji in view of Oh as modified above (Fig 5H of Oh in particular) discloses there are additional openings and pads to other microdevices (Fig 5H of Oh).
Accordingly it would have been obvious to the person in the ordinary skill in the art before the effective filing date of the invention such that additional openings and pads are formed to other microdevices in order to form electrical connections between the microdevices and pads and common electrode.
Regarding claim 12, Figs 3 and 6 of Chaji discloses the optoelectronic system is bonded to another substate to form a display or a senor array (¶ [0003]).
Regarding claim 13, Chaji does not expressly disclose a planarization covers at least part of an optoelectronic device.
In the same field of endeavor, Fig 5H of Oh discloses a planarization (575; Fig 5H; ¶ [0073]) covers at least part of an optoelectronic device (Fig 5H).
Accordingly it would have been obvious to the person in the ordinary skill in the art before the effective filing date of the invention such that a planarization layers covers at least part of an optoelectronic device such that an insulating layer or planarization layer is formed in order to form openings in them in order to form electrical connections.
Regarding claim 14, Chaji in view Oh as modified above in claim 13 (Fig 5H of Oh in particular) discloses the planarization layer (575; Fig 5H; ¶ [0073]) has an opening (576; Fig 5H) to provide an access to the common electrode and an additional opening (576; Fig 5H) to provide access to the top of the microdevice.
Regarding claim 15, Chaji in view of Oh as modified above in claim 13 (Fig 5H of Oh in particular) discloses pads are formed to couple to the top of the micro device and the common electrode (Fig 5H of Oh).
Conclusion
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/RATISHA MEHTA/ Primary Examiner, Art Unit 2817