DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Status of the Application
Acknowledgement is made of the amendment received on 12/22/2025. Claims 1, 3-8, and 11-20 are pending in this application. Claims 1 and 4-8 are amended. Claims 2 and 9-10 are canceled. Claims 16-20 remain withdrawn.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1, 3-4, 6, 8, and 11-12 are rejected under 35 U.S.C. 103 as being unpatentable over Yoo et al. (KR 2019/0097739; hereinafter ‘Yoo’) in view of Stecher et al. (US 2007/0267749; hereinafter ‘Stecher’).
Regarding claim 1, Yoo teaches a backlight unit (100, FIG. 5, [0029, 0033]) comprising:
a substrate (101, [0034]);
a first metal wiring layer (107 disposed under 103, since 107 is arranged on the upper and lower surfaces of 103, [0037]; hereinafter ‘FMW’) formed on the substrate (101);
a first insulating layer (103) disposed on the substrate (101) so as to cover the first metal wiring layer (FMW);
a second metal wiring layer (107 disposed over 103; hereinafter ‘SMW’) disposed on the first insulating layer (103);
a second insulating layer (111) deposited on the second metal wiring layer (SMW), defining a hole (A3, FIG. 2 (b), [0078]);
a conductive bonding layer (191 and 192, FIG. 2(c), [0079]) disposed on the second metal wiring layer (SMW) so as to fill the hole (A3); and
a semiconductor light emitting device (120) electrically connected to the second metal wiring layer (SMW) by the conductive bonding layer (191 and 192).
Yoo does not teach that the second metal wiring layer including an upper pair of metal layers and a lower pair of metal layers, wherein the upper pair of metal layers and the lower pair of metal layers each include a first metal layer having a first conductivity and a second metal layer having a higher conductivity than the first metal layer on the first metal layer and wherein the first metal layer of the upper pair of metal layers blocks diffusion of the second metal layer of the upper pair of metal layers into the lower pair of metal layers.
Stecher teaches that a second metal wiring layer (10, FIG. 2B, [0020]) including an upper pair of metal layers (10b and 11; hereinafter ‘UML’) and a lower pair of metal layers (10a and 22; hereinafter ‘LML’), wherein the upper pair of metal layers (UML) and the lower pair of metal layers (LML) each include a first metal layer (11 and 22) having a first conductivity (11 includes NiP and 22 includes Ti, [0020, 0022]), and a second metal layer (10a and 10b include Cu having a higher conductivity than NiP and Ti, [0022]) having a higher conductivity than the first metal layer (11 and 22) on the first metal layer (FML).
Stecher does not explicitly teach that the first metal layer of the upper pair of metal layers blocks diffusion of the second metal layer of the upper pair of metal layers into the lower pair of metal layers.
Stecher, however, teaches that a NiP layer prevents interdiffusion of metals including Cu [0005], and further discloses that the stabilization layer 11 is formed of NiP [0022], thereby indicating that the stabilization layer 11 would have been understood to inhibit diffusion of the upper Cu layer 10b toward the lower Cu layer 10a and underlying layers 22.
As taught by Stecher, one of ordinary skill in the art would utilize and modify the above teaching into Yoo to obtain and achieve the backlight unit comprising: the second metal wiring layer including an upper pair of metal layers and a lower pair of metal layers, wherein the upper pair of metal layers and the lower pair of metal layers each include a first metal layer having a first conductivity and a second metal layer having a higher conductivity than the first metal layer on the first metal layer and wherein the first metal layer of the upper pair of metal layers blocks diffusion of the second metal layer of the upper pair of metal layers into the lower pair of metal layers as claimed, because this metal wiring configuration prevents Cu interdiffusion and improves the stability and reliability of the metallization structure [0005, 0020-0022].
Thus, it would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to employ the teaching as taught by Stecher in combination with Yoo due to above reason.
Regarding claim 3, Yoo in view of Stecher teaches the backlight unit of claim 1, wherein the conductive bonding layer contains Sn (Yoo: 191 and 192 include Sn, [0064]).
Regarding claim 4, Yoo in view of Stecher teaches the backlight unit of claim 1, Yoo does not teach the backlight unit wherein the second metal layer contains Cu.
Stecher teaches that the second metal layer contains Cu (10a and 10b include Cu, [0022]).
It would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to employ and modify the teachings of Stecher to obtain and achieve the backlight unit wherein the second metal layer contains Cu as claimed, because Cu is a known material widely used for metal wiring layers in semiconductor devices. Further, it has been held to be within the general skill of a worker in the art to select a known material on the basis of its suitability for the intended used a matter of obvious design choice. In re Leshin, 125 USPQ 416.
Regarding claim 6, Yoo in view of Stecher teaches the backlight unit of claim 1, Yoo does not teach the backlight unit wherein the first metal layer contains at least one of Mo or Ti.
Stecher teaches that the first metal layer contains at least one of Mo or Ti (22 includes Ti, [0020]).
It would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to employ and modify the teachings of Stecher to obtain and achieve the backlight unit wherein the first metal layer contains at least one of Mo or Ti as claimed, because Ti is a known material and widely used for barrier layers in semiconductor devices. Further, it has been held to be within the general skill of a worker in the art to select a known material on the basis of its suitability for the intended used a matter of obvious design choice. In re Leshin, 125 USPQ 416.
Regarding claim 8, Yoo teaches a display device [0006] comprising:
a substrate (101, FIG. 5, [0029, 0034]);
a plurality of first metal wiring layers (multiple layers 107 disposed under 103, since 107 is arranged on the upper and lower surfaces of 103, [0037]; hereinafter ‘FMWs’) disposed on the substrate (101);
a first insulating layer (103) disposed on the substrate (101) to cover the first metal wiring layers (FMWs);
a second metal wiring layer (107 disposed over 103; hereinafter ‘SMW’) disposed on the first insulating layer (103) and including at least portions (A1, FIG. 2 (a), [0077]) spaced apart from each other (shown in FIG. 5); and
a second insulating layer (111) deposited on the second metal wiring layer (SMW).
Yoo does not teach that the second metal wiring layer includes an upper pair of metal layers and a lower pair of metal layers, wherein the upper pair of metal layers and the lower pair of metal layers each include: a first metal layer having a first conductivity; and a second metal layer having a higher conductivity than the first metal layer on the first metal layer, wherein the first metal layer of the upper pair of metal layers blocks diffusion of the second metal layer of the upper pair of metal layers into the lower pair of metal layers.
Stecher teaches that a second metal wiring layer (10, FIG. 2B, [0020]) includes an upper pair of metal layers (10b and 11; hereinafter ‘UML’) and a lower pair of metal layers (10a and 22; hereinafter ‘LML’), wherein the upper pair of metal layers (UML) and the lower pair of metal layers (LML) each include: a first metal layer (11 and 22) having a first conductivity (11 includes NiP and 22 includes Ti, [0020, 0022]); and a second metal layer (10a and 10b include Cu having a higher conductivity than NiP and Ti, [0022]) having a higher conductivity than the first metal layer (11 and 22) on the first metal layer (FML).
Stecher does not explicitly teach that the first metal layer of the upper pair of metal layers blocks diffusion of the second metal layer of the upper pair of metal layers into the lower pair of metal layers.
Stecher, however, teaches that a NiP layer prevents interdiffusion of metals including Cu [0005], and further discloses that the stabilization layer 11 is formed of NiP [0022], thereby indicating that the stabilization layer 11 would have been understood to inhibit diffusion of the upper Cu layer 10b toward the lower Cu layer 10a and underlying layers 22.
As taught by Stecher, one of ordinary skill in the art would utilize and modify the above teaching into Yoo to obtain and achieve the display device comprising: the second metal wiring layer includes an upper pair of metal layers and a lower pair of metal layers, wherein the upper pair of metal layers and the lower pair of metal layers each include: a first metal layer having a first conductivity; and a second metal layer having a higher conductivity than the first metal layer on the first metal layer, wherein the first metal layer of the upper pair of metal layers blocks diffusion of the second metal layer of the upper pair of metal layers into the lower pair of metal layers as claimed, because this metal wiring configuration prevents Cu interdiffusion and improves the stability and reliability of the metallization structure [0005, 0020-0022].
Thus, it would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to employ the teaching as taught by Stecher in combination with Yoo due to above reason.
Regarding claim 11, Yoo in view of Stecher teaches the display device of claim 8, wherein the second insulating layer has a hole (Yoo: A3, FIG. 2 (b), [0078]) disposed on a portion of an upper surface of the second metal wiring layer (shown in FIG. 2 (b)).
Regarding claim 12, Yoo in view of Stecher teaches the display device of claim 11, further comprising: a conductive bonding layer (Yoo: 191 and 192, FIG. 2(c), [0079]) disposed on the upper surface of the second metal wiring layer (shown in FIG. 5) and at least a portion of an upper surface of the second insulating layer so as to fill the hole (191 and 192 fill A3).
Claims 5 and 7 are rejected under 35 U.S.C. 103 as being unpatentable over Yoo (KR 2019/0097739) in view of Stecher (US 2007/0267749), and further in view of Chung et al. (Nanoscale Research letters (2018) 13:164; hereinafter ‘Chung’).
Regarding claim 5, Yoo in view of Stecher teaches the backlight unit of claim 4, but does not teach the backlight unit wherein the second metal layer has a thickness in a range from 200 to 700 nm.
Chung teaches that the second metal layer has a thickness in a range from 200 to 700 nm (Cu layer used for S/D electrode has a thickness 300 nm, p. 3, col. 1, lines 30-33).
As taught by Chung, one of ordinary skill in the art would utilize and modify the above teaching into Yoo in view of Stecher to obtain and achieve the backlight unit wherein the first metal layer has a thickness in a range from 200 to 700 nm as claimed, because it has been held that where the criticality of the claimed range is not shown and the general conditions of a claim are disclosed in the prior art, discovering the optimum or workable ranges involves only routine skill in the art. MPEP §2144.05.
Thus, it would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to employ the teaching as taught by Chung in combination with Yoo in view of Stecher due to above reason.
Regarding claim 7, Yoo in view of Stecher teaches the backlight unit of claim 6, but does not teach the backlight unit wherein the first metal layer has a thickness in a range from 10 to 100 nm.
Chung teaches that the first metal layer has a thickness in a range from 10 to 100 nm (Mo layer serving as a diffusion-blocking metal layer has a thickness 30 nm, p. 3, col. 1, lines 30-33).
As taught by Chung, one of ordinary skill in the art would utilize and modify the above teaching into Yoo in view of Stecher to obtain and achieve the backlight unit wherein the second metal layer has a thickness in a range from 10 to 100 nm as claimed, because it has been held that where the criticality of the claimed range is not shown and the general conditions of a claim are disclosed in the prior art, discovering the optimum or workable ranges involves only routine skill in the art. MPEP §2144.05.
Thus, it would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to employ the teaching as taught by Chung in combination with Yoo in view of Stecher due to above reason.
Claims 13 and 15 are rejected under 35 U.S.C. 103 as being unpatentable over Yoo (KR 2019/0097739) in view of Stecher (US 2007/0267749), and further in view of Di et al. (US 2021/0305283, cited as equivalent to CN110112171A; hereinafter ‘Di’).
Regarding claim 13, Yoo in view of Stecher teaches the display device of claim 12, further comprising: a semiconductor light emitting device (Yoo: 120) disposed on a portion of the conductive bonding layer and electrically connected to the second metal wiring layer via the conductive bonding layer (shown in FIG. 5).
Yoo in view of Stecher does not teach the display device further comprising a switching device disposed on a portion of the conductive bonding layer and controlling the semiconductor light emitting device.
Di teaches a display device (FIG. 21, [0051]) further comprising a switching device (TFT including 6-12, [0094]) disposed on a portion of the conductive bonding layer (41) and controlling the semiconductor light emitting device (TFT controlling 17, [0093]).
As taught by Di, one of ordinary skill in the art would utilize and modify the above teaching into Yoo in view of Stecher to obtain and achieve the display device further comprising a switching device disposed on a portion of the conductive bonding layer and controlling the semiconductor light emitting device as claimed, because the shared bonding layer shortens the current path, reducing resistive loss and heat, so efficiency and luminance uniformity improve.
Thus, it would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to employ the teaching as taught by Di in combination with Yoo in view of Stecher due to above reason.
Regarding claim 15, Yoo in view of Stecher and Di teaches the display device of claim 13, Yoo in view of Stecher does teach the display device wherein the switching device includes a thin film transistor (TFT).
Di teaches the display device wherein the switching device includes a TFT (a switching device is TFT, [0093]).
It would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to employ and modify the teachings of Di to obtain and achieve the display device wherein the switching device includes a TFT claimed, because TFT is a well-known transistor device widely used in semiconductor and display devices.
Claim 14 is rejected under 35 U.S.C. 103 as being unpatentable over Yoo (KR 2019/0097739) in view of Stecher (US 2007/0267749) and Di (US 2021/0305283), and further in view of Um et al. (Advanced Electronic Materials, 2019, 5, 1800617; hereinafter ‘Um’).
Regarding claim 14, Yoo in view of Stecher and Di teaches the display device of claim 13, but does not teach the display device wherein the switching device includes a metal-oxide semiconductor field-effect-transistor (MOSFET).
Um teaches a display device (FIG. 21, [0051]) wherein the switching device includes a MOSFET (a driving TFT is an amorphous indium-gallium-zinc-oxide TFT, abstract).
As taught by Um, one of ordinary skill in the art would utilize and modify the above teaching into Yoo in view of Stecher and Di to obtain and achieve the display device wherein the switching device includes MOSFET as claimed, because a-IGZO is a known material and widely used for MOSFET in the art. Further, it has been held to be within the general skill of a worker in the art to select a known material on the basis of its suitability for the intended used a matter of obvious design choice. In re Leshin, 277 F.2d 197, 125 USPQ 416 (CCPA 1960).
Thus, it would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to employ the teaching as taught by Um in combination with Yoo in view of Stecher and Di due to above reason.
Response to Arguments
Applicant's arguments with respect to claims have been considered but are moot in view of the new ground of rejection. Response to arguments on newly added limitations are responded to in the above rejection.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any extension fee pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to JIYOUNG OH whose telephone number is (703)756-5687. The examiner can normally be reached Monday-Friday, 9AM-5PM EST.
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/JIYOUNG OH/Examiner, Art Unit 2818
/DUY T NGUYEN/Primary Examiner, Art Unit 2818 3/10/26