DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Status of the Application
Acknowledgement is made of the amendment received on 7/17/2026. Claims 1-3, 5, 10-11, 14, 16-17, 19, 21-24, and 41-42 are pending in this application. Claims 1 and 24 are amended. Claims 28 and 35-40 remain withdrawn.
Information Disclosure Statement
The information disclosure statement (IDS) filed on 7/17/2026 is in compliance with the provisions of 37 CFR 1.97. Accordingly, the IDS is considered by the examiner.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-3, 5, 10-11, 14, 16, 22, and 24 are rejected under 35 U.S.C. 103 as being unpatentable over Yagyu et al. (JP 2007115944; hereinafter ‘Yagyu’) in view of Muir (WO 2019/191674).
Regarding claim 1, Yagyu teaches a device, comprising:
a non-conducting substrate (21, FIG. 8, [0024]);
a gate electrode (23, FIG. 8, [0024]) positioned on the substrate (21) and having top surface with a root mean square roughness less than 3 nm (RMS of 23 is about 0.5 nm);
a gate insulator (24, FIG. 9, [0025]) positioned on the gate electrode (23) and having a corresponding root mean square roughness to the top surface of the gate electrode (RMS of 24 is about 0.8 nm); and
a semiconductor material (30, FIG. 11, [0027]) positioned on the gate insulator (24) and having a thickness (shown in FIG. 11),
wherein the gate electrode (23).
Yagyu does not teach that the gate electrode includes an amorphous metal.
Muir teaches a device (a transistor, p. 3, lines 23-25) comprising the gate electrode includes an amorphous metal (the amorphous metal gate electrode, p. 3, lines 23-25).
As taught by Muir, one of ordinary skill in the art would utilize and modify the above teaching into Yagyu to obtain and achieve the device comprising the gate electrode includes an amorphous metal as claimed, because amorphous metals provide smoother surfaces than crystalline metals, thereby reducing surface imperfections and electric-field inhomogeneity and improving device reliability (p. 1, lines 20-21).
Thus, it would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to employ the teaching as taught by Muir in combination with Yagyu due to the above reason.
Regarding claim 2, Yagyu in view of Muir teaches the device of claim 1, wherein the top surface of the gate electrode has a low roughness, and wherein the low roughness is indicative of a surface roughness being less than 2 nm (Yagyu: RMS of 23 is about 0.5 nm, [0024]).
Regarding claim 3, Yagyu in view of Muir teaches the device of claim 2, wherein the surface roughness of the top surface of the gate electrode is less than 1 nm (Yagyu: RMS of 23 is about 0.5 nm, [0024]).
Regarding claim 5, Yagyu in view of Muir teaches the device of claim 2, Yagyu does not teach the device wherein the gate electrode includes titanium aluminide (TiAl3).
Muir teaches the device wherein the gate electrode includes TiAl3 (the amorphous metal gate electrode include TiAl3, p. 3, line 30-p. 4, line 3).
It would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to employ and modify the teachings of Muir to obtain and achieve the device wherein the gate electrode includes TiAl3 as claimed, because TiAl3 is a well-known material and widely used as an amorphous metal of the gate electrode in the art. Further, it has been held to be within the general skill of a worker in the art to select a known material on the basis of its suitability for the intended used a matter of obvious design choice. In re Leshin, 277 F.2d 197, 125 USPQ 416 (CCPA 1960)
Regarding claim 10, Yagyu in view of Muir teaches the device of claim 1, Yagyu does not teach the device wherein the gate electrode has a thickness less than 90 nm.
Muir teaches the device wherein the gate electrode has a thickness less than 90 nm (the amorphous metal gate electrode 1804 is 60 nm thick, p. 34, lines 28-29).
It would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to employ and modify the teachings of Muir to obtain and achieve the device wherein the gate electrode has a thickness less than 90 nm as claimed, because it has been held that where the criticality of the claimed range is not shown and the general conditions of a claim are disclosed in the prior art, discovering the optimum or workable ranges involves only routine skill in the art. MPEP §2144.05.
Regarding claim 11, Yagyu in view of Muir teaches the device of claim 10, Yagyu does not teach the device wherein the gate electrode has a thickness less than 25 nm and the gate insulator has a thickness less than 15 nm.
Muir teaches the device wherein the gate electrode has a thickness less than 25 nm (the amorphous metallic films having a thickness in a range of about 10-200 nm is formed into the gate electrode, p. 1, lines 22-24) and the gate insulator has a thickness less than 15 nm (the gate insulator has a thickness of no more than 10 nm, p. 12, lines 17-19).
It would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to employ and modify the teachings of Muir to obtain and achieve the device wherein the gate electrode has a thickness less than 25 nm and the gate insulator has a thickness less than 15 nm as claimed, because it has been held that where the criticality of the claimed range is not shown and the general conditions of a claim are disclosed in the prior art, discovering the optimum or workable ranges involves only routine skill in the art. MPEP §2144.05.
Regarding claim 14, Yagyu in view of Muir teaches the device of claim 1, Yagyu does not teach the device wherein the gate insulator includes aluminum oxide (Al2O3).
Muir teaches the device wherein the gate insulator includes Al2O3 (the gate insulator is Al2O3, p. 12, lines 12-13).
It would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to employ and modify the teachings of Muir to obtain and achieve the device wherein the gate electrode has a thickness less than 25 nm and the gate insulator has a thickness less than 15 nm as claimed, because Al2O3 is a well-known material and widely used as a suitable metal-oxide gate insulator that is formed in a very thin layer, thereby providing the desired electrical insulation while enabling the intended operation of the transistor (p. 12, lines 11-19). Further, it has been held to be within the general skill of a worker in the art to select a known material on the basis of its suitability for the intended used a matter of obvious design choice. In re Leshin, 277 F.2d 197, 125 USPQ 416 (CCPA 1960)
Regarding claim 16, Yagyu in view of Muir teaches the device of claim 1, wherein the semiconductor material (Yagyu: 30, FIG. 11) includes a channel region (the portion of 30 located between 25 and 26 and adjacent to 24, [0027]; hereinafter ‘CH’), wherein the gate insulator (24) is positioned between the channel region (CH) and the gate electrode (23).
Regarding claim 22, Yagyu in view of Muir teaches the device of claim 16, further comprising:
a source electrode (Yagyu: 25, FIG. 11, [0027]) in contact with the semiconductor material (30); and
a drain electrode (26) in contact with the semiconductor material (30).
Regarding claim 24, Yagyu in view of Muir teaches the device of claim 22, wherein the source (Yagyu: 25, FIG. 11) and drain electrodes (26) are positioned below the semiconductor material (30).
Claim 17 is rejected under 35 U.S.C. 103 as being unpatentable over Yagyu (JP 2007115944) in view of Muir (WO 2019/191674), further in view of Nakamura (US 2007/0034860).
Regarding claim 17, Yagyu in view of Muir teaches the device of claim 16, but does not teach the device wherein the channel region has a thickness less than 50 nm.
Nakamura teaches a device [0002] wherein the channel region has a thickness less than 50 nm (the thickness of channel region is less than 50 nm, [0017]).
As taught by Nakamura, one of ordinary skill in the art would utilize and modify the above teaching into Yagyu in view of Muir to obtain and achieve the device wherein the channel region has a thickness less than 50 nm as claimed, because it has been held that where the criticality of the claimed range is not shown and the general conditions of a claim are disclosed in the prior art, discovering the optimum or workable ranges involves only routine skill in the art. MPEP §2144.05.
Thus, it would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to employ the teaching as taught by Nakamura in combination with Yagyu in view of Muir due to the above reason.
Claims 19 and 21 are rejected under 35 U.S.C. 103 as being unpatentable over Yagyu (JP 2007115944) in view of Muir (WO 2019/191674), further in view of Li et al. (US 2019/0013339; hereinafter ‘Li’).
Regarding claim 19, Yagyu in view of Muir teaches the device of claim 1, but does not teach the device wherein the semiconductor material includes indium gallium zinc oxide (IGZO).
Li teaches the device wherein the semiconductor material includes IGZO (a semiconductor material having IGZO, [0061]).
As taught by Li, one of ordinary skill in the art would utilize and modify the above teaching into Yagyu in view of Muir to obtain and achieve the device wherein the semiconductor material includes IGZO as claimed, because IGZO is a well-known material and widely used as a semiconductor material in the art. Further, it has been held to be within the general skill of a worker in the art to select a known material on the basis of its suitability for the intended used a matter of obvious design choice. In re Leshin, 277 F.2d 197, 125 USPQ 416 (CCPA 1960).
Thus, it would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to employ the teaching as taught by Li in combination with Yagyu in view of Muir due to the above reason.
Regarding claim 21, Yagyu in view of Muir teaches the device of claim 16, but does not teach the device wherein the semiconductor material includes amorphous silicon.
Li teaches the device wherein the semiconductor material includes amorphous silicon (a semiconductor material having amorphous silicon, [0061]).
As taught by Li, one of ordinary skill in the art would utilize and modify the above teaching into Yagyu in view of Muir to obtain and achieve the device wherein the semiconductor material includes amorphous silicon as claimed, because amorphous silicon is a well-known material and widely used as a semiconductor material in the art. Further, it has been held to be within the general skill of a worker in the art to select a known material on the basis of its suitability for the intended used a matter of obvious design choice. In re Leshin, 277 F.2d 197, 125 USPQ 416 (CCPA 1960).
Thus, it would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to employ the teaching as taught by Li in combination with Yagyu in view of Muir due to the above reason.
Claims 23 and 41-42 are rejected under 35 U.S.C. 103 as being unpatentable over Yagyu (JP 2007115944) in view of Muir (WO 2019/191674), further in view of Imai (US 2009/0127551).
Regarding claim 23, Yagyu in view of Muir teaches the device of claim 22, but does not teach the device wherein the source and drain electrodes are positioned above the semiconductor material.
Imai teaches a device (Fig. 2, [0092]) wherein the source (5-1) and drain electrodes (5-2) are positioned above the semiconductor material (42, [0047]).
As taught by Imai, one of ordinary skill in the art would utilize and modify the above teaching into Yagyu in view of Muir to obtain and achieve the device wherein the source and drain electrodes are positioned above the semiconductor material as claimed, because it prevents damage to the ultra-thin semiconductor layer during source/drain deposition and patterning, thereby preserving interface quality, carrier transport, and device stability [0095].
Thus, it would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to employ the teaching as taught by Imai in combination with Yagyu in view of Muir due to the above reason.
Regarding claim 41, Yagyu in view of Muir teaches the device of claim 1, but does not teach the device wherein the thickness of the semiconductor material is less than 50 nm.
Imai teaches the device wherein the thickness of the semiconductor material is less than 50 nm (the thickness of the semiconductor material is 0.5-20 nm, [0061]).
As taught by Imai, one of ordinary skill in the art would utilize and modify the above teaching into Yagyu in view of Muir to obtain and achieve the device wherein the channel region has a thickness less than 50 nm as claimed, because it has been held that where the criticality of the claimed range is not shown and the general conditions of a claim are disclosed in the prior art, discovering the optimum or workable ranges involves only routine skill in the art. MPEP §2144.05.
Thus, it would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to employ the teaching as taught by Imai in combination with Yagyu in view of Muir due to the above reason.
Regarding claim 42, Yagyu in view of Muir teaches the device of claim 1, but does not teach the device wherein the gate insulator has a thickness less than 75 nm.
Imai teaches the device wherein the gate insulator has a thickness less than 75 nm (the thickness of gate insulator is 50-1000 nm, [0074]).
As taught by Imai, one of ordinary skill in the art would utilize and modify the above teaching into Yagyu in view of Muir to obtain and achieve the device wherein the gate insulator has a thickness less than 75 nm as claimed, because it has been held that where the criticality of the claimed range is not shown and the general conditions of a claim are disclosed in the prior art, discovering the optimum or workable ranges involves only routine skill in the art. MPEP §2144.05.
Thus, it would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to employ the teaching as taught by Imai in combination with Yagyu in view of Muir due to the above reason.
Response to Arguments
Applicant's arguments with respect to claims have been considered but are moot in view of the new ground of rejection. Response to arguments on newly added limitations are responded to in the above rejection.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any extension fee pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to JIYOUNG OH whose telephone number is (703)756-5687. The examiner can normally be reached Monday-Friday, 9AM-5PM EST.
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/JIYOUNG OH/Examiner, Art Unit 2818
/DUY T NGUYEN/Primary Examiner, Art Unit 2818 8/20/26
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