Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Amendment
This Office Action is in response to Applicant’s Preliminary Amendment filed December 1, 2025. Claims 9, 11-15, 17, and 18 are amended. Claims 10 and 16 is cancelled. Claims 19-30 are newly added. The Examiner notes that claims 9, 11-15, and 17-30 are examined.
Priority
Acknowledgment is made of applicant’s claim for foreign priority under 35 U.S.C. 119 (a)-(d). The certified copy has been filed in parent Application No. CN202110278395.1, filed on March 16, 2021.
Drawings
The drawings were received on December 1, 2025. These drawings are acceptable.
Claim Objections
Claims 9-14 and 19-24 are objected to because of the following informalities:
In claim 9, lines 7-8, “adjacent minimum standard cells” should read “adjacent cells”
Appropriate correction is required.
Dependent claims 10-14 and 19-24 are objected to at least on the same basis as the claims from which they depend.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 9-14 and 19-24 are rejected under 35 U.S.C. 103 as being unpatentable over Pourkeramati (US 2003/0219913 A1) in view of Ken (US 2016/0043065 A1), Naniwa (US 2020/0228151 A1), and Gu (US 2022/0149793 A1).
With respect to claim 9, Pourkeramati teaches in Fig. 6:
providing a wafer (para. 13, “a wafer has a plurality of dies separated by scribe line areas”),
wherein the wafer comprises K first cells (dies 602) with a same first function (“a plurality of dies each having a circuit and a plurality of contact pads”)
a scribing channel (para. 35 “scribe line areas”) is disposed between each two adjacent cells among the K first cells with the same first function, and pads with a same position in the respective cell and wiring configuration in the respective cell are electrically connected through the scribing channel by metal wiring for an integrated circuit process, (pads 608, 610, 612, and 628 which are connected across the scribing channel to pads with a same function by lines 620, 622, 624, and 626),
cutting the wafer to obtain a first die (para. 29 refers to a sawing process),
wherein the first die comprises the K first minimum standard cells with the same first function (602)
and K is an integer greater than or equal to 1 (Fig. 6 shows at least 4 dies);
and cutting the wafer to obtain a second die (the sawing process separates the wafer into multiple good dies),
Pourkeramati fails to teach:
and L second cells with a same second function,
and a scribing channel is disposed between each two adjacent cells among the L second cells with the same second function
wherein the second die comprises the L second minimum standard cells with the same second function, L is an integer greater than or equal to 1, and L and K are not equal;
and the K first minimum standard cells and the L second minimum standard cells are minimum repetitive functional cells in a plurality of receiving modules with same functional cells;
and wherein the K first minimum standard cells comprise any one of:
a filter cell, an amplifier cell, or a switch cell,
the amplifier cell is the broadband low noise amplifiers,
and the broadband low noise amplifiers support operating frequency ranges of N77 band low noise amplifiers and N79 band low noise amplifiers;
and wherein the L second minimum standard cells comprise any one of:
the filter cell, the amplifier cell, or the switch cell,
the amplifier cell comprises the broadband low noise amplifiers, and the broadband low noise amplifiers support operating frequency ranges of N77 band low noise amplifiers and N79 band low noise amplifiers.
Ken teaches:
and L second cells with a same second function (Ken teaches in para. 25 that multiple IC designs are formed and diced on the same wafer),
and a scribing channel is disposed between each two adjacent cells among the L second cells with the same second function (para. 25 “To overcome the limits, after fabricating the finished MP wafer including multiple chips with different chip size, such as IC design A, IC design B and IC design C, etc. associated with the MP chip 101, it can be dicing out of the MP wafer 100 or any semiconductor wafer including plurality sizes of IC chips by a improved scribe-line dicing method”)
wherein the second die comprises the L second minimum standard cells with the same second function, L is an integer greater than or equal to 1, and L and K are not equal (although Ken does not explicitly list the numbers of cells, Ken teaches that the zones may have regular or irregular shapes including checkboard or fan shapes and it would be obvious to include zones with different numbers of cells in order to meet manufacturing needs);
Pourkeramati discloses the claimed invention except for the wafer having multiple different kinds of cells on the same wafer. Ken teaches that it is known to grow multiple different IC designs in different regions of the wafer before dicing. It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to make different kinds of cell on the same wafer as taught by Ken for the purpose of improving manufacturing cost and efficiency (para. 24) See MPEP 2144.
Naniwa teaches in Fig. 2
forming a receiving module using the first die and the second die (Fig. 1);
and wherein the K first cells (one of first switching unit 11, filtering unit 13, third switching unit 13, amplifier unit 16, or second switching unit 17) comprise any one of:
a filter cell (13), an amplifier cell (16), or a switch cell (17 or 11),
the amplifier cell comprises the broadband low noise amplifiers (para 142 “if two or more low-noise amplifiers (LNAs) are operating simultaneously, the above-mentioned configuration helps prevent a radio-frequency signal in one band from leaking into a circuit in another band”),
and wherein the L second minimum standard cells (another of first switching unit 11, filtering unit 13, third switching unit 14, amplifier unit 16, or second switching unit 17) comprise any one of:
the filter cell (13), the amplifier cell (16), or the switch cell (11, 14, or 17,
the amplifier cell comprises the broadband low noise amplifiers (para 142 “if two or more low-noise amplifiers (LNAs) are operating simultaneously, the above-mentioned configuration helps prevent a radio-frequency signal in one band from leaking into a circuit in another band
It would have been obvious to one of ordinary skill in the art at the time of the invention to use the method of Pourkeramati/Ken of forming an integrated circuit structure from minimum functional cells to make the device of Naniwa that includes the amplifier cell, switch cell, and filter cells. The claim would have been obvious because using the method of Pourkeramati/Ken to make other known integrated circuits was part of the ordinary capabilities of a person of ordinary skill in the art, in view of the teaching of the technique for improvement as taught by Naniwa. See KSR International Co. v. Teleflex Inc., 82 USPQ2d 1385 (2007).
Pourkeramati/Ken/Naniwa do not specify the frequency ranges for the amplifier unit. Gu teaches:
the amplifier cell is the broadband low noise amplifiers, and the broadband low noise amplifiers support operating frequency ranges of N77 band low noise amplifiers and N79 band low noise amplifiers (n77 (3300 MHz to 4200 MHz) of 5G-NR may be applied as communication band B1, and at least one of B42 (3400 MHz to 3600 MHz), B43 (3600 MHz to 3800 MHz), B48 (3550 MHz to 3700 MHz), or B49 (3550 MHz to 3700 MHz) of 4G-LTE may be applied as communication band B2.)
The combination of Naniwa and Gu further teaches:
wherein the receiving modules is a dual-frequency two-way receiving modules that comprise two input switches (first switching unit 11, which contains at least two switches in Fig. 1 of Naniwa), two N77 filters (two of 13a-13g of Naniwa modified to be the N77 filters of Gu), two N79 filters (two others of 13a-13g of Naniwa modified to be the N79 filters of Gu), two N77 low noise amplifiers (two of 16a-16d of Naniwa modified to be N77 LNA as taught by Gu), two N79 low noise amplifiers (other two of 16a-16d of Naniwa modified to be N79 LNA as taught by Gu), and two output switches (two switches of second switching unit 17) (see Fig. 1), the N77 low noise amplifiers and the N79 low noise amplifiers are the broadband low noise amplifiers (para. 2, “5G mobile technology” of Gu),
the input switches and the output switches are the switch cell, and the two input switches (two input switches cut together in 11) and the two output switches are cut together from a same wafer as a single die(two output switches are cut together in 17);
the N77 filters are the filter cell, and the two N77 filters are cut together from a same wafer as a single die (filters cut together in 13);
In the event that it cannot be considered that the two input switches are cut together on a single die, the two output switches are cut together on a single die, or the filters are cut together on a single die, which the Examiner does not concede, it would be obvious to form the switch cells and filter cells as single dies since it has been held that forming in one piece an article which has formerly been formed in two pieces and put together involves only routine skill in the art. In re Larson, 144 USPQ 347, 349 (CCPA 1965). See MPEP 2144.04.
Pourkeramati/Ken/Naniwa/Gu renders obvious:
and the four broadband low noise amplifiers are cut together;
and each N79 filter is another filter cell, and the two N79 filters are cut together.
The prior art differs from the claim in that the N79 filters are in the same cell (amplifier unit 16 of Naniwa modified by Gu to include N77 and N79 filters.) It would have been obvious to one having ordinary skill in the art before the effective filing date to separate the N77 and N79 filters into different cells for the purpose of optimizing the layout and groupings of the components to the needs of the device manufacturing.
It would have been obvious to one of ordinary skill in the art at the time of the invention to use the n77 and n79 band taught by Gu with the device of Pourkeramati /Ken/Naniwa. The claim would have been obvious because the technique of using n77 and n79 frequency bands in telecommunications applications was part of the ordinary capabilities of a person of ordinary skill in the art, in view of the teaching of the technique for improvement as taught by Gu. See KSR International Co. v. Teleflex Inc., 82 USPQ2d 1385 (2007).
In the event that the
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With respect to claim 11, Gu further teaches:
wherein the N77 band low noise amplifiers have an operating frequency range of 3.3~4.2 GHz,
The Examiner notes that N77 and N79 bands are defined to be the claimed ranges and that the claimed ranges and are inherent to any recitation of N77 or N79 bands.
It would have been obvious to one having ordinary skill in the effective filing date of the claimed invention to combine Pourkeramati in view of Ken, Naniwa and Gu as explained above.
With respect to claim 12, Gu further teaches:
and the N79 band low noise amplifiers have an operating frequency range of 4.4~5.0 GHz. (n77 3300-4200 MHz, n78 3300-3800 MHz, and n79 4400-5000 MHz)
The Examiner notes that N77 and N79 bands are defined to be the claimed ranges and that the claimed ranges and are inherent to any recitation of N77 or N79 bands.
It would have been obvious to one having ordinary skill in the effective filing date of the claimed invention to combine Pourkeramati in view of Ken, Naniwa and Gu as explained above.
With respect to claim 13, Naniwa further teaches: wherein the first function is the same as the second function (choosing switching units 11 and 17 as the two minimum standard cells gives the same function of switching).
It would have been obvious to one having ordinary skill in the effective filing date of the claimed invention to combine Pourkeramati in view of Ken, Naniwa and Gu as explained above.
With respect to claim 14, Naniwa further teaches:
wherein the first function is different than the second function (choosing first switching unit 11 as the first minimum standard cell and amplifier unit 16 as the second minimum standard cell gives different functions of switching and amplifying).
It would have been obvious to one having ordinary skill in the effective filing date of the claimed invention to combine Ken/Padmanabhan in view of Naniwa as explained above.
With respect to claim 19, Pourkeramati further teaches:
wherein in the four broadband low noise amplifiers (dies 602 modified by Naniwa and Gu to comprise broadband low noise amplifiers), each broadband low noise amplifier comprises a first power pad (pad 608 configured to receive Vcc), a second power pad (pad 610 configured to receive Vss), a clock pad (clock pad 628), and a data pad (pad 612 configured to receive a signal for activating PSTE).
With respect to claim 20, Pourkeramati further teaches:
wherein the first power pad (608) of each broadband low noise amplifier of the four broadband low noise amplifiers (602 modified by Naniwa/Gu) is connected to the first power pad of two other broadband low noise amplifiers of the four broadband low noise amplifiers (power pads are connected through lines 620 for parallel activation).
With respect to claim 21, Pourkeramati further teaches:
wherein the second power pad (610) of each broadband low noise amplifier of the four broadband low noise amplifiers (602 modified by Naniwa/Gu) is connected to the second power pad of two other broadband low noise amplifiers of the four broadband low noise amplifiers (power pads are connected through lines 622 for parallel activation).
With respect to claim 22, Pourkeramati further teaches:
wherein the clock pad (628) of each broadband low noise amplifier of the four broadband low noise amplifiers (602 modified by Naniwa/Gu) is connected to clock pad of two other broadband low noise amplifiers of the four broadband low noise amplifiers (clock pads are connected through lines 626 for parallel activation).
With respect to claim 23, Pourkeramati further teaches:
wherein the data pad (612) of each broadband low noise amplifier of the four broadband low noise amplifiers (602 modified by Naniwa/Gu) is connected to data pad of two other broadband low noise amplifiers of the four broadband low noise amplifiers (data pads are connected through lines 624 for parallel activation).
With respect to claim 24, Pourkeramati renders obvious:
wherein in the receiving module, one of the four broadband low noise amplifiers is wired to a substrate, and only the one of the four broadband low noise amplifiers is wired to the substrate (para. 39 teaches that because of the parallel wiring it is only necessary for each metal layer to include one probe pin for the entire wafer.)
It would be obvious to wire only one wafer to the substrate for testing because the parallel wiring taught by Pourkeramati has a benefit of allowing many dies to be simultaneously activated with fewer probe pins.
Claims 15-18 and 25-30 are rejected under 35 U.S.C. 103 as being unpatentable over Naniwa (US 2020/0228151 A1) in view of Gu (US 2022/0149793 A1), Ken (US 2016/0043065 A1), and Pourkeramati (US 2003/0219913 A1).
With respect to claim 15, Naniwa teaches:
A method for making M modules (the different modifications of embodiment 1 seen in Figs. 3A, 3B, 3C, and 3D),
wherein the M modules comprise different dies (switching IC 10, filter units 13a and 13b, inductors 12a-12g, inductors 15, amplifier unit 16) and are configured to implement radio frequency transmitting or receiving functions in different mobile systems,
and the method comprises:
dividing the M modules by functions (modules all contain some combination of switches, filters, amplifiers, etc.),
wherein different functions are implemented by different dies (amplifier units 16, switching units 11 and 17, filters 13 are all implemented on different dies, with 16, 11 and 17 all being integrated onto 10),
each die comprises one or more cells with a same function (filter dies include filters, switching units 11 and 17, amplifiers 16, see Fig. 8B),
and M is greater than 1 (the four modifications seen in Fig. 3A-3B includes repeated elements to make different modules);
wherein each of the M modules comprises different dies (different dies include the filter units, inductors, amplifier unit, and switching unit);
wherein the G dies are used to implement G functions respectively, and G is greater than 1 (amplifiers, switches, filters with different functions are implemented in dies);
and combining and using a plurality of dies of the G dies to make the M modules respectively (each modification of embodiment 1 includes the same dies in different implementations);
and the cells comprise any one of: a filter cell (13), an amplifier cell (16), or a switch cell (11 or 17), the amplifier cell comprises broadband low noise amplifiers (para. 142 refers to amplifier circuits as comprising low noise amplifiers),
Naniwa fails to teach:
cutting G wafers to obtain G dies,
wherein: among the cells with the same function,
in each of the G dies, among the cells with the same function in a respective die, pads with the same position and wiring configuration are respectively connected to each other in the respective die by metal wiring for an integrated circuit process;
a scribing channel is disposed between two adjacent minimum standard cells, and pads with the same function of the adjacent minimum standard cells are electrically connected respectively through the scribing channel;
and the broadband low noise amplifiers support operating frequency ranges of N77 band low noise amplifiers and N79 band low noise amplifiers.
wherein the M modules are dual-frequency two-way receiving modules,
each dual- frequency two-way receiving module comprises two input switches, two N77 filters, two N7Q filters, two N77 low noise amplifiers, two N79 low noise amplifiers, and two output switches, the N77 low noise amplifiers and the N79 low noise amplifiers are four broadband low noise amplifiers,
and the four broadband low noise amplifiers of each dual-frequency two-way receiving module are cut together from a same wafer into a single die;
the input switches and the output switches are the switch cell, and the two input switches and the two output switches of each dual-frequency two-way receiving module are cut together from a same wafer into a single die;
the N77 filters are the filter cell, and the two N77 filters of each dual-frequency two-way receiving module are cut together from a same wafer into a single die;
and each N79 filter is another filter cell, and the two N79 filters of each dual-frequency two- way receiving module are cut together from a same wafer into a single die.
Gu teaches:
and the broadband low noise amplifiers support operating frequency ranges of N77 band low noise amplifiers and N79 band low noise amplifiers (n77 (3300 MHz to 4200 MHz) of 5G-NR may be applied as communication band B1, and at least one of B42 (3400 MHz to 3600 MHz), B43 (3600 MHz to 3800 MHz), B48 (3550 MHz to 3700 MHz), or B49 (3550 MHz to 3700 MHz) of 4G-LTE may be applied as communication band B2.)
It would have been obvious to one of ordinary skill in the art at the time of the invention to use the n77 and n79 band taught by Gu with the device of Naniwa. The claim would have been obvious because the technique of using n77 and n79 frequency bands in telecommunications applications was part of the ordinary capabilities of a person of ordinary skill in the art, in view of the teaching of the technique for improvement as taught by Gu. See KSR International Co. v. Teleflex Inc., 82 USPQ2d 1385 (2007
The combination of Naniwa and Gu further teaches:
wherein the receiving modules is a dual-frequency two-way receiving modules that comprise two input switches (first switching unit 11, which contains at least two switches in Fig. 1 of Naniwa), two N77 filters (two of 13a-13g of Naniwa modified to be the N77 filters of Gu), two N79 filters (two others of 13a-13g of Naniwa modified to be the N79 filters of Gu), two N77 low noise amplifiers (two of 16a-16d of Naniwa modified to be N77 LNA as taught by Gu), two N79 low noise amplifiers (other two of 16a-16d of Naniwa modified to be N79 LNA as taught by Gu), and two output switches (two switches of second switching unit 17) (see Fig. 1), the N77 low noise amplifiers and the N79 low noise amplifiers are the broadband low noise amplifiers (para. 2, “5G mobile technology” of Gu),
the input switches and the output switches are the switch cell, and the two input switches (two input switches cut together in 11) and the two output switches are cut together from a same wafer as a single die(two output switches are cut together in 17);
the N77 filters are the filter cell, and the two N77 filters are cut together from a same wafer as a single die (filters cut together in 13);
In the event that it cannot be considered that the two input switches are cut together on a single die, the two output switches are cut together on a single die, or the filters are cut together on a single die, which the Examiner does not concede, it would be obvious to form the switch cells and filter cells as single dies since it has been held that forming in one piece an article which has formerly been formed in two pieces and put together involves only routine skill in the art. In re Larson, 144 USPQ 347, 349 (CCPA 1965). See MPEP 2144.04.
Ken teaches:
cutting G wafers to obtain G dies (“each chips of IC design A, IC design B and IC design C can be dicing or broken out of the finished and diced MP wafer 100 individually”),
It would have been obvious to one of ordinary skill in the art at the time of the invention to modify the method of Naniwa/Gu with the method of Ken to obtain the dies by cutting them from wafers. The claim would have been obvious because the technique of obtaining dies by growing multiple dies on a wafer and dicing it was part of the ordinary capabilities of a person of ordinary skill in the art, in view of the teaching of the technique for improvement as taught by Ken. See KSR International Co. v. Teleflex Inc., 82 USPQ2d 1385 (2007).
Pourkeramati teaches:
wherein: among the cells (dies 602) with the same function,
in each of the G dies, among the cells with the same function in a respective die, pads with the same position and wiring configuration are respectively connected to each other in the respective die by metal wiring for an integrated circuit process (pads 608, 610, 612, and 628 are connected to each other through lines 620, 622, 624, and 626);
a scribing channel (para. 35 “scribe line areas) is disposed between two adjacent minimum standard cells (602), and pads with the same function (608, 610, 612, and 628) of the adjacent cells are electrically connected respectively through the scribing channel (connected by lines 620, 622, 624, and 626 across scribe line area);
Naniwa/Gu/Ken discloses the claimed invention except for the pads connected across scribe lines. Pourkeramati teaches that it is known to connect pads between cells across scribe lines. It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to modify Naniwa/Gu/Ken as taught by Pourkeramati, since Pourkeramati states in para. 35 that this would allow lines to activate multiple dies in parallel. See MPEP 2144.
With respect to claim 17, Gu further teaches:
wherein the N77 band low noise amplifiers have an operating frequency range of 3.3~4.2 GHz, (n77 3300-4200 MHz, n78 3300-3800 MHz, and n79 4400-5000 MHz)
The Examiner notes that N77 and N79 bands are defined to be the claimed ranges and that the claimed ranges and are inherent to any recitation of N77 or N79 bands.
It would have been obvious to one having ordinary skill in the effective filing date of the claimed invention to combine Naniwa in view of Gu, Ken, and Pourkeramati as explained above.
With respect to claim 18, Gu further teaches:
and the N79 band low noise amplifiers have an operating frequency range of 4.4~5.0 GHz. (n77 3300-4200 MHz, n78 3300-3800 MHz, and n79 4400-5000 MHz)
The Examiner notes that N77 and N79 bands are defined to be the claimed ranges and that the claimed ranges and are inherent to any recitation of N77 or N79 bands.
It would have been obvious to one having ordinary skill in the effective filing date of the claimed invention to combine Naniwa in view of Gu, Ken, and Pourkeramati as explained above.
With respect to claim 25, Pourkeramati further teaches:
wherein in the four broadband low noise amplifiers (dies 602 modified by Naniwa and Gu to comprise broadband low noise amplifiers), each broadband low noise amplifier comprises a first power pad (pad 608 configured to receive Vcc), a second power pad (pad 610 configured to receive Vss), a clock pad (clock pad 628), and a data pad (pad 612 configured to receive a signal for activating PSTE).
It would have been obvious to one having ordinary skill in the effective filing date of the claimed invention to combine Naniwa in view of Gu, Ken, and Pourkeramati as explained above.
With respect to claim 26, Pourkeramati further teaches:
wherein the first power pad (608) of each broadband low noise amplifier of the four broadband low noise amplifiers (602 modified by Naniwa/Gu) is connected to the first power pad of two other broadband low noise amplifiers of the four broadband low noise amplifiers (power pads are connected through lines 620 for parallel activation).
It would have been obvious to one having ordinary skill in the effective filing date of the claimed invention to combine Naniwa in view of Gu, Ken, and Pourkeramati as explained above.
With respect to claim 27, Pourkeramati further teaches:
wherein the second power pad (610) of each broadband low noise amplifier of the four broadband low noise amplifiers (602 modified by Naniwa/Gu) is connected to the second power pad of two other broadband low noise amplifiers of the four broadband low noise amplifiers (power pads are connected through lines 622 for parallel activation).
It would have been obvious to one having ordinary skill in the effective filing date of the claimed invention to combine Naniwa in view of Gu, Ken, and Pourkeramati as explained above.
With respect to claim 28, Pourkeramati further teaches:
wherein the clock pad (628) of each broadband low noise amplifier of the four broadband low noise amplifiers (602 modified by Naniwa/Gu) is connected to clock pad of two other broadband low noise amplifiers of the four broadband low noise amplifiers (clock pads are connected through lines 626 for parallel activation).
It would have been obvious to one having ordinary skill in the effective filing date of the claimed invention to combine Naniwa in view of Gu, Ken, and Pourkeramati as explained above.
With respect to claim 29, Pourkeramati further teaches:
wherein the data pad (612) of each broadband low noise amplifier of the four broadband low noise amplifiers (602 modified by Naniwa/Gu) is connected to data pad of two other broadband low noise amplifiers of the four broadband low noise amplifiers (data pads are connected through lines 624 for parallel activation).
It would have been obvious to one having ordinary skill in the effective filing date of the claimed invention to combine Naniwa in view of Gu, Ken, and Pourkeramati as explained above.
With respect to claim 30, Pourkeramati renders obvious:
wherein in the receiving module, one of the four broadband low noise amplifiers is wired to a substrate, and only the one of the four broadband low noise amplifiers is wired to the substrate (para. 39 teaches that because of the parallel wiring it is only necessary for each metal layer to include one probe pin for the entire wafer.)
It would be obvious to wire only one wafer to the substrate for testing because the parallel wiring taught by Pourkeramati has a benefit of allowing many dies to be simultaneously activated with fewer probe pins.
Response to Arguments
Applicant’s arguments, see page 8, filed December 1, 2025, with respect to drawing objections, objection to the specification, and 112 rejection have been fully considered and are persuasive. The objections to the drawing and specification and 112 rejections have been withdrawn.
Applicant argues that Naniwa is silent to whether the components are cut together from a same wafer as a single die. The Examiner notes that Fig. 1 of Naniwa shows that four amplifiers are implemented together as amplifier unit 16 with regions A, B, and C that include amplifier circuits 16a, 16b, and 16c. The Examiner interprets Figs. 2A, 5-8, and para. 71 to teach that the amplifier units are implemented in a single die, switching IC 10. The Examiner also stated above that in the event that the amplifiers are not cut together in the same die, it would be an obvious design choice since it has been held that forming in one piece an article which has formerly been formed in two pieces and put together involves only routine skill in the art. In re Larson, 144 USPQ 347, 349 (CCPA 1965). See MPEP 2144.04.
Applicant’s arguments with respect to other limitations of independent claims 9 and 15 and their dependents have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
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/A.M.W./Examiner, Art Unit 2897
/JACOB Y CHOI/Supervisory Patent Examiner, Art Unit 2897