DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Continued Examination Under 37 CFR 1.114
A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on December 1, 2025 has been entered.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claim 8 is rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claim 8 recites the limitation "the collection chip" in line 2. There is insufficient antecedent basis for this limitation in the claim.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
6. Claims 1 and 5-8 are rejected under 35 U.S.C. 103 as being unpatentable over Stewart et al. (7,680,160)-previously cited in view of Barlow et al. (12,267,110)-previously cited.
As for claim 1, Stewart in a control circuit for optoelectronic module with integrated temperature control discloses/suggests the following: a demodulation module (Fig. 2: 100 with col. 5, lines 25-30 which demonstrates modulation of optical output by laser of the TOSA and suggests demodulation of the optical input of the ROSA); a package housing (Fig. 2: 30), provided with a first side surface (Fig. 2: 30 having a right side surface) and a second side surface arranged oppositely to each other (Fig. 2: 30 having a left side surface), wherein the first side surface is provided with a first fiber optic interface and a second fiber optic interface (Fig. 2: 30 with a first fiber optic interface to the right of 102 (ROSA) and a second fiber optic interface to the right of 106 (TOSA); col. 4, lines 34-36 and col. 5, lines 1-4), and the second side surface is provided with an electrical interface (Fig. 2: 30 having a left side surface with 19, 20, 17, 202, 21, 14, 13, 12, 18; noting 202 with 200; Fig. 4: 200 and 202; noting that 202 can be other serial interfaces such as a multiple-pin interface as well as can operate in accordance with two wire serial interface standard that is used in GBIC and SFP standards by referring to col. 7, line 60 to col. 8, line 7); a functional circuit, disposed inside the package housing and closer to the second side surface than to the first side surface (Fig. 2: 200 closer to the left side surface of 30 than the right side surface of 30), wherein the functional circuit is connected to the electrical interface (Fig. 2: 200 with arrows showing connectivity to 202, 21, 14, 13; and Fig. 4: as well note that 200 comprises: 210, 208 and 206); an optical receiving assembly, provided inside the package housing and closer to the first side surface than to the second side surface (Fig. 2: 104 and 102 in 30 and closer to the right side surface, the first side surface), wherein the optical receiving assembly is connected to the first optical fiber interface and the functional circuit (Fig. 2: 102 and 104, noting 102 connected to the first optical fiber interface to its right; arrows from 102 to 104 to 200 demonstrate connectivity to the functional circuit; col. 4, lines 34-44), and configured to receive an optical signal input at the first fiber optic interface, convert the optical signal into an electrical signal and send the electrical signal to the functional circuit (col. 4, lines 34-44; Fig. 2: 102 and 104 with arrows from 102 to 104 to 200 demonstrating connectivity to the functional circuit as well as suggesting conversion of the optical signal to an electrical signal); and an optical transmitting assembly, provided inside the package housing and closer to the first side surface than to the second side surface (Fig. 2: 108 and 106 as the optical transmitting assembly or 108, 106, and 116 as the optical transmitting assembly; wherein, 108, 106, and 116 are in 30 and closer to the right side surface, the first side surface); wherein the optical transmitting assembly is connected to the second optical fiber interface and the functional circuit (Fig. 2: 108 and 106, noting 106 connected to the second optical fiber interface to its right, arrows from 106 to 200 and to and from 108 to 200 demonstrate connectivity to the functional circuit; col. 5, lines 1-28; Fig. 2: if 116 is included with 108 and 106 as the optical transmitting assembly note arrow from 200 to 116 demonstrating connectivity to the functional circuit), and configured to receive an electrical signal input from the functional circuit, convert the electrical signal into an optical signal and send the optical signal to the second fiber optic interface (Fig. 2: 108 and 106, noting 106 connected to the second optical fiber interface to its right, arrows from 106 to 200 and to and from 108 to 200 demonstrate connectivity to the functional circuit and suggest conversion of an electrical signal to an optical signal; col. 5, lines 1-28; abstract; Fig. 3: zigzag arrow to the right of 112 demonstrates production of an optical signal; col. 6, line 54-col. 7, line 13), wherein the optical receiving assembly is spaced apart from the optical transmitting assembly along a direction from the first fiber optic interface toward the second fiber optic interface (102 and 104 are spaced apart from 106 and 108 respectively when just 106 and 108 are treated as the optical receiving assembly; with 106, 108, and 116 as the optical receiving assembly then 102 and 104 are spaced apart from the top surface of 116), and both the optical receiving assembly and the optical transmitting assembly are spaced apart from the functional circuit along a direction from the first side surface toward the second side surface (Fig. 2: 104 and 108 spaced from the right surface of 200; noting that with Fig. 4: 210, 208, and 206 suggests that 104 and 108 of Fig. 2 would be spaced from 210, 208, and 206 as well); wherein the optical transmitting assembly comprises: a light-emitting element, connected with the second fiber optic interface (Fig. 2: 106 connected to the second fiber optic interface to the right and col. 5, lines 1-5; or Fig. 3: 112 connected to the second fiber optical interface to the right by showing zigzag arrow to the right of 112 demonstrating production of an optical signal with col. 3, lines 16-24); a driving chip, connected with the light-emitting element (with the optical transmitting assembly being construed as just Fig. 2: 106 and 108: Fig. 3: 108 connected to 112; with the optical transmitting assembly being construed as Fig. 2: 106, 108, and 116: 108 connected to 106); and a temperature-control chip, connected with the light-emitting element (with the optical transmitting assembly being construed as just Fig. 2: 106 and 108: Fig. 3: 114 besides 112; with the optical transmitting assembly being construed as Fig. 2: 106, 108, and 116: 116 connected to 106; Fig. 3: 116 connected to 112 of 106 via 114); and the functional circuit comprises: a control chip, connected to the electrical interface, the driving chip, and the temperature-control chip (when treating the micro-processor (Fig. 2: 200) as a single control chip: Fig. 2: 200 connected to 202, 108, and 116; Fig. 3: 200 connected to electrical interface by virtue of 16 SDA and 15 SCL, 108, and 116; and when treating the micro-processor (Fig. 2: 200) as multiple chips see Fig. 4: 200 with 208 as the control chip with 208 connected to the electrical interface via 202 and connected to the driving chip and the temperature-control chip via 210 and 206).
As for the demodulation module being an optical sensing demodulation module, Stewart does not explicitly state this. Stewart does suggest optical sensing by referring to the detection of an optical signal, thereby the optical sensing of an optical signal by the optical transceiver (Fig. 2: 100 with col. 4, lines 41-44 and col. 5, lines 22-30). Nevertheless, Stewart discloses that the optical transceiver can be pluggable (col. 4, lines 57-63; col. 7, line 64 to col. 8, line 2; col. 11, lines 26-28). And Barlow in systems and methods for performing tests and measurements using an optical transceiver teaches an optical sensing system that uses pluggable transceivers to test and measure fiber sensor systems (FIG. 1A: 100A with 105 and 101 with FIG. 2; col. 11, lines 28-38); wherein, Barlow does not appear to limit the type of transceivers that may be used (col. 3, line 40 to col. 4, line 9; col. 9, lines 55-63) and does not appear to limit the types of measurements that may be performed for high resolution optical measuring and having mechanical simplicity and adaptability as well as minimize complexities, reduce costs, and improve measurement efficiencies (col. 11, lines 38-52).
Therefore, it would be obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to at least try to have Stewart’s pluggable demodulation module be a pluggable optical sensing demodulation module in order to be able to test and measure optical fiber sensor systems for high resolution optical measuring having mechanical simplicity and adaptability as well as to minimize complexities, reduce costs, and improve measurement efficiencies by using it as a pluggable optical transceiver that connects a fiber sensor system to a test instrument for testing and measuring.
As for claim 5, Stewart in view of Barlow discloses/suggests everything as above (see claim 1). In addition, Stewart discloses/suggests wherein the light-emitting element is a laser chip or a light-emitting diode (col. 5, lines 1-5; Fig. 3: since 108 and 116 appear to be chips, ICs, 112 being rectangular appears to be a chip as well).
As for claim 6, Stewart in view of Barlow discloses/suggests everything as above (see claim 1). In addition, Stewart discloses/suggests wherein the light-emitting element is a tunable laser chip (col. 5, lines 1-5; Fig. 3: since 108 and 116 appear to be chips, ICs, 112 being rectangular appears to be a chip as well; Fig. 12: 800 with col. 11, lines 3-18, lines 30-39, and lines 52-58; col. 11, line 65 to col. 12, line 20).
As for claim 7, Stewart in view of Barlow discloses/suggests everything as above (see claim 1). In addition, Stewart discloses/suggests wherein the driving chip and the temperature-control chip are integrated (Fig. 2: 108 and 116 are integrated into 100 by being housed in 30; Fig. 3: 108 and 116 appear to be chips, integrated circuits; Fig. 1: 5 demonstrating that prior art optoelectronic transceivers may have temperature compensation integrated with a driving chip: col. 1, lines 55-60).
As for claim 8, Stewart in view of Barlow discloses/suggests everything as above (see claim 1). In addition, Stewart discloses/suggests wherein the control chip and a collection chip are integrated (Fig. 4: treating 208 as the control chip and treating 206, 204, or 202 as the collection chip thereby both the control and collection chips appear to be ICs which are integrated into microprocessor, 200).
As for claim 10, Stewart in view of Barlow discloses/suggests everything as above (see claim 2). In addition, Stewart in view of Barlow suggests the following: an optical-sensing system, wherein the optical-sensing system comprises: an optical sensor; at least one optical-sensing demodulation module according to claim 1; a plurality of fiber optics, connecting the first fiber optic interface, the optical sensor, and the second fiber optic interface (Stewart in view of Barlow) (see claim 1 above: ‘Therefore, it would be obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to at least try to have Stewart’s pluggable demodulation module be a pluggable optical sensing demodulation module in order to be able to test and measure optical fiber sensor systems for high resolution optical measuring having mechanical simplicity and adaptability as well as to minimize complexities, reduce costs, and improve measurement efficiencies by using it as a pluggable optical transceiver that connects a fiber sensor system to a test instrument for testing and measuring.’ As noted in claim 1 above: Barlow demonstrated testing fiber sensor systems with a pluggable optical transceiver: (FIG. 1A: 100A with 105 and 101 with FIG. 2; col. 11, lines 28-38). Therefore, the combination of Stewart and Barlow demonstrates that Stewart’s pluggable optical transceiver, pluggable demodulation module, as 105 of FIG. 1A of Barlow would have at least one fiber optic leading from Stewart’s second fiber optical interface (see Stewart: Fig. 2: 30 with the second fiber optic interface to the right of 106 (TOSA); col. 5, lines 1-4) to a fiber sensor system and at least one other fiber optic leading from the fiber sensor system to Stewart’s first fiber optical interface (see Stewart: Fig. 2: 30 with the first fiber optic interface to the right of 102 (ROSA); col. 4, lines 34-36).
As for an upper computer, connected to the electrical interface, Stewart in view of Barlow do not explicitly state this. Stewart does teach having the optical transceiver connected to a host system computer via communication with the serial interface (col. 6, lines 1-8). Nevertheless, Barlow suggests that the electrical interface of a pluggable optical transceiver is plugged into the test instrument (Barlow: FIG. 1A: see 105 with 101) and demonstrates an upper computer in the test instrument to perform functions of the test instrument and demonstrates that an upper computer could be an external computer connected by ports (Barlow: FIG. 2: 251 (col. 5, lines 24-33), 250 (col. 5, lines 44-65), and 203 (col. 4, line 62 to col. 5, line 5). Therefore, it would be obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have an upper computer, connected to the electrical interface in order to control the measuring and testing of the fiber sensor system remotely via ports in the test instrument or to control functioning of the demodulation module to test and measure the fiber sensor system under investigation.
7. Claim 9 is rejected under 35 U.S.C. 103 as being unpatentable over Stewart et al. (7,680,160)-previously cited in view of Barlow et al. (12,267,110)-previously cited further in view of Edwards et al. (8,380,073)-previously cited.
As for claim 9, Stewart in view of Barlow discloses/suggests everything as above (see claim 1). As for wherein the functional circuit comprises: a power chip, connected to the electrical interface, Stewart in view of Barlow is silent. Nevertheless, Edwards in an optical transceiver implemented with tunable LD appears to teach having a plurality of power chips to control the light source in the TOSA wherein the power chips are part of a mother board that is connected to an electrical interface, a plug (Fig. 2: TOSA with 12 and 12a and Fig. 18: 12A with 12a; col. 13, line 59 to col. 14, line 2). Therefore, it would be obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have the functional circuit comprises: a power chip, connected to the electrical interface in order to provide power to activate the light source of the TOSA within the demodulation module.
Allowable Subject Matter
8. Claims 2-3 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Response to Arguments
9. As for applicant’s remarks filed December 1, 2025 with regards to claim interpretation under 35 USC 112(f) (see Remarks: pages 5-6: RESPONSE TO “CLAIM INTERPRETATION -35 USC 112(f)”), the examiner has found them persuasive regarding light emitting element in claim 1 (previously in claim 4). This limitation is no longer being interpreted as invoking 35 USC 112(f).
Applicant’s arguments filed December 1, 2025 with respect to claims 1, 9, and 10 being rejected under 35 USC 103 (see Remarks page 6) have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument.
Conclusion
10. The prior art made of record and not relied upon is considered pertinent to applicant's disclosure: please refer to the attached PTO-892.
Fax/Telephone Numbers
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Gordon J. Stock, Jr. whose telephone number is (571) 272-2431.
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/GORDON J STOCK JR/
Primary Examiner, Art Unit 2877