Prosecution Insights
Last updated: July 17, 2026
Application No. 18/251,333

IMAGING DEVICE, METHOD OF MANUFACTURING IMAGING DEVICE, AND ELECTRONIC DEVICE

Non-Final OA §102§103
Filed
May 01, 2023
Priority
Nov 09, 2020 — JP 2020-186610 +2 more
Examiner
GRAY, AARON J
Art Unit
2897
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Sony Group Corporation
OA Round
1 (Non-Final)
82%
Grant Probability
Favorable
1-2
OA Rounds
0m
Est. Remaining
99%
With Interview

Examiner Intelligence

Grants 82% — above average
82%
Career Allowance Rate
419 granted / 511 resolved
+14.0% vs TC avg
Strong +31% interview lift
Without
With
+30.6%
Interview Lift
resolved cases with interview
Typical timeline
2y 5m
Avg Prosecution
18 currently pending
Career history
540
Total Applications
across all art units

Statute-Specific Performance

§101
0.3%
-39.7% vs TC avg
§103
90.7%
+50.7% vs TC avg
§102
6.6%
-33.4% vs TC avg
§112
1.0%
-39.0% vs TC avg
Black line = Tech Center average estimate • Based on career data from 511 resolved cases

Office Action

§102 §103
Detailed Action Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Election/Restrictions Applicant’s election of Group I and Species I in the reply filed on 01/20/2026 is acknowledged. Because applicant did not distinctly and specifically point out the supposed errors in the restriction requirement, the election has been treated as an election without traverse (MPEP § 818.01(a)). Claims 5-20 and 22-31 withdrawn from further consideration pursuant to 37 CFR 1.142(b) as being drawn to a nonelected Invention and or Species, there being no allowable generic or linking claim. Election was made without traverse in the reply filed on 01/20/2026. Specification The title of the invention is not descriptive. A new title is required that is clearly indicative of the invention to which the claims are directed. The following title is suggested: “IMAGING DEVICE HAVING A VIA CONNECTING A FIRST AND SECOND SUBSTRATE, METHOD OF MANUFACTURING IMAGING DEVICE, AND ELECTRONIC DEVICE”. Claim Rejections - 35 USC § 102 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale or otherwise available to the public before the effective filing date of the claimed invention. (a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention. Claim(s) 1-4 and 7 is/are rejected under 35 U.S.C. 102(a)(1)/102(a)(2) as being anticipated by Gocho et. Al. (WO 2020105713 A1 hereinafter Gocho however, the examiner will use US Pre-Grant Publication/patent application US 20210400224 A1 as a translation of the WO document stated above. Hence, the rejection will use the paragraphs/columns and lines of US 20210400224 A1 for rejection purposes.). Regarding claim 1, Gocho teaches in Figs. 1 with associated text an imaging device comprising: a first semiconductor substrate 200 provided with a photoelectric conversion element 102 (Fig. 24, [0186]); a second semiconductor substrate 300 stacked on the first semiconductor substrate with an interlayer insulating film 240 interposed therebetween (Fig. 24, [0192]) and provided with a pixel circuit 104 that reads out charges generated in the photoelectric conversion element as a pixel signal (Fig. 24, [0200]); and a via (Csub) that penetrates the interlayer insulating film and electrically connects a first surface of the first semiconductor substrate facing the second semiconductor substrate and at least a part of a second surface of the second semiconductor substrate facing the first surface (Fig. 25, [0202]). PNG media_image1.png 433 362 media_image1.png Greyscale Regarding claim 2, Gocho teaches a first well region 204 provided in the first semiconductor substrate (Fig. 25, [0189]) and a second well region (301 and 302) located on a part of the second surface in the second semiconductor substrate (Fig. 25, [0201]) contain impurities having a same conductivity type ([0189] and ]0201]). Regarding claim 3, Gocho teaches the second well region includes a first region 302 and a second region 301, and the concentration of the impurity in the first region is higher than that in the second region (Fig. 25, [0201]). Regarding claim 4, Gocho teaches the via is provided on the first region (Fig. 25). Regarding claim 7, Gocho teaches the second semiconductor substrate has an insulating film region 340 on the second surface side. Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim 21 is rejected under 35 U.S.C. 103 as being unpatentable over Gocho as applied to claim 1 and further in view of Yamaguchi et. Al. (US 20170018591 A1 hereinafter Yamaguchi). Regarding claim 21, Gocho teaches the imaging device according to claim 1, further comprising a first pad unit provided on the first surface of the first semiconductor substrate and electrically connected to the via. Gocho does not specify a first pad unit provided on the first surface of the first semiconductor substrate and electrically connected to the via. Yamaguchi discloses in Fig. 5 with associated text a first pad unit MSF (Fig. 5, [0089]) provided on a first surface of a first semiconductor substrate (SUB and PW) similar to that of Gocho and electrically connected to a via PG similar to that of Gocho (Fig. 5, [0091]) It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to use a first pad similar to that of Gocho in the device of Gocho because according to Yamaguchi a metal silicide film NSF is formed over the upper surface of the gate electrodes GET and GET, the surface of the floating diffusion region FD, and the surface of the source/drain region NSD by a SALICIDE (Self Aligned siliCIDE) method ([0106]) such structures are very well known in the art to provide low contact resistance between connected conducting structures. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to AARON J GRAY whose telephone number is (571)270-7629. The examiner can normally be reached Monday-Friday 9am-4pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Toledo Fernando can be reached on 5712721867. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /AARON J GRAY/Examiner, Art Unit 2897
Read full office action

Prosecution Timeline

May 01, 2023
Application Filed
May 05, 2026
Non-Final Rejection mailed — §102, §103 (current)

Precedent Cases

Applications granted by this same examiner with similar technology

Patent 12684880
IMAGE SENSOR
3y 5m to grant Granted Jul 14, 2026
Patent 12677437
SEMICONDUCTOR STRUCTURE WITH BLOCKING LAYER
3y 6m to grant Granted Jul 07, 2026
Patent 12672324
MEMORY DEVICES AND METHODS OF MANUFACTURING THEREOF
3y 11m to grant Granted Jun 30, 2026
Patent 12660358
IMAGE SENSOR INCLUDING SILICON VERTICALLY STACKED WITH GERMANIUM LAYER
2y 11m to grant Granted Jun 16, 2026
Patent 12652966
QUANTUM DEVICE AND ITS MANUFACTURING METHOD
3y 0m to grant Granted Jun 09, 2026
Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
82%
Grant Probability
99%
With Interview (+30.6%)
2y 5m (~0m remaining)
Median Time to Grant
Low
PTA Risk
Based on 511 resolved cases by this examiner. Grant probability derived from career allowance rate.

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