Prosecution Insights
Last updated: April 18, 2026
Application No. 18/251,630

IMAGING ELEMENT, IMAGING DEVICE, AND METHOD OF MANUFACTURING IMAGING ELEMENT

Final Rejection §102§103
Filed
May 03, 2023
Examiner
LIN, JOHN
Art Unit
2815
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Sony Semiconductor Solutions Corporation
OA Round
2 (Final)
60%
Grant Probability
Moderate
3-4
OA Rounds
3y 10m
To Grant
68%
With Interview

Examiner Intelligence

Grants 60% of resolved cases
60%
Career Allow Rate
253 granted / 422 resolved
-8.0% vs TC avg
Moderate +8% lift
Without
With
+8.0%
Interview Lift
resolved cases with interview
Typical timeline
3y 10m
Avg Prosecution
26 currently pending
Career history
448
Total Applications
across all art units

Statute-Specific Performance

§101
0.1%
-39.9% vs TC avg
§103
54.6%
+14.6% vs TC avg
§102
25.2%
-14.8% vs TC avg
§112
18.8%
-21.2% vs TC avg
Black line = Tech Center average estimate • Based on career data from 422 resolved cases

Office Action

§102 §103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after 16 March 2013, is being examined under the first inventor to file provisions of the AIA . Response to Applicant This Office Action is in response to Applicant’s reply filed on 24 December 2025. Claim Rejections - 35 USC § 102 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claim(s) 1 and 15-18 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Izukashi (WO 2020/054545A1). Claim 1: Izukashi discloses an imaging element, in Figs. 3 and 4 and in paragraphs 14, 15, 20-22, 39, 49 and 52, comprising: a pixel (11) that includes a photoelectric conversion unit (PD) on a side (lower side of 31) of a light receiving face (lower face of 31) of a semiconductor substrate (31 and 33), wherein the photoelectric conversion unit (PD) is configured to execute photoelectric conversion on incident light (L), a charge holding unit (MEM) on a side (upper side of 31) different from the side of the light receiving face (lower face of 31) of the semiconductor substrate (31 and 33), wherein the charge holding unit (MEM) is configured to hold a charge generated by the photoelectric conversion, and a charge transfer unit (TRX) configured to transfer the generated charge to the charge holding unit, wherein the pixel (11) is configured to have a rectangular shape defined by four sides (four sides of 11 from the view from the bottom face) in a light receiving face view (view from the bottom face); a charge holding unit light shielding film (53A) having an elongated strip shape in the light receiving face view (view from the bottom face), wherein the charge holding unit light shielding film (53A) is adjacent to three sides of the four sides of the rectangular shape including a first side (left side in Fig. 4) that is one of the four sides, the charge holding unit light shielding film (53A) is parallel to the first side (left side in Fig. 4) in the light receiving face view (view from the bottom face), the charge holding unit light shielding film (53A) is adjacent to a semiconductor region (VG) including the charge transfer unit (TRX) in the light receiving face view (view from the bottom face), and the charge holding unit light shielding film (53A) is in the pixel (11) between the photoelectric conversion unit (PD) and the charge holding unit (MEM) to shield incident light (L); and a charge transfer unit light shielding film (56A) having an elongated strip shape in the light receiving face view (view from the bottom face), wherein the charge transfer unit light shielding film (56A) is adjacent to the three sides of the four sides of the rectangular shape including a second side (right side in Fig. 4) that is a side opposite to the first side (left side in Fig. 4), the charge transfer unit light shielding film (56A) is parallel to the second side (right side in Fig. 4) in a light receiving face view (view from the bottom face), and the charge transfer unit light shielding film (56A) is in the pixel (11) between the photoelectric conversion unit (PD) and the charge transfer unit (TRX) to shield incident light (L) and have a shape which has an end portion (left end portion of 56A) overlapping an end portion (right end portion of 53A) of the charge holding unit light shielding film (53A) in the light receiving face view (view from the bottom face), and a first charge transfer unit adjacent groove (H1 on the right) disposed at a boundary of the pixel (11), wherein the first charge transfer unit adjacent groove (H1 on the right) is formed on the side (lower side of 31) of the semiconductor substrate (31 and 33) that constitutes the light receiving face (lower face of 31). Claim 15: Izukashi discloses the imaging element according to claim 1, and in paragraph 50, further discloses wherein the charge holding unit light shielding film (53A) includes a metal member. Claim 16: Izukashi discloses the imaging element according to claim 1, and in paragraph 53, further discloses wherein the charge transfer unit light shielding film (56A) includes a metal member. Claim 17: Izukashi discloses an imaging device, in Figs. 1, 3, 4 and 27 and in paragraphs 14, 15, 19-22, 39, 49, 52 and 76 comprising: a pixel (11) that includes a photoelectric conversion unit (PD) on a side (lower side of 31) of a light receiving face (lower face of 31) of a semiconductor substrate (31 and 33), wherein the photoelectric conversion unit (PD) is configured to execute photoelectric conversion on incident light (L), a charge holding unit (MEM) on a side (upper side of 31) different from the side the light receiving face (lower face of 31) of the semiconductor substrate (31 and 33), wherein the charge holding unit (MEM) is configured to hold a charge generated by the photoelectric conversion, and a charge transfer unit (TRX) configured to transfer the generated charge to the charge holding unit, wherein the pixel (11) is configured to have a rectangular shape defined by four sides (four sides of 11 from the view from the bottom face) in a light receiving face view (view from the bottom face); a charge holding unit light shielding film (53A) having an elongated strip shape in the light receiving face view (view from the bottom face), wherein the charge holding unit light shielding film (53A) is adjacent to three sides of the four sides of the rectangular shape including a first side (left side in Fig. 4) that is one of the four sides, the charge holding unit light shielding film (53A) is parallel to the first side (left side in Fig. 4) in a light receiving face view (view from the bottom face), the charge holding unit light shielding film (53A) is adjacent to a semiconductor region (VG) including the charge transfer unit (TRX) in the light receiving face view (view from the bottom face), and the charge holding unit light shielding film (53A) is being disposed in the pixel (11) between the photoelectric conversion unit (PD) and the charge holding unit (MEM) to shield incident light (L); a charge transfer unit light shielding film (56A) having an elongated strip shape in the light receiving face view (view from the bottom face), wherein, the charge transfer unit light shielding film (56A) is adjacent to the three sides of the four sides of the rectangular shape including a second side (right side in Fig. 4) that is a side opposite to the first side (left side Fig. 4), the charge transfer unit light shielding film (56A) is parallel to the second side (right side in Fig. 4) in a light receiving face view (view from the bottom face), and the charge transfer unit light shielding film (56A) is in the pixel (11) between the photoelectric conversion unit (PD) and the charge transfer unit (TRX) to shield incident light and have a shape which has an end portion (left end portion of 56A) overlapping an end portion (right end portion of 53A) of the charge holding unit light shielding film (53A) in the light receiving face view (view from the bottom face); and a first charge transfer unit adjacent groove (H1 on the right) disposed at a boundary of the pixel (11), wherein the first charge transfer unit adjacent groove (H1 on the right) is formed on the side (lower side of 31) of the semiconductor substrate (31 and 33) that constitutes the light receiving face (lower face of 31); an image signal generation unit (22) configured to generate an image signal (image signal) based on held charge; and a processing circuit (220) configured to process the generated image signal (image signal). Claim 18: Izukashi discloses a method of manufacturing an imaging element, in Figs. 3 and 4 and in paragraphs 14, 15, 20-22, 39, 49 and 52, the method comprising: a step of forming a pixel (11) that includes a photoelectric conversion unit (PD) on a side (lower side of 31) of a light receiving face (lower face of 31) of a semiconductor substrate (31 and 33), wherein the photoelectric conversion unit (PD) is configured to execute photoelectric conversion on incident light (L), a charge holding unit (MEM) on a side (upper side of 31) different from the side of the light receiving face (lower face of 31) of the semiconductor substrate (31 and 33), wherein the charge holding unit (MEM) is configured to hold a charge generated by the photoelectric conversion, and a charge transfer unit (TRX) configured to transfer the generated charge to the charge holding unit, wherein the pixel (11) is configured to have a rectangular shape defined by four sides (four sides of 11 from the view from the bottom face) in a light receiving face view (view from the bottom face); forming a charge holding unit light shielding film (53A) having an elongated strip shape in the light receiving face view (view from the bottom face), wherein the charge holding unit light shielding film (53A) is adjacent to three sides of the four sides of the rectangular shape including a first side (left side Fig. 4) that is one of the four sides, the charge holding unit light shielding film (53A) is parallel to the first side (left side in Fig. 4) in the light receiving face view (view from the bottom face), the charge holding unit light shielding film (53A) is adjacent to a semiconductor region (VG) including the charge transfer unit (TRX) in the light receiving face view (view from the bottom face), and the charge holding unit light shielding film (53A) is in the pixel (11) between the photoelectric conversion unit (PD) and the charge holding unit (MEM) to shield incident light; and forming a charge transfer unit light shielding film (56A) having an elongated strip shape in the light receiving face view (view from the bottom face), wherein the charge transfer unit light shielding film (56A) is adjacent to three sides of the four sides of the rectangular shape including a second side (right side in Fig. 4) that is a side opposite to the first side (left side in Fig. 4), the charge transfer unit light shielding film (56A) is parallel to the second side (right side in Fig. 4) in the light receiving face view (view from the bottom face), and the charge transfer unit light shielding film (56A) is in the pixel (11) between the photoelectric conversion unit (PD) and the charge transfer unit (TRX) to shield incident light (L) and have a shape which has an end portion (left end portion of 56A) overlapping an end portion (right end portion of 53A) of the charge holding unit light shielding film (53A) in the light receiving face view (view from the bottom face); and forming a first charge transfer unit adjacent groove (H1 on the right) disposed at a boundary of the pixel (11), wherein the first charge transfer unit adjacent groove (H1 on the right) is formed on the side (lower side of 31) of the semiconductor substrate (31 and 33) that constitutes the light receiving face (lower face of 31). Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim(s) 2-6 is/are rejected under 35 U.S.C. 103 as being unpatentable over Izukashi as applied to claim 1 above, and further in view of Huang (U.S. Pub. 2018/0175195). Claim 2: Izukashi discloses the imaging element according to claim 1 and, in Fig. 3 and in paragraphs 49 and 52, further discloses the charge holding unit light shielding film (53A) includes a first light shielding member (53A) in a charge holding unit adjacent gap (58), and the charge transfer unit light shielding film (56A) includes a second light shielding member (56A) in a charge transfer unit adjacent gap (57). Izukashi appears not to explicitly disclose wherein the semiconductor substrate has a face of a plane direction orthogonal to a thickness direction, a face opposite the face constituting the light receiving face, the charge holding unit adjacent gap that is a gap formed based on etch of the semiconductor substrate in a direction of a first crystal orientation, and the charge transfer unit adjacent gap that is a gap formed based on the etch of the semiconductor substrate in a direction of the first crystal orientation. Huang, however, in paragraphs 22 and 25, discloses the semiconductor substrate (SiGe epitaxial layer) has a face (both sides of the epitaxial layer) of a plane direction (111) orthogonal to a thickness direction, and using tetramethylammonium hydroxide as a wet etchant to etch a substrate. Accordingly, it would have been obvious to one of ordinary skill in the art to substitute the disclosure of Huang that is in the same field of endeavor with Izukashi, before the effective filing date of the claimed invention in order to substitute the semiconductor substrate having a face of a plane direction orthogonal to a thickness direction, and using tetramethylammonium hydroxide as a wet etchant to etch a substrate as disclosed by Huang for the semiconductor substrate and the wet etchant disclosed by Izukashi. The substituted components were known in the art, one of ordinary skill could have substituted the elements, and the simple substitution of the semiconductor substrate having a face of a plane direction orthogonal to a thickness direction, and using tetramethylammonium hydroxide as a wet etchant to etch a substrate as disclosed by Huang for the semiconductor substrate and the wet etchant disclosed by Izukashi would have yielded predictable results, namely providing a suitable the crystal orientation to the semiconductor substrate and tetramethylammonium hydroxide as a wet etchant. (KSR Int’l Co. v. Teleflex Inc., 550 U.S. 398, 417 (2007)). Since Huang disclose the plane direction (111) can be on both sides of the semiconductor substrate, Izukashi in view of Huang would disclose a face opposite the face constituting the light receiving face. Further, since Huang the same wet etchant (tetramethylammonium hydroxide) is used to etch in a direction of a first crystal orientation <110> as in Applicant’s specification in paragraph 65, the wet etching process would inherently be in a direction of a first crystal orientation. Izukashi in view of Huang would therefore disclose the charge holding unit adjacent gap that is a gap formed by etching the semiconductor substrate in a direction of a first crystal orientation, and the charge transfer unit adjacent gap that is a gap formed by etching the semiconductor substrate in a direction of the first crystal orientation. Claim 3: Izukashi in view of Huang discloses the imaging element according to claim 2, and, in Figs. 3, 4 and 13 and in paragraph 61, Izukashi discloses further comprising: a first charge holding unit adjacent groove (H1 on the left), that is a groove on one (right side in Fig. 4) of four sides (four sides of 11 from the view from the bottom face) adjacent to the first side (left side in Fig. 4) at a boundary of the pixel (11), wherein the first charge holding unit adjacent groove (H1 on the left) has a length reaching a vicinity of an end portion (bottom portion of 53A) of the charge holding unit light shielding film (53A) from the first side (left side in Fig. 4); and the first charge transfer unit adjacent groove (H1 on the right) is a length reaching a vicinity of an end portion (bottom portion of 56A) of the charge transfer unit light shielding film (56A) from the second side (right side in Fig. 4). Izukashi in view of Huang discloses the charge holding unit adjacent gap is formed by etching in a direction of the crystal orientation <110>, and the charge transfer unit adjacent gap is formed by etching in a direction of the crystal orientation <110> (see rejection of claim 2 above). Since Huang discloses the semiconductor substrate has a face of a plane direction (111) and Izukashi in view of Huang discloses the charge holding unit adjacent gap is formed by etching in a direction of the first crystal orientation <110>, and the charge transfer unit adjacent gap is formed by etching in a direction of the first crystal orientation <110>, the first charge holding unit adjacent groove and the first charge transfer unit adjacent groove would inherently be configured to be parallel to a crystal orientation <112> in order for the first charge holding unit adjacent groove and the first charge transfer unit adjacent groove to extend from the semiconductor substrate with a face of a plane direction (111) to the charge holding unit adjacent gap and the charge transfer unit adjacent gap. The recitation “the charge holding unit adjacent gap is formed by etching the semiconductor substrate in a vicinity of a bottom portion of the first charge holding unit adjacent groove in the direction of the first crystal orientation, and the charge transfer unit adjacent gap is formed by etching the semiconductor substrate in a vicinity of the bottom portion of the first charge transfer unit adjacent groove in the direction of the first crystal orientation” is merely a product-by-process recitation that does not structurally distinguish the claimed invention over the prior art. The patentability of a product does not depend on its method of production. If the product in the product-by-process claim is the same as or obvious from a product of the prior art, the claim is unpatentable even though the prior product was made by a different process. In re Thorpe, 227 USPQ 964, 966. The product-by-process recitation only implies that the charge holding unit adjacent gap is adjacent to the first charge holding unit adjacent groove and implies the charge transfer unit adjacent gap is adjacent to the first charge transfer unit adjacent groove. Since Izukashi, in Fig. 3, discloses the charge holding unit adjacent gap (58) is adjacent to the first charge holding unit adjacent groove (H1 on the left) and the charge transfer unit adjacent gap (57) is adjacent to the first charge transfer unit adjacent groove (H1 on the right), Izukashi would disclose the same structure implied by the product-by-process step. Claim 4: Izukashi in view of Huang discloses the imaging element according to claim 3, and, in Fig. 3 and in paragraph 43, Izukashi discloses further comprising: a first charge holding unit adjacent light shielding wall (54A) in the first charge holding unit adjacent groove (H1 on the left), wherein the first charge holding unit adjacent light shielding wall (54A) shields incident light (L). Claim 5: Izukashi in view of Huang discloses the imaging element according to claim 3, and, in Fig. 3 and in paragraph 51, Izukashi discloses further comprising: a first charge transfer unit adjacent light shielding wall (51A) in the first charge transfer unit adjacent groove (H1 on the right), wherein the first charge transfer unit adjacent light shielding wall (51A) shields incident light (L). Claim 6: Izukashi in view of Huang discloses the imaging element according to claim 3, and, in Fig. 3, Izukashi discloses wherein the first charge holding unit adjacent groove (H1 on the left) and the first charge transfer unit adjacent groove (H1 on the right) a same face (lower face of 31) of the semiconductor substrate (31 and 33). Allowable Subject Matter Claims 8-14 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. The following is an examiner’s statement of reasons for the indication of allowable subject matter. The prior art of record, either singularly or in combination, does not suggest, in combination with the other claim limitations, a second charge holding unit adjacent groove that is a groove disposed on a side facing the first charge holding unit adjacent groove at a boundary of the pixel, disposed on a same face of the semiconductor substrate as the face on which the first charge holding unit adjacent groove is formed, and configured to have a length reaching the first charge transfer unit adjacent groove from the first side; and a second charge transfer unit adjacent groove that is a groove disposed on a side facing the first charge transfer unit adjacent groove at a boundary of the pixel, disposed on a same face of the semiconductor substrate as the face on which the first charge transfer unit adjacent groove is formed, and configured to have a length reaching the first charge holding unit adjacent groove from the second side, as required by claim 8. Claims 9-14 depend either directly or indirectly from claim 2 and are allowable for the same reason. Response to Arguments Applicant's arguments filed 24 December 2025 have been fully considered but they are not persuasive. Applicant contends amended claim 1 incorporates features of allowable dependent claim 7 and certain features of intervening claims. Examiner notes that because features of all intervening claims which original claim 1 was dependent on were not brought into claim 1 and the intervening claims were made broader, these features are no longer allowable. Conclusion Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to JOHN LIN whose telephone number is (571)270-1274. The examiner can normally be reached Monday-Friday 10am-6pm EST. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Joshua Benitez can be reached at 571-270-1435. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /J.L/ Examiner, Art Unit 2815 /JOSHUA BENITEZ ROSARIO/Supervisory Patent Examiner, Art Unit 2815
Read full office action

Prosecution Timeline

May 03, 2023
Application Filed
Nov 15, 2025
Non-Final Rejection — §102, §103
Dec 24, 2025
Response Filed
Apr 04, 2026
Final Rejection — §102, §103 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

3-4
Expected OA Rounds
60%
Grant Probability
68%
With Interview (+8.0%)
3y 10m
Median Time to Grant
Moderate
PTA Risk
Based on 422 resolved cases by this examiner. Grant probability derived from career allow rate.

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