Prosecution Insights
Last updated: October 01, 2026
Application No. 18/255,516

METALLIZATION OF SEMICONDUCTOR WAFER

Non-Final OA §103
Filed
Jun 01, 2023
Priority
Dec 02, 2020 — CN 202011393016.5 +1 more
Examiner
ENAD, CHRISTINE A
Art Unit
2811
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Heraeus Holding GmbH
OA Round
3 (Non-Final)
84%
Grant Probability
Favorable
3-4
OA Rounds
0m
Est. Remaining
95%
With Interview

Examiner Intelligence

Grants 84% — above average
84%
Career Allowance Rate
1149 granted / 1361 resolved
+16.4% vs TC avg
Moderate +10% lift
Without
With
+10.3%
Interview Lift
resolved cases with interview
Fast prosecutor
1y 12m
Avg Prosecution
28 currently pending
Career history
1398
Total Applications
across all art units

Statute-Specific Performance

§101
1.7%
-38.3% vs TC avg
§103
64.5%
+24.5% vs TC avg
§102
19.3%
-20.7% vs TC avg
§112
8.1%
-31.9% vs TC avg
Black line = Tech Center average estimate • Based on career data from 1361 resolved cases

Office Action

§103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Continued Examination Under 37 CFR 1.114 A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 5/12/2026 has been entered. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim 24 is rejected under 35 U.S.C. 103 as being unpatentable over Kodas et al (US Publication No. 2003/0148024), Noda (US Publication No. 2016/0222525), DeGroot et al (US Publication No. 2015/0000720) and Huang et al (US Publication No. 2009/0233800). . Regarding claim 24, Kodas d a semiconductor wafer precursor comprising: i) a semiconductor wafer ¶0312 and 0314, and an uncured layer of ink composition ¶0018, 0240, 0350-0362; wherein the metal in the ink composition is Ag, Ag/Sn or Au ¶0350-0362. Kodas discloses all the limitations but silent on a MOD method and the specific deposition area in the wafer. Whereas Noda discloses a semiconductor wafer, comprising: i) an MOD ink composition on a semiconductor wafer ¶0056. While DeGroot discloses a semiconductor wafer with the backside of the semiconductor wafer to be metallized ¶0026 with a MOD ink with metal composition Ag, Ag/Sn or Au ¶0022. Kodas, Noda and DeGroot are analogous art because they are directed to application of metallization layers and one of ordinary skill in the art would have had a reasonable expectation of success to modify Kodas because they are from the same field of endeavor. Therefore it would have been obvious to one having ordinary skill of the art before the effective filing date of the claimed invention to modify the method of Kodas and incorporate the teachings of Noda and DeGroot as an alternative method of deposition known in the art and also to provide another location for metallic connection for a TFT or solar applications as described in Kodas. Kodas, Noda and DeGroot discloses all the limitations but silent on the barrier layer. Whereas Huang discloses an adhesion layer and a barrier layer on the semiconductor wafer; or 2) a layer having both adhesion and barrier functions on the semiconductor wafer ¶0008 Fig 1. Kodas, Noda, DeGroot and Huang are analogous art because they are directed to metallization layers and one of ordinary skill in the art would have had a reasonable expectation of success to modify Noda because they are from the same field of endeavor. Therefore it would have been obvious to one having ordinary skill of the art before the effective filing date of the claimed invention to modify the device of Noda and incorporate additional layers to improve layer protection and bonding. Allowable Subject Matter Claims 1, 3-9, 11-14, 16, 19-23 are allowed over the prior art of record. The following is a statement of reasons for the indication of allowable subject matter: After further search and consideration of Applicant’s response, it is determined that the prior art of record neither anticipates nor renders obvious the claimed subject matter of the instant application as a whole either taken alone or in combination, in particular, prior art of record does not teach or suggest the specific steps of manufacturing the metal layer, barrier layer and adhesion layer, as recited in independent claim 1. Claims 3-9, 11-14, 16, 19-23 are also allowed as being directly or indirectly dependent of the allowed independent base claims. Response to Arguments Applicant's arguments filed 5/12/2026 have been fully considered but they are not persuasive. In response to applicant's argument that the combination of the prior art of record would not fit or cannot be utilize in combination, the test for obviousness is not whether the features of a secondary reference may be bodily incorporated into the structure of the primary reference; nor is it that the claimed invention must be expressly suggested in any one or all of the references. Rather, the test is what the combined teachings of the references would have suggested to those of ordinary skill in the art. See In re Keller, 642 F.2d 413, 208 USPQ 871 (CCPA 1981). In response to applicant's argument that the references fail to show certain features of the invention, it is noted that the features upon which applicant relies (i.e., the formation step of the layers e.g. inkjet printing) are not recited in the rejected claims. Although the claims are interpreted in light of the specification, limitations from the specification are not read into the claims. See In re Van Geuns, 988 F.2d 1181, 26 USPQ2d 1057 (Fed. Cir. 1993). Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to CHRISTINE A ENAD whose telephone number is (571)270-7891. The examiner can normally be reached Monday-Friday, 7:30 am -4:30 pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Lynne Gurley can be reached at 571 272 1670. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /CHRISTINE A ENAD/Primary Examiner, Art Unit 2811
Read full office action

Prosecution Timeline

Jun 01, 2023
Application Filed
Aug 06, 2025
Non-Final Rejection mailed — §103
Oct 31, 2025
Response Filed
Feb 13, 2026
Final Rejection mailed — §103
Apr 08, 2026
Response after Non-Final Action
May 12, 2026
Request for Continued Examination
May 15, 2026
Response after Non-Final Action
Aug 03, 2026
Non-Final Rejection mailed — §103 (current)

Precedent Cases

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Patent 12733200
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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

3-4
Expected OA Rounds
84%
Grant Probability
95%
With Interview (+10.3%)
1y 12m (~0m remaining)
Median Time to Grant
High
PTA Risk
Based on 1361 resolved cases by this examiner. Grant probability derived from career allowance rate.

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