DETAILED ACTION
Notice of Pre-AIA or AIA Status
1. The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Note by the Examiner
2. For clarity, the reference to specific claim numbers are presented in bold. Cited claim limitations are presented in bold the first time they are associated with a particular prior art disclosing the cited limitations, and subsequent reference to the already disclosed claim limitations are presented un-bolded. Certain elements from prior art which are not required by the claims are also presented un-bolded if they are particularly pertinent to understanding how the references are being combined. Item-to-item matching and Examiner explanations for 102 &/or 103 rejections have been provided in parenthesis.
Claim Objections
3. Claims 8-9 are objected to because of the following informalities:
Claim 8 recites “any of other photodiodes” which should be changed to along the lines of “any of the other photodiodes”. Appropriate correction is required.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
4. Claims 9-10 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claim 9 recites “each of the plurality of photodiodes is formed at a position where the distance from the gate electrode or the gate insulating film is different from the distance of all other photodiodes”. The current claim depends on claim 8 which already recites “each of the plurality of photodiodes is formed at a position where a distance from the gate electrode or a gate insulating film of the transistor is different from the distance of any of other photodiodes”. It is indefinite how “the distance of all other photodiodes” is different form “the distance of any of other photodiodes”
Claim 10 recites “the plurality of photodiodes includes a photodiode formed at a position where the distance from the gate electrode or the gate insulating film is uniform with the distance of at least one of other photodiodes”. The current claim depends on claim 9 which already recites “each of the plurality of photodiodes is formed at a position where the distance from the gate electrode or the gate insulating film is different from the distance of all other photodiodes”. There is a conflict because the current claim requires both the distances to be different from all others and for at least one to be the same.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
5. Claims 1, 11, and 15-17 are rejected under 35 U.S.C. 102(a)(1) and (a)(2) as being anticipated by
Lee et al. (US 2018/0190708 A1), hereinafter as L1
6. Regarding Claim 1, L1 discloses a solid-state imaging element (see in particular Fig. 3, see [0028] “image sensor”), comprising:
a plurality of photodiodes (elements PD1-PD3, see [0031] “First to third photoelectric conversion parts PD1 to PD3”) stacked in a semiconductor substrate (element 1, see [0029] “semiconductor substrate 1”) in a thickness direction (vertical) of the semiconductor substrate; and
a transistor (transistor of element TG, see [0030] “transfer gate TG”) including a gate electrode (element TG, see [0030]) at least a part of which is embedded in the semiconductor substrate (see Fig. 3), the transistor that individually reads a signal charge accumulated in each of the plurality of photodiodes according to a voltage applied to the gate electrode (see [0039]).
7. Regarding Claim 11, L1 discloses the solid-state imaging element of claim 1, wherein
the plurality of photodiodes includes a photodiode for obtaining a signal charge corresponding to blue light (element PD1, see [0032] “first to third impurity regions 11, 9, and 7 may be positioned at different depths corresponding to penetration depths of light having blue, green, and red wavelength ranges, respectively”), a photodiode for obtaining a signal charge corresponding to green light (element pD2, see [0032]), and a photodiode for obtaining a signal charge corresponding to red light (element PD3, see [0032]) in this order from a light-receiving surface side of the semiconductor substrate (see Fig. 3 top side of the micro-lens 33).
8. Regarding Claim 15, L1 discloses the solid-state imaging element of claim 1, wherein the transistor simultaneously reads signal charges accumulated in at least two or more photodiodes out of the plurality of photodiodes according to a predetermined voltage applied to the gate electrode (see [0039] “At this time, when the select transistors including the select gates SEL1 to SEL3 are turned on, electrons may be read out as signals transmitted through column lines” The select gates can be selected to be turned on as desired during use of the device to select two or more photodiodes).
9. Regarding Claim 16, L1 discloses a method of manufacturing a solid-state imaging element (see in particular Fig. 3, see [0028] “image sensor”), comprising:
stacking a plurality of photodiodes (elements PD1-PD3, see [0031] “First to third photoelectric conversion parts PD1 to PD3”) in a semiconductor substrate (element 1, see [0029] “semiconductor substrate 1”) in a thickness direction (vertical) of the semiconductor substrate; and
forming a transistor (transistor of element TG, see [0030] “transfer gate TG”) including a gate electrode (element TG, see [0030]) at least a part of which is embedded in the semiconductor substrate (see Fig. 3), the transistor that individually reads a signal charge accumulated in each of the plurality of photodiodes according to a voltage applied to the gate electrode (see [0039]).
10. Regarding Claim 17, L1 discloses an electronic device (see in particular Fig. 3, see [0028] “image sensor”), comprising:
a solid-state imaging element (element 101, see [0029]) including:
a plurality of photodiodes (elements PD1-PD3, see [0031] “First to third photoelectric conversion parts PD1 to PD3”) stacked in a semiconductor substrate (element 1, see [0029] “semiconductor substrate 1”) in a thickness direction (vertical) of the semiconductor substrate; and
a transistor (transistor of element TG, see [0030] “transfer gate TG”) including a gate electrode (element TG, see [0030]) at least a part of which is embedded in the semiconductor substrate (see Fig. 3), the transistor that individually reads a signal charge accumulated in each of the plurality of photodiodes according to a voltage applied to the gate electrode (see [0039]).
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
11. Claims 8-9 are rejected under 35 U.S.C. 103 as being unpatentable over Lee et al. (US 2018/0190708 A1), hereinafter as L1, in view of Koo et al. (US 2011/0108897 A1), hereinafter as K1
12. Regarding Claim 8, L1 discloses the solid-state imaging element of claim 1.
L1 does not disclose wherein each of the plurality of photodiodes is formed at a position where a distance from the gate electrode or a gate insulating film of the transistor is different from the distance of any of other photodiodes.
K1 discloses (see in particular Fig. 32) wherein each of the plurality of photodiodes is formed at a position where a distance from the gate electrode or a gate insulating film of the transistor is different from the distance of any of other photodiodes (the gate electrode element TG and gate insulating film element 41 both have an increasingly narrower width the further from the upper surface of the substrate such that a distance between the photodiodes having an aligned side surface have different distances with the gate and gate insulating film).
The narrowing gate electrode and insulating layer structure as taught by K1 is incorporated as a narrowing gate electrode and insulating structure of L1.
It would have been obvious to one having ordinary skill in the art at the time the invention was effectively filed to incorporate the teachings of K1 with L1 because the combination allows for preventing degradation of gate dielectric and reduce/prevent electric field crowding at sharp corners to have improved reliability (see K1 [0089]); and the combination is simple substitution of one known element for another to obtain predictable results – simple substitution of one known gate electrode and insulator shape for another in a similar device to obtain predictable results (see K1 Fig. 32).
13. Regarding Claim 9, L1, K1 disclose the solid-state imaging element of claim 8, wherein
each of the plurality of photodiodes is formed at a position where the distance from the gate electrode or the gate insulating film is different from the distance of all other photodiodes (see L1, K1 combined the gate is tapered away from the side surface of the photodiodes such that the distance spaced increases further from the substrate).
14. Claims 12-14 are rejected under 35 U.S.C. 103 as being unpatentable over Lee et al. (US 2018/0190708 A1), hereinafter as L1, in view of Ihara et al. (US 2013/0175582 A1), hereinafter as I1
15. Regarding Claim 12, L1 discloses the solid-state imaging element of claim 11.
L1 embodiment of Fig. 3 does not disclose wherein the plurality of photodiodes further includes a photodiode for obtaining a signal charge corresponding to infrared light on a side closer to the light-receiving surface than the photodiode for obtaining a signal charge corresponding to red light.
L1 embodiment of Figs. 21-22 disclose wherein the plurality of photodiodes further includes a photodiode for obtaining a signal charge corresponding to infrared light (see [0061] “a fourth photoelectric conversion part PD4 may be disposed at penetration depth of infrared light in such a way that it may be possible to sense infrared light”).
The additional infrared photodiode as taught by L1 Figs. 21-22 is incorporated as an additional infrared photodiode of L1 Fig. 3.
It would have been obvious to one having ordinary skill in the art at the time the invention was effectively filed to incorporate the teachings of L1 Figs. 21-22 with L1 Fig. 3 because the combination allows additional sensing of infrared light (see L1 [0061]); and the combination is simple substitution of one known element for another to obtain predictable results – simple substitution of one known number of stacked photodiodes for another in a similar device to obtain predictable results (see L1 Figs. 21-22 and [0061])
L1 embodiments as combined do not disclose the infrared photodiode on a side closer to the light-receiving surface than the photodiode for obtaining a signal charge corresponding to red light.
I1 (see Fig. 10) discloses the light-receiving surface is the bottom surface further from the transfer gate (see micro-lens 190 and color filter 186 for receiving light, and see [0130-0131] “an example of a backside illumination type image sensor in which light is incident from the bottom surface 102B of the substrate 102”)
The bottom light-receiving orientation as taught by I1 is incorporated as a bottom light-receiving orientation of L1, wherein the combination discloses the infrared photodiode on a side closer to the light-receiving surface than the photodiode for obtaining a signal charge corresponding to red light (the photodiodes would be flipped to tailor to the direction the light is received – see [0051] “Thus, in order to accumulate charges such as electrons by photoelectrically converting light that is incident from an external source at various wavelengths, the first photodiode region PD1 and the second photodiode region PD2 above the substrate 102 may have different depths according to lengths of the wavelengths of the incident light.”).
It would have been obvious to one having ordinary skill in the art at the time the invention was effectively filed to incorporate the teachings of I1 with L1 because the combination is simple substitution of one known element for another to obtain predictable results – simple substitution of one known light receiving direction for another in a similar device for which the two are provide as alternatives to obtain predictable results (see I1 Fig. 10 and [0131] “an example of a backside illumination type image sensor in which light is incident from the bottom surface 102B of the substrate 102 to the inside of the substrate 102, but one or more embodiments of the inventive concepts are not limited thereto. Although not illustrated, in a case of a front-side illumination type image sensor in which a color filter and a micro-lens are arranged on the top surface 102T of the substrate 102, and light is incident from the top surface 102T of the substrate 102 to the inside of the substrate 102”).
16. Regarding Claim 13, L1 discloses the solid-state imaging element of claim 1, wherein
the gate electrode is embedded in a recess formed to a depth reaching all photodiodes (see Fig. 3)
L1 does not disclose the depth reaching a photodiode closest to a light-receiving surface side out of the plurality of photodiodes.
I1 (see Fig. 10) discloses the light-receiving surface is the bottom surface further from the transfer gate (see micro-lens 190 and color filter 186 for receiving light, and see [0130-0131] “an example of a backside illumination type image sensor in which light is incident from the bottom surface 102B of the substrate 102”)
The bottom light-receiving orientation as taught by I1 is incorporated as a bottom light-receiving orientation of L1, wherein the combination discloses the depth reaching a photodiode closest to a light-receiving surface side out of the plurality of photodiodes (The bottom is the light-receiving surface side having the bottom closest photodiode – see [0051] “Thus, in order to accumulate charges such as electrons by photoelectrically converting light that is incident from an external source at various wavelengths, the first photodiode region PD1 and the second photodiode region PD2 above the substrate 102 may have different depths according to lengths of the wavelengths of the incident light.”).
It would have been obvious to one having ordinary skill in the art at the time the invention was effectively filed to incorporate the teachings of I1 with L1 because the combination is simple substitution of one known element for another to obtain predictable results – simple substitution of one known light receiving direction for another in a similar device for which the two are provide as alternatives to obtain predictable results (see I1 Fig. 10 and [0131] “an example of a backside illumination type image sensor in which light is incident from the bottom surface 102B of the substrate 102 to the inside of the substrate 102, but one or more embodiments of the inventive concepts are not limited thereto. Although not illustrated, in a case of a front-side illumination type image sensor in which a color filter and a micro-lens are arranged on the top surface 102T of the substrate 102, and light is incident from the top surface 102T of the substrate 102 to the inside of the substrate 102”).
17. Regarding Claim 14, L1 discloses the solid-state imaging element of claim 1, wherein the transistor is provided on a circuit formation surface side (top side), and sequentially reads signal charges accumulated in the plurality of photodiodes from the circuit formation surface side (see [0078] The photodiodes can be read out through a column line by turning on an access transistor for which they can be selected during use of the device in order as desired).
L1 does not disclose the circuit formation surface side on a side opposite to a light-receiving surface of the semiconductor substrate, and sequentially reads signal charges accumulated in the plurality of photodiodes from the circuit formation surface side.
I1 (see Fig. 10) discloses the light-receiving surface is the bottom surface further from the transfer gate (see micro-lens 190 and color filter 186 for receiving light, and see [0130-0131] “an example of a backside illumination type image sensor in which light is incident from the bottom surface 102B of the substrate 102”)
The bottom light-receiving orientation as taught by I1 is incorporated as a bottom light-receiving orientation of L1, wherein the combination discloses the circuit formation surface side on a side opposite to a light-receiving surface of the semiconductor substrate, and sequentially reads signal charges accumulated in the plurality of photodiodes from the circuit formation surface side (The top side is the circuit formation surface side opposite to the light-receiving bottom surface side – see [0051] “Thus, in order to accumulate charges such as electrons by photoelectrically converting light that is incident from an external source at various wavelengths, the first photodiode region PD1 and the second photodiode region PD2 above the substrate 102 may have different depths according to lengths of the wavelengths of the incident light.”).
It would have been obvious to one having ordinary skill in the art at the time the invention was effectively filed to incorporate the teachings of I1 with L1 because the combination is simple substitution of one known element for another to obtain predictable results – simple substitution of one known light receiving direction for another in a similar device for which the two are provide as alternatives to obtain predictable results (see I1 Fig. 10 and [0131] “an example of a backside illumination type image sensor in which light is incident from the bottom surface 102B of the substrate 102 to the inside of the substrate 102, but one or more embodiments of the inventive concepts are not limited thereto. Although not illustrated, in a case of a front-side illumination type image sensor in which a color filter and a micro-lens are arranged on the top surface 102T of the substrate 102, and light is incident from the top surface 102T of the substrate 102 to the inside of the substrate 102”).
Allowable Subject Matter
18. Claims 2-7 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is an examiner’s statement of reason for indicating allowable subject matter:
The prior art made of record, either singularly or in combination, does not disclose or suggest at least the claim limitations of:
19. Claim 2, “the transistor further includes a plurality of stages of gate insulating films having different film thicknesses in a substrate plane direction of the semiconductor substrate, and each stage of the gate insulating films is formed with a uniform film thickness with respect to at least one of the plurality of photodiodes” – as instantly claimed and in combination with the additionally claimed limitations.
All claims depending on the current claim incorporate the same allowable subject matter.
20. Claim 5, “the transistor further includes a plurality of stages of charge transfer layers having different impurity concentrations between the plurality of photodiodes and the gate electrode, and each stage of the charge transfer layers is formed at a uniform impurity concentration with respect to at least one of the plurality of photodiodes” – as instantly claimed and in combination with the additionally claimed limitations.
All claims depending on the current claim incorporate the same allowable subject matter.
Conclusion
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/SAMUEL PARK/Examiner, Art Unit 2818