Prosecution Insights
Last updated: April 19, 2026
Application No. 18/259,017

PARTICLE DETECTOR COMPRISING A POROUS REGION MADE OF A SEMICONDUCTOR MATERIAL, AND ASSOCIATED MANUFACTURING METHOD

Final Rejection §103
Filed
Jun 22, 2023
Examiner
DINKE, BITEW A
Art Unit
2812
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Insa Centre Val De Loire
OA Round
2 (Final)
72%
Grant Probability
Favorable
3-4
OA Rounds
2y 5m
To Grant
84%
With Interview

Examiner Intelligence

Grants 72% — above average
72%
Career Allow Rate
541 granted / 748 resolved
+4.3% vs TC avg
Moderate +12% lift
Without
With
+12.0%
Interview Lift
resolved cases with interview
Typical timeline
2y 5m
Avg Prosecution
52 currently pending
Career history
800
Total Applications
across all art units

Statute-Specific Performance

§101
1.3%
-38.7% vs TC avg
§103
65.0%
+25.0% vs TC avg
§102
7.9%
-32.1% vs TC avg
§112
12.1%
-27.9% vs TC avg
Black line = Tech Center average estimate • Based on career data from 748 resolved cases

Office Action

§103
Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Response to Arguments Applicant's arguments filed on 12/17/2025 have been fully considered but they are not persuasive. The Applicant argues that in regard to claim 1 that the combination of Vervisch and Suzuki prior art prior art, does not teach the limitation of “a layer of a porous material forming a porous region so that an effective thickness perceived by the particle beam when the particle beam passes through the device at the central part by passing through the porous region along an axis normal to the front face is less than the thickness of the central part, the space charge zone being situated outside the porous region.” In response to this argument, the Examiner directs the applicant’s attention to the combination of Vervisch and Suzuki prior art, which teaches the recited limitation as follows: Vervisch second embodiment Fig.9, teaches wherein a layer of a porous (7/oxide layer) material forming a porous region (7/oxide layer) so that an effective thickness perceived by the particle beam (FS) when the particle beam (FS) passes through the device at the central part (PC) by passing through the porous region (7/oxide layer) along an axis normal to the front face is less than the thickness of the central part (PC), the space charge zone (ZCE) being situated outside the porous region (7/oxide layer) (note: oxide layer were known as porous material, for support see Suzuki (col.10, lines 55-67, col.11, lines 1-7, col.15, lines 40-55, col.32, lines 45-67, and col.33, lines 1-35), which teaches thermally oxidized porous silicon layer. Hence, the prior art oxide layer 7 is equivalent to the claimed porous material) (see Vervisch, Fig.9 as shown above and ¶ [0093]). Thus, it would have been obvious to one of ordinary skill in the art before effective filing date of the claimed invention to combine the teachings of first embodiment Fig.4 and second embodiment Fig.9 of Vervisch to enable a layer of a porous (7/oxide layer) material to covers the side wall PL and the bottom FD of the first orifice of Fig.4 in order to eliminate dangling bonds derived from the manufacture of the orifice. In addition, during patent examination, the pending claims must be "given their broadest reasonable interpretation consistent with the specification." In re Hyatt, 211 F.3d 1367, 1372, 54 USPQ2d 1664, 1667 (Fed. Cir. 2000). While the claims of issued patents are interpreted in light of the specification, prosecution history, prior art and other claims, this is not the mode of claim interpretation to be applied during examination. During examination, the claims must be interpreted as broadly as their terms reasonably allow. In re American Academy of Science Tech Center, F.3d, 2004 WL 1067528 (Fed. Cir. May 13, 2004) (The USPTO uses a different standard for construing claims than that used by district courts; during examination the USPTO must give claims their broadest reasonable interpretation.) This means that the words of the claim must be given their plain meaning unless applicant has provided a clear definition in the specification. In re Zletz, 893 F.2d 319, 321, 13 USPQ2d 1320, 1322 (Fed. Cir. 1989) >; Chef America, Inc. v. Lamb-Weston, Inc., 358 F.3d 1371, 1372, 69 USPQ2d 1857 (Fed. Cir. 2004). The Examiner would further point out that “The use of patents as references is not limited to what the patentees describe as their own inventions or to the problems with which they are concerned. They are part of the literature of the art, relevant for all they contain.” In re Heck, 699 F.2d 1331, 1332-33, 216 USPQ 1038, 1039 (Fed. Cir. 1983) (quoting In re Lemelson, 397 F.2d 1006, 1009, 158 USPQ 275, 277 (CCPA 1968)). Therefore, the combination of Vervisch and Suzuki prior art reference does meet all the limitation in claim 1. Allowable Subject Matter Claim 14 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. The primary reason for the allowance of the claims is the inclusion of the limitation, along with the other claimed features, “wherein the peripheral part includes: a third peripheral part layer of a conductive material; a fifth peripheral part layer of a semiconductor material doped with a first doping type covering the third peripheral part layer and disposed in continuity with the fifth central part layer of the central part; a first peripheral part layer of a semiconductor material doped with a first doping type (a) covering the fifth peripheral part layer and (b) disposed in continuity with the first central part layer of the central part, the first central part layer of the central part and the first peripheral part layer of the peripheral part having the same doping level, the doping level of the fifth peripheral part layer being higher than the doping level of the first peripheral part layer; a sixth peripheral part layer of a dielectric material covering the first central part layer, and a fourth peripheral part layer of a conductive material covering the sixth peripheral part layer; the fourth peripheral part layer forming a step between the peripheral part and the central part covering a side surface of the sixth peripheral part layer so as to ensure continuity between the fourth central part layer of the central part and the fourth peripheral part layer of the peripheral part, the third peripheral part layer of a conductive material providing collection of a first type of charge carriers generated in the charge space zone”, as recited in claim 14. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim(s) 1-13 are rejected under 35 U.S.C. 103 as being unpatentable over Vervisch et al. (U.S. 2019/0277983 A1, hereinafter refer to Vervisch) in view of Suzuki et al. (US Pat. No. 5,644,156, hereinafter refer to Suzuki). Regarding Claim 1: Vervisch discloses a device for measuring a particle beam comprising a front face and a rear face (see Vervisch, Figs.1, 3-5, and 9 as shown below and ¶ [0001]) as well as: PNG media_image1.png 478 551 media_image1.png Greyscale PNG media_image2.png 513 568 media_image2.png Greyscale PNG media_image3.png 508 540 media_image3.png Greyscale PNG media_image4.png 524 532 media_image4.png Greyscale PNG media_image5.png 569 556 media_image5.png Greyscale PNG media_image6.png 504 521 media_image6.png Greyscale a central part (PC), including a space charge zone (ZCE) for a particle beam (FS) to be measured to pass therethrough, charge carriers of a first type and of a second type being generated by said particle beam (FS) when the particle beam passes through the space charge zone (ZCE) (see Vervisch, Figs.1 and 3-4 as shown above); a peripheral part (PP), including an electric charge collection zone (PP) for collecting at least one type of charge carrier among the first type or the second type of charge carriers generated at the space charge zone (ZCE) (see Vervisch, Figs.1 and 3-4 as shown above); the central part (PC) having a thickness less than or equal to a thickness of the peripheral part (PP), the peripheral part (PP) surrounding the central part (PC) so that a particle beam (FS) can pass through the central part (PC) without passing through the peripheral part (PP) (see Vervisch, Figs.1 and 4 as shown above), the device further including, in a region of the central part (PC) and opening (O1) onto the rear face (see Vervisch, Figs.1 and 3-4 as shown above). First embodiment Fig.4 of Vervisch is silent upon explicitly disclosing wherein a layer of a porous material forming a porous region so that an effective thickness perceived by the particle beam when the particle beam passes through the device at the central part by passing through the porous region along an axis normal to the front face is less than the thickness of the central part, the space charge zone being situated outside the porous region. However, second embodiment Fig.9 of Vervisch teaches wherein a layer of a porous (7/oxide layer) material forming a porous region (7/oxide layer) so that an effective thickness perceived by the particle beam (FS) when the particle beam (FS) passes through the device at the central part (PC) by passing through the porous region (7/oxide layer) along an axis normal to the front face is less than the thickness of the central part (PC), the space charge zone (ZCE) being situated outside the porous region (7/oxide layer) (note: oxide layer were known as porous material, for support see Suzuki (col.10, lines 55-67, col.11, lines 1-7, col.15, lines 40-55, col.32, lines 45-67, and col.33, lines 1-35), which teaches thermally oxidized porous silicon layer. Hence, the prior art oxide layer 7 is equivalent to the claimed porous material) (see Vervisch, Fig.9 as shown above and ¶ [0093]). Thus, it would have been obvious to one of ordinary skill in the art before effective filing date of the claimed invention to combine the teachings of first embodiment Fig.4 and second embodiment Fig.9 of Vervisch to enable a layer of a porous (7/oxide layer) material to covers the side wall PL and the bottom FD of the first orifice of Fig.4 in order to eliminate dangling bonds derived from the manufacture of the orifice. Regarding Claim 2: Vervisch as modified teaches a device for measuring a particle beam comprising a front face and a rear face as set forth in claim 1 as above. Vervisch further teaches wherein the central part (PC) is made of a wide band gap semiconductor material (see Vervisch, Figs.1 and 3-4 as shown above and ¶ [0013]). Regarding Claim 3: Vervisch as modified teaches a device for measuring a particle beam comprising a front face and a rear face as set forth in claim 2 as above. Vervisch further teaches wherein the semiconductor is silicon carbide (see Vervisch, Figs.1 and 3-4 as shown above and ¶ [0013]). Regarding Claim 4: Vervisch as modified teaches a device for measuring a particle beam comprising a front face and a rear face as set forth in claim 1 as above. Vervisch further teaches wherein the space charge zone (ZCE) is formed by a Schottky diode, a PN diode or a PIN diode (see Vervisch, Figs.1 and 3-4 as shown above and ¶ [0014]). Regarding Claim 5: Vervisch as modified teaches a device for measuring a particle beam comprising a front face and a rear face as set forth in claim 1 as above. Vervisch further teaches wherein the space charge zone (ZCE) of the central part (PC) is only located in a region of the central part facing the porous region (see Vervisch, Figs.1 and 3-4 as shown above). Regarding Claim 6: Vervisch as modified teaches a device for measuring a particle beam comprising a front face and a rear face as set forth in claim 1 as above. Vervisch further teaches wherein the space charge zone (ZCE) of the central part (PC) extends beyond the central part (PC) facing the porous region (see Vervisch, Figs.1 and 3-4 as shown above). Regarding Claim 7: Vervisch as modified teaches a device for measuring a particle beam comprising a front face and a rear face as set forth in claim 1 as above. Vervisch further teaches wherein the central part (PC) comprises: a first layer (1) of a semiconductor material (see Vervisch, Figs.1 and 3-4 as shown above); a second layer (2) of a conductive material covering the first layer (1) (see Vervisch, Figs.1 and 3-4 as shown above), and the space charge zone (ZCE) being formed by the Schottky diode formed by the first layer (1) and the second layer (2), the porous region being formed in the first layer (1) (see Vervisch, Figs.1 and 3-4 as shown above). Regarding Claim 8: Vervisch as modified teaches a device for measuring a particle beam comprising a front face and a rear face as set forth in claim 7 as above. Vervisch further teaches wherein the peripheral part comprises: a third layer (3) of a conductive material (see Vervisch, Figs.1 and 3-4 as shown above); a first layer (1) of a semiconductor material covering the third layer (3) and disposed in continuity with the first layer (1) of the central part (PC) (see Vervisch, Figs.1 and 3-4 as shown above); and a second layer (2) of a conductive material covering the first layer (1) and disposed in continuity with the second layer (2) of the central part (PC) (see Vervisch, Figs.1 and 3-4 as shown above), and the third layer (3) of a conductive material ensuring collection of a first type of charge carriers generated in the charge space zone (ZCE) (see Vervisch, Figs.1 and 3-4 as shown above). Regarding Claim 9: Vervisch as modified teaches a device for measuring a particle beam comprising a front face and a rear face as set forth in claim 5 as above. Vervisch further teaches wherein the central part comprises: a first central part layer (1) of a semiconductor material doped with a first doping type (see Vervisch, Figs.1 and 3-4 as shown above and ¶ [0078]- ¶ [0080]); a second central part layer (2) of a semiconductor material doped with a second doping type opposite to the first doping type, said second central part layer (2) covering the first central part layer (1) (see Vervisch, Figs.1 and 3-4 as shown above and ¶ [0078]- ¶ [0080]); a fourth central part layer (4) of a conductive material, said fourth central part layer (4) covering the second central part layer (2) (see Vervisch, Figs.1 and 3-4 as shown above and ¶ [0078]- ¶ [0080]), and the space charge zone (ZCE) being formed by the PN diode formed by the first central part layer (1) and the second central part layer (2), the porous region (7) being formed in the first central part layer (1) (see Vervisch, Figs.1 and 3-4 as shown above and ¶ [0078]- ¶ [0080]). Regarding Claim 10: Vervisch as modified teaches a device for measuring a particle beam comprising a front face and a rear face as set forth in claim 9 as above. Vervisch further teaches wherein the peripheral part (PP) comprises: a third peripheral part layer (3) of a conductive material (see Vervisch, Figs.1 and 3-4 as shown above and ¶ [0078]- ¶ [0080]); a first peripheral part layer (1) of a semiconductor material doped with a first doping type covering the third peripheral part layer (3) and disposed in continuity with the first central part layer (1) of the central part (PC) (see Vervisch, Figs.1 and 3-4 as shown above and ¶ [0078]- ¶ [0080]); a second peripheral part layer (2) of a semiconductor material doped with a second doping type opposite to the first doping type and covering the first peripheral part layer (1), said second peripheral part layer (2) being disposed in continuity with the second central part layer (2) of the central part (PC) (see Vervisch, Figs.1 and 3-4 as shown above and ¶ [0078]- ¶ [0080]), and a fourth peripheral part layer (4) of a conductive material, said fourth layer (4) covering the second peripheral part layer (2), said fourth peripheral part layer (4) being disposed in continuity with the fourth central part layer (4) of the central part (PC) (see Vervisch, Figs.1 and 3-4 as shown above and ¶ [0078]- ¶ [0080]), and the third peripheral part layer (3) of a conductive material ensuring collection of a first type of charge carriers generated in the charge space zone (ZCE) (see Vervisch, Figs.1 and 3-4 as shown above and ¶ [0078]- ¶ [0080]). Regarding Claim 11: Vervisch as modified teaches a device for measuring a particle beam comprising a front face and a rear face as set forth in claim 9 as above. Vervisch further teaches wherein the peripheral part (PP) comprises: a third peripheral part layer (3) of a conductive material (see Vervisch, Fig.6 as shown above); a first peripheral part layer (1) of a semiconductor material doped with a first doping type covering the third peripheral part layer (3) and disposed in continuity with the first central part layer (1) of the central part (PC), the first central part layer (1) of the central part and the first peripheral part layer (1) of the peripheral part having the same doping level (see Vervisch, Fig.6 as shown above and ¶ [0078]- ¶ [0080]); a sixth peripheral part layer (6) of a dielectric material covering the first central part layer (1) (see Vervisch, Fig.6 as shown above); a fourth peripheral part layer (4) of a conductive material covering the sixth peripheral part layer (6) (see Vervisch, Fig.6 as shown above), and the fourth peripheral part layer (4) forming a step between the peripheral part (PP) and the central part (PC) covering a side surface of the sixth peripheral part layer (6) so as to ensure continuity between the fourth central part layer (4) of the central part and the fourth peripheral part layer (4) of the peripheral part, the third peripheral part layer (3) of a conductive material ensuring collection of a first type of charge carriers generated in the charge space zone (ZCE) (see Vervisch, Fig.6 as shown above). Regarding Claim 12: Vervisch as modified teaches a device for measuring a particle beam comprising a front face and a rear face as set forth in claim 5 as above. Vervisch further teaches wherein the central part (PC) comprises: a fifth central part layer (1) of a semiconductor material doped with a first doping type, at least part of the porous region (7) being formed in the fifth central part layer (5) (see Vervisch, Fig.3 as shown below and Fig.9 as shown above and ¶ [0078]- ¶ [0080]); PNG media_image7.png 545 721 media_image7.png Greyscale a first central part layer (ZCE central part) of a semiconductor material doped with a first doping type, said first central part layer covering the fifth central part layer (1), the doping level of the fifth central part layer (1) being higher than the doping level of the first central part layer (ZCE central part) (see Vervisch, Figs.3 as shown above); a second central part layer (2) of a semiconductor material doped with a second doping type opposite to the first doping type, said second central part layer (2) covering the first central part layer (ZCE central part) (see Vervisch, Figs.3 as shown above); a fourth central part layer (4) of a conductive material, said fourth central part layer (4) covering the second central part layer (2) (see Vervisch, Figs.3 as shown above), and the space charge zone (ZCE) being formed by the PIN diode formed by the fifth central part layer (1), the first central part layer (ZCE central part) and the second central part layer (2) (see Vervisch, Figs.3 as shown above). Regarding Claim 13: Vervisch as modified teaches a device for measuring a particle beam comprising a front face and a rear face as set forth in claim 12 as above. Vervisch further teaches wherein the peripheral part (PP) comprises: a third peripheral part layer (3) of a conductive material (see Vervisch, Figs.3 as shown above); a fifth peripheral part layer (1’) of a semiconductor material doped with a first doping type covering the third peripheral part layer (3) and disposed in continuity with the fifth central part layer (1) of the central part (PC) (see Vervisch, Figs.3 as shown above); a first peripheral part layer (ZCE peripheral part) of a semiconductor material doped with a first doping type covering the fifth peripheral part layer (1’) and disposed in continuity with the first central part layer (ZCE central part) of the central part, the doping level of the fifth peripheral part layer (1’) being higher than the doping level of the first peripheral part layer (ZCE peripheral part) (see Vervisch, Figs.3 as shown above); a second peripheral part layer (2’) of a semiconductor material doped with a second doping type opposite to the first doping type (a) covering the first peripheral part layer (ZCE peripheral part), said second layer (2’) and (b) being disposed in continuity with the second central part layer (2) of the central part (see Vervisch, Figs.3 as shown above); a fourth peripheral part layer (4’) of a conductive material, said fourth layer (c) covering the second peripheral part layer (2’), said fourth layer (4’) and (d) being disposed in continuity with the fourth central part layer (4) of the central part (see Vervisch, Figs.3 as shown above), and the third peripheral part layer (3) of a conductive material ensuring collection of a first type of charge carriers generated in the charge space zone (ZCE) (see Vervisch, Figs.3 as shown above). Claim(s) 15 is rejected under 35 U.S.C. 103 as being unpatentable over Vervisch et al. (U.S. 2019/0277983 A1, hereinafter refer to Vervisch) and Suzuki et al. (US Pat. No. 5,644,156, hereinafter refer to Suzuki) as applied to claim 1 above, and further in view of Guenard (U.S. 2017/0040518 A1, hereinafter refer to Guenard). Regarding Claim 15: Vervisch as modified teaches a device for measuring a particle beam comprising a front face and a rear face as set forth in claim 1 as above. The combination of Vervisch and Suzuki further teaches a method for manufacturing a detector according to claim 1, from a semiconductor substrate (5) doped with a first doping type comprising a front face and a rear face (see Vervisch, Figs.1 and 3-4 as shown above and ¶ [0086]), the manufacturing method comprising: a first layer (1) of an intrinsic semiconductor material (note: doping level of 5 x 1015 is known as intrinsic concentration level) (see Vervisch, Figs.1 and 3-4 as shown above and ¶ [0086]); a second layer (2) of a semiconductor material doped with a second doping type opposite to the first doping type (see Vervisch, Figs.1 and 3-4 as shown above and ¶ [0086]); depositing, onto the rear face of the substrate (5), a third layer (3) of a conductive material (see Vervisch, Figs.3-4 as shown above); performing photolithography on the third layer (3) of a conductive material so as to provide at least one first opening within said third layer (3) (see Vervisch, Figs.3-4 as shown above); and etching, at the rear face of the part of the substrate (5) not covered in the third conductive layer (3) so as to form a porous region in the substrate (5) facing the first opening (see Vervisch, Figs.3-4 as shown above), and depositing, onto the front face of the substrate (5), a fourth layer of a conductive material (4) (see Vervisch, Figs.3-4 as shown above). Vervisch is silent upon explicitly disclosing wherein epitaxially growing, on the front face of the substrate, epitaxially growing, on the front face of the substrate. Before effective filing date of the claimed invention the disclosed processing conditions were known for forming a diode layers. For support see Guenard, which teaches wherein epitaxially growing, on the front face of the substrate (12) (see Guenard, Fig.2A and ¶ [0047]), epitaxially growing, on the front face of the substrate (10) (see Guenard, Fig.2A and ¶ [0047]). Thus, it would have been within the scope of one of ordinary skill in the art before effective filing date of the claimed invention to combine the teachings of Vervisch, Suzuki, and Guenard to enable the known epitaxial growing process for forming the Vervisch diode layers according to the teachings of Guenard because one of ordinary skill in the art before effective filing date of the claimed invention would have been motivated to look to alternative suitable methods of performing the disclosed diode layers of Vervisch and art recognized suitability for an intended purpose has been recognized to be motivation to combine. MPEP § 2144.07. Conclusion THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to BITEW A DINKE whose telephone number is (571)272-0534. The examiner can normally be reached M-F 7 a.m. - 5 p.m.. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Davienne Monbleau can be reached at (571)272-1945. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /BITEW A DINKE/Primary Examiner, Art Unit 2812
Read full office action

Prosecution Timeline

Jun 22, 2023
Application Filed
Sep 15, 2025
Non-Final Rejection — §103
Dec 17, 2025
Response Filed
Dec 31, 2025
Final Rejection — §103 (current)

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