Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 14-23, and 25-31 is/are rejected under 35 U.S.C. 103 as being unpatentable over Tran (cited on Ids Appl. Phys. A) in view of Ohtsu Adv. Mater. Letters 2019.
As to claims 14 and 26, Tran teaches A method of manufacturing a semiconductor element, the method comprising: providing a semiconductor stack comprising: a silicon substrate containing a first impurity of a first conductivity type that is one of p-type and n-type (section 4 As n-type n+ Silicon figure 2), at a first concentration (n+), and a silicon semiconductor layer provided on the silicon substrate, the silicon semiconductor layer comprising: a first silicon semiconductor layer containing a second impurity of the first conductivity type at a second concentration that is lower than the first concentration ( the n epitaxial layer doped with Phosphorous), and a second silicon semiconductor layer containing a third impurity of a second conductivity type that is the other of p-type and n-type (the player figure 2 doped with boron); and irradiating the silicon semiconductor layer with light having a predetermined peak wavelength in a presence of a forward current flowing through the silicon semiconductor layer such that the third impurity is diffused (second step and figure 3); Tran states: In the second step, the DP-assisted annealing was performed by causing a forward bias current to flow through the device while irradiating the p-type side of the device with a laser beam. The experimental setup is illustrated in Fig. 3. To connect the electric power supply to the device, Dotite paste was used to attach a Cu film on the p-type surface. Another Cu film was also attached to the n-type side of the device. The forward bias current density used for the annealing was 1.44 A/cm2, and the optical power of the laser beam irradiation was 75 mW. At the surface of the device, the laser beam radius was 1.5 mm, and so the irradiation light density was approximately 3.33 W/cm2, which is high enough for inducing the DP-assisted annealing. The wavelength of the laser light was 400 nm; in other words, the photon energy was 3.1 eV, which is 2.5 times higher than the band gap energy of Si. After one hour of annealing, the fabrication of our Si homojunction-structured LED was completed.
Tran does not teach wherein: the predetermined peak wavelength is longer than a wavelength corresponding to a magnitude of a bandgap of silicon.
Ohtsu:
Two-step ion implantation was carried out to dope the Si with B atoms: (1) First step: B atoms were implanted with an energy of 700 keV at a dose of 2.7×1014/cm2. The peak concentration of B atoms was 1×1019/cm3 at a depth of 1400 nm from the Si crystal surface. (2) Second step: B atoms were implanted with an energy of 10 keV at a dose of 5.3×1014/cm2. The peak concentration of B atoms was 1×1020/cm3 at a depth of 45 nm from the Si crystal surface. This second doping step was advantageous for decreasing the resistivity at the crystal surface. Mesh-electrode type and flip-chip type devices were fabricated to achieve higher current injection and efficient heat dissipation. These devices are described in the following subsections.
And
The conditions for the DPP-assisted annealing were: (1) A substrate temperature of 285 K; (2) irradiation light with a wavelength of 1342 nm (photon energy hvanneal = 0.925 eV) and a power of 2.0 W; (3) injected current having a triangular waveform (50s period) and a peak current of 1.3 A (current density 1.3 A/mm2); and (4) an annealing time of 2 hours.
It is noted the wavelength for silicon bandgap is 1100 nm to 1120 nm, thus 1342 nm is longer that the band of Silicon.
Thus, it would have been obvious to one of ordinary skill in the art at the time of filing to irradiate and 1342 for the desired spectral profiles summary:
After reviewing fabrication of Si-LEDs using a novel DPP-assisted annealing method, their unique light emission spectral profiles were presented in the wavelength range 900–2500 nm, including novel photon breeding features. The highest optical output power demonstrated was as high as 2.0 W, which was 103-times that of a conventional LED.
As to claim 15 Tran teaches forming the silicon semiconductor layer on the silicon substrate ( the silicon layer is epitaxial and section 4 states so), the silicon semiconductor layer comprising the first silicon semiconductor layer containing a second impurity of the first conductivity type at a second concentration that is lower than the first concentration. Section 4 states: In the first step, we used an As-doped n-type Si single crystal on which we deposited an epitaxial layer of phosphorus (P).
and introducing, into a surface of the silicon semiconductor layer, a third impurity of a second conductivity type that is the other of p-type and n-type, thereby forming the second silicon semiconductor layer.
Section 4 which states: This Si crystal was doped with boron (B) by an ion implantation method, with seven different levels of accelerating energy of 30, 70, 130, 215, 330, 480, and 700 keV, to form dopant domains with a dose density of . A p-type region was successfully formed in Si, and as a result, a p–n homojunction structure was constructed. Furthermore, with such a high energy and high-concentration B-doping profile, the distribution of B at the p–n junction was spatially inhomogeneous; this was to increase the probability of producing a dopant distribution favorable for generating DPs. The crystal was then diced into an area. A 150 nm-thick indium tin oxide (ITO) film was deposited on the surface of the p-type layer, whereas a 5 nm-thick Cr film and a 100 nm-thick Al film were deposited on the back surface of the n-type Si to serve as electrodes, by using RF sputtering. The layer structure of the device is shown in Fig. 2.
As to claim 16 and 17, Tran does not explicitly teach reducing a thickness of the silicon substrate before irradiating the silicon semiconductor layer with the light having the predetermined peak wavelength such that the third impurity is diffused. However, it is noted that the recitation of the claim it can take place any time before irradiating even before the forming the semiconductor layer.
Tran teaches epitaxially growing and it was known to grind and polish, which inherently reduces the thickness, a substrate before epitaxial growth to provide a mirror surface and reduce defect which will influence the growth of the epitaxial layer.
Thus, it would have been obvious to one of ordinary skill in the art at the time of filing to grind and polish the silicon substrate to provide a mirror surface to reduce the defects in the epitaxial layer, thus inherently reducing the thickness of the substrate.
As to claims 18 and 19, heat dissipation plate while not indefinite does not limit the structure to a particular structure. In the instance of Tran, the base plate will act as a heat dissipation plate.
As to claim 20 and 21 Tran teaches the substrate is n+ and the epi layer is n concentrations. Tran does not teach first concentration of 1X10^17 to 1X10^21 cm^-3 and the second I 1X10^14 to 1X10^16 cm^-3.
However, 1X10^17 but lower than 1X10^21 cm^-3 for n+ concentration in silicon were known and the second I 1X10^14 but lower than 1X10^16 cm^-3 for n concentration in silicon were known.
Thus, it would have been obvious to one of ordinary skill in the art at the time of filing to optimize the first concentration to be1X10^17 to 1X10^21 cm^-3 and the second to be 1X10^14 to 1X10^16 cm^-3. To optimize resistance and electric characteristics of the diode for the desired operation range.
As to claim 22 and 23 Tran teaches after forming the second silicon semiconductor layer and before irradiating the silicon semiconductor layer with the light having the predetermined peak wavelength, forming a first upper electrode on a surface of the silicon semiconductor layer, the first upper electrode comprising a light-transmitting region configured to transmit the light having the predetermined peak wavelength.
Tran states The crystal was then diced into an area. A 150 nm-thick indium tin oxide (ITO) film was deposited on the surface of the p-type layer, whereas a 5 nm-thick Cr film and a 100 nm-thick Al film were deposited on the back surface of the n-type Si to serve as electrodes, by using RF sputtering. The layer structure of the device is shown in Fig. 2. As part of the first step which occurs before the irradiation. ITO is the upper electrode and ITO is transparent in the visible range up t to about 1500 nm. Thus, Tran teaches/suggests forming a transparent, to the wavelength emitted, electrode before biasing and irradiating
As to claim 25, Tran teaches a light emitter see title.
As to claims 27-31, Tran teaches the substrate is n+ and the epi layer is n concentrations. Tran does not teach first concentration of 1X10^17 to 1X10^21 cm^-3 and the second I 1X10^14 to 1X10^16 cm^-3.
However, 1X10^17 but lower than 1X10^21 cm^-3 for n+ concentration in silicon were known and the second I 1X10^14 but lower than 1X10^16 cm^-3 for n concentration in silicon were known.
Thus, it would have been obvious to one of ordinary skill in the art at the time of filing to optimize the first concentration to be1X10^17 to 1X10^21 cm^-3 and the second to be 1X10^14 to 1X10^16 cm^-3. To optimize resistance and electric characteristics of the diode for the desired operation range.
The recitation of the outcomes of:
at zero bias, the photosensitivity for light whose peak wavelength is equal to or longer than 1.2 pm and equal to or shorter than 2.0 pm is equal to or higher than 2.Ox10-6 A/W and equal to or lower than 7.0x10-6 A/W.
in a case where a temperature of an object under measurement is 25°C, an absolute value of a ratio of a change in differential resistance of the semiconductor element to a temperature in a temperature range from 30°C to 40°C is equal to or higher than 5 S2/°C and equal to or lower than 100 S2/°C.
Must be inherent since the structure is the same.
Allowable Subject Matter
Claims 24 and 32 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
As to claim 24 ,Prior art does not teach and or suggest further comprising: removing the first upper electrode; and forming a second upper electrode for use in operation of the semiconductor element on a part of the surface of the silicon semiconductor layer in conjunction with the other elements if claim 22 and 14.
While Kadowaki ‘186 (cited on ids) teaches the process for a polarization control claim 20 and removes the electron to form a magnetic field control. There is no motivation to form the magnetic field loop in place of the electrode thus Claim 25 is indicated as allowable.
Claim 33 is allowed.
As to claim 32 and 33 prior art fails to teach and or suggest , wherein: in irradiating the silicon semiconductor layer with the light having the predetermined peak wavelength, while the silicon substrate is located on a heat dissipation plate, a temperature of a surface of the silicon semiconductor layer is equal to or higher than 100°C and equal to or lower than 200°C, and a temperature of the silicon substrate cooled by the heat dissipation plate is equal to or higher than 0°C and equal to or lower than 30°C.
In conjunction with the other elements of claim 14 and 33.
Response to Arguments
Applicant's arguments filed 2/19/2026 have been fully considered but they are not persuasive. Applicant argument that the change renders the invention unsatisfactory for its intended purpose. Tran acknowledges that the same process can be applied to Infrared:
In recent research by the authors, we succeeded in fabricating such a structure in Si by employing a technique known as DP-assisted annealing, which allowed us to realize a high-efficiency p–n homojunction-structured LED using a bulk Si crystal [4]. This annealing process has also been applied not only to a Si infrared LED but also to a Si infrared laser [6], a Si photodetector [7], a Si optical and electrical relaxation oscillator [8], and a ZnO LED [9]. However, the light emitted from the devices fabricated using this annealing principle resulted from a two-step transition of an electron in the conduction band to the valence band; hence, the photon energy of the light cannot exceed the band gap energy of the material.
Likewise, Ohtsu acknowledge visible ;light can be used for annealing:
Note that this paper discusses the principle and method of realizing infrared Si-LEDs. Refer to ref. [9] for details of visible light Si-LEDs, Si-lasers, and LEDs fabricated using other indirect-transition-type semiconductors (SiC and GaP), and related devices, which have been developed by using DPP-assisted annealing.
In this instance the case follows closer to Urbanski cited MPEP 2143.01 V:
But see In re Urbanski, 809 F.3d 1237, 1244, 117 USPQ2d 1499, 1504 (Fed. Cir. 2016) (The patent claims were directed to a method of enzymatic hydrolysis of soy fiber to reduce water holding capacity, requiring reacting the soy fiber and enzyme in water for about 60-120 minutes. The claims were rejected over two prior art references, wherein the primary reference taught using a longer reaction time of 5 to 72 hours and the secondary reference taught using a reaction time of 100 to 240 minutes, preferably 120 minutes. The applicant argued that modifying the primary reference in the manner suggested by the secondary reference would forego the benefits taught by the primary reference, thereby teaching away from the combination. The court held that both prior art references "suggest[ed] that hydrolysis time may be adjusted to achieve different fiber properties. Nothing in the prior art teaches that the proposed modification would have resulted in an ‘inoperable’ process or a dietary fiber product with undesirable properties." (emphasis in original)).
In both Tran and Ohtsu the reference suggests the wavelength can be varied depend on the desire application. For example, telecommunication device would use near IR or IR while a device being used to be detectable by human eyes would use visible light. Neither of the reference suggest the process would be inoperable or light emitting device would not be inoperable.
Thus, the rejection is deemed proper and maintained.
Conclusion
THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
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/MATTHEW L. REAMES/
Primary Examiner
Art Unit 2896
/MATTHEW L REAMES/Primary Examiner, Art Unit 2896