DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
This OA is in response to the amendment filled on 8/3/2023 that has been entered, wherein claims 1-20 are pending.
Information Disclosure Statement
The information disclosure statement (IDS) submitted on 1/18/2024 is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner.
Specification
The title of the invention is not descriptive. A new title is required that is clearly indicative of the invention to which the claims are directed.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1-5, 11-15 and 20 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Ju (US 2021/0134197 A1).
Regarding claim 1, Ju teaches a display substrate(Figs. 4-12), comprising a plurality of islands(ISL1, ¶0072) and a plurality of bridges(ISL3, ISL4, ISL5, ISL6, ¶0077, ¶0123) connecting the plurality of islands(ISL1);
wherein the display substrate comprises a first voltage supply network(ELVDDL, ¶0123);
the first voltage supply network(ELVDDL, ¶0123, please see examiner annotated Fig. 11) comprises a plurality of first connecting structures(portion of ELVDDL within ISL1, CE2, ¶0123,¶0111 ) in a display area of the display substrate, a first row connecting line(portion of ELVDDL within ISL6, ¶0123), a second row connecting line(portion of ELVDDL within ISL4, ¶0123), a first column connecting line(portion of ELVDDL within ISL5, ¶0123), and a second column connecting line(portion of ELVDDL within ISL3, ¶0123);
a respective first connecting structure(portion of ELVDDL within ISL1, CE2, ¶0123,¶0111 ) of the plurality of first connecting structures(portion of ELVDDL within ISL1, CE2, ¶0123,¶0111 ) is connected by the first row connecting line(portion of ELVDDL within ISL6, ¶0123), the second row connecting line(portion of ELVDDL within ISL4, ¶0123), the first column connecting line(portion of ELVDDL within ISL5, ¶0123), and the second column connecting line(portion of ELVDDL within ISL3, ¶0123), to four adjacent first connecting structures(portion of ELVDDL within ISL1, CE2, ¶0123,¶0111 ), respectively;
the first row connecting line(portion of ELVDDL within ISL6, ¶0123), the second row connecting line(portion of ELVDDL within ISL4, ¶0123), the first column connecting line(portion of ELVDDL within ISL5, ¶0123), and the second column connecting line(portion of ELVDDL within ISL3, ¶0123) are in four different bridges(ISL3, ISL4, ISL5, ISL6, ¶0077, ¶0123) of the plurality of bridges(ISL3, ISL4, ISL5, ISL6, ¶0077, ¶0123).
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Regarding claim 2, Ju teaches the display substrate of claim 1, wherein the first row connecting line(portion of ELVDDL within ISL6, ¶0123) connects the respective first connecting structure(portion of ELVDDL within ISL1, CE2, ¶0123,¶0111 ) with a first connecting structure(portion of ELVDDL within ISL1, CE2, ¶0123,¶0111 ) in a first adjacent row and in a same column together(please see examiner annotated Fig. 4);
the second row connecting line(portion of ELVDDL within ISL4, ¶0123) connects the respective first connecting structure(portion of ELVDDL within ISL1, CE2, ¶0123,¶0111 ) with a first connecting structure(portion of ELVDDL within ISL1, CE2, ¶0123,¶0111 ) in a second adjacent row and in a same column together; and the first adjacent row and the second adjacent row are two different rows on two different sides, along a column direction, of a present row having the respective first connecting structure(portion of ELVDDL within ISL1, CE2, ¶0123,¶0111 ).
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Regarding claim 3, Ju teaches the display substrate of claim 1, wherein the first column connecting line(portion of ELVDDL within ISL5, ¶0123) connects the respective first connecting structure(portion of ELVDDL within ISL1, CE2, ¶0123,¶0111 ) with a first connecting structure(portion of ELVDDL within ISL1, CE2, ¶0123,¶0111 ) in a first adjacent column and in a same row together;
the second column connecting line(portion of ELVDDL within ISL3, ¶0123) connects the respective first connecting structure(portion of ELVDDL within ISL1, CE2, ¶0123,¶0111 ) with a first connecting structure(portion of ELVDDL within ISL1, CE2, ¶0123,¶0111 ) in a second adjacent column and in a same row together; and
the first adjacent column and the second adjacent column are two different columns on two different sides, along a row direction, of a present column having the respective first connecting structure(portion of ELVDDL within ISL1, CE2, ¶0123,¶0111 ).
Regarding claim 4, Ju teaches the display substrate of claim 1, wherein the respective first connecting structure(portion of ELVDDL within ISL1, CE2, ¶0123,¶0111 ) comprises a first connecting line(please see examiner annotated Fig. 11) and a second connecting line(please see examiner annotated Fig. 11) electrically connected to each other;
the first connecting line(please see examiner annotated Fig. 11) is connected to the first row connecting line(portion of ELVDDL within ISL6, ¶0123) and the first column connecting line(portion of ELVDDL within ISL5, ¶0123); and
the second connecting line(please see examiner annotated Fig. 11) is connected to the second row connecting line(portion of ELVDDL within ISL4, ¶0123) and the second column connecting line(portion of ELVDDL within ISL3, ¶0123).
Regarding claim 5, Ju teaches the display substrate of claim 4, wherein the respective first connecting structure(portion of ELVDDL within ISL1, CE2, ¶0123,¶0111 ) further includes one or more connecting lines(CE2, ¶0111 ) in a layer different from the first connecting line(please see examiner annotated Fig. 11) and the second connecting line(please see examiner annotated Fig. 11).
Regarding claim 11, Ju teaches the display substrate of claim 1, further comprising a second voltage supply network(ELVSSL, ¶0124, please see examiner annotated Fig. 12);
wherein the second voltage supply network(ELVSSL, ¶0124, please see examiner annotated Fig. 12) comprises a plurality of second connecting structures(portion of ELVSSL in ISL1, ¶0124) in a display area of the display substrate, a third row connecting line(portion of ELVSSL in ISL6, ¶0124), a fourth row connecting line(portion of ELVSSL in ISL4, ¶0124), a third column connecting line(portion of ELVSSL in ISL5, ¶0124), and a fourth column connecting line(portion of ELVSSL in ISL3, ¶0124);
a respective second connecting structure(portion of ELVSSL in ISL1, ¶0124) of the plurality of second connecting structures(portion of ELVSSL in ISL1, ¶0124) is connected by the third row connecting line(portion of ELVSSL in ISL6, ¶0124), the fourth row connecting line(portion of ELVSSL in ISL4, ¶0124), the third column connecting line(portion of ELVSSL in ISL5, ¶0124), and the fourth column connecting line(portion of ELVSSL in ISL3, ¶0124), to four adjacent second connecting structures(portion of ELVSSL in ISL1, ¶0124), respectively;
the third row connecting line(portion of ELVSSL in ISL6, ¶0124), the fourth row connecting line(portion of ELVSSL in ISL4, ¶0124), the third column connecting line(portion of ELVSSL in ISL5, ¶0124), and the fourth column connecting line(portion of ELVSSL in ISL3, ¶0124) are in the four different bridges(ISL3, ISL4, ISL5, ISL6, ¶0077, ¶0123).
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Regarding claim 12, Ju teaches the display substrate of claim 11, wherein the third row connecting line(portion of ELVSSL in ISL6, ¶0124) connects the respective second connecting structure(portion of ELVSSL in ISL1, ¶0124) with a second connecting structure in a first adjacent row and in a same column together(please see examiner annotated Fig. 4);
the fourth row connecting line(portion of ELVSSL in ISL4, ¶0124) connects the respective second connecting structure(portion of ELVSSL in ISL1, ¶0124) with a connecting structure in a second adjacent row and in a same column together;
the first adjacent row and the second adjacent row are two different rows on two different sides, along a column direction, of a present row having the respective second connecting structure(portion of ELVSSL in ISL1, ¶0124).
Regarding claim 13, Ju teaches the display substrate of claim 11, wherein the third column connecting line(portion of ELVSSL in ISL5, ¶0124) connects the respective second connecting structure(portion of ELVSSL in ISL1, ¶0124) with a connecting structure in a first adjacent column and in a same row together(please see examiner annotated Fig. 4);
the fourth column connecting line(portion of ELVSSL in ISL3, ¶0124) connects the respective second connecting structure(portion of ELVSSL in ISL1, ¶0124) with a connecting structure in a second adjacent column and in the same row together; and the first adjacent column and the second adjacent column are two different columns on two different sides, along a row direction, of a present column having the respective second connecting structure(portion of ELVSSL in ISL1, ¶0124).
Regarding claim 14, Ju teaches the display substrate of claim 11, wherein the respective second connecting structure(portion of ELVSSL in ISL1, ¶0124) comprises a third connecting line(portion of ELVSSL in ISL1, ¶0124) in a conductive layer(SDL3, ¶0111); and
the third row connecting line(portion of ELVSSL in ISL6, ¶0124), the fourth row connecting line(portion of ELVSSL in ISL4, ¶0124), the third column connecting line(portion of ELVSSL in ISL5, ¶0124), and the fourth column connecting line(portion of ELVSSL in ISL3, ¶0124) are in a signal line layer(SDL3, ¶0111).
Regarding claim 15, Ju teaches the display substrate of claim 11, wherein the first row connecting line(portion of ELVDDL within ISL6, ¶0123) and the third row connecting line(portion of ELVSSL in ISL6, ¶0124) are in a same first bridge(ISL6, ¶0123);
the second row connecting line(portion of ELVDDL within ISL4, ¶0123) and the fourth row connecting line(portion of ELVSSL in ISL4, ¶0124) are in a same second bridge(ISL4, ¶0124);
the first column connecting line(portion of ELVDDL within ISL5, ¶0123) and the third column connecting line(portion of ELVSSL in ISL5, ¶0124) are in a same third bridge(ISL5, ¶0124); and
the second column connecting line(portion of ELVDDL within ISL3, ¶0123) and the fourth column connecting line(portion of ELVSSL in ISL3, ¶0124) are in a same fourth bridge(ISL3, ¶0124).
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claims 8-10 and 16-17 are rejected under 35 U.S.C. 103 as being unpatentable over Ju (US 2021/0134197 A1) in view of Lee et al. (US 2020/0133343 A1).
Regarding claim 8, Ju teaches the display substrate of claim 1, but is not relied on to teach at least one first voltage supply pad in a peripheral area of the display substrate;
a first column of connecting structures directly adjacent to, and connected to, the at least one first voltage supply pad; and
a first pad connecting line connecting a respective first column connecting structure in the first column of connecting structures with the at least one first voltage supply pad.
Lee teaches a display substrate(Fig. 1) comprising at least one first voltage supply pad(pads, not illustrated, ¶0054) in a peripheral area(NA) of the display substrate(110); a first column of connecting structures(CL of 111, ¶0070) directly adjacent to, and connected to, the at least one first voltage supply pad(pads, not illustrated, ¶0054); and
a first pad connecting line(180, ¶0053) connecting a respective first column connecting structure(CL of 111, ¶0070) in the first column of connecting structures(CL of 111, ¶0070) with the at least one first voltage supply pad(pads, not illustrated, ¶0054). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the device of Ju, to include at least one first voltage supply pad in a peripheral area of the display substrate; a first column of connecting structures directly adjacent to, and connected to, the at least one first voltage supply pad; and a first pad connecting line connecting a respective first column connecting structure in the first column of connecting structures with the at least one first voltage supply pad, as taught by Lee, provide a plurality of sub-pixels in the active area AA with the supply voltage, data voltage, gate voltage, etc. through the pads(¶0054) and to connect a driver IC for processing data for displaying image and driving signals for processing the data(¶0056).
Regarding claim 9, Ju teaches the display substrate of claim 1, but is not relied on to teach at least one first voltage supply pad in a peripheral area of the display substrate;
a first row of connecting structures directly adjacent to, and connected to, the at least one first voltage supply pad; and
a second pad connecting line connecting a respective first row connecting structure in the first row of connecting structures with the at least one first voltage supply pad.
Lee teaches a display substrate(Fig. 1) comprising at least one first voltage supply pad(pads, not illustrated, ¶0054) in a peripheral area(NA) of the display substrate(110); a first row of connecting structures(CL of 111, ¶0070) directly adjacent to, and connected to, the at least one first voltage supply pad(pads, not illustrated, ¶0054); and
a second pad connecting line(180, ¶0053) connecting a respective first row connecting structure(CL of 111, ¶0070) in the first row of connecting structures(CL of 111, ¶0070) with the at least one first voltage supply pad(pads, not illustrated, ¶0054). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the device of Ju, to include at least one first voltage supply pad in a peripheral area of the display substrate; a first row of connecting structures directly adjacent to, and connected to, the at least one first voltage supply pad; and a second pad connecting line connecting a respective first row connecting structure in the first row of connecting structures with the at least one first voltage supply pad, as taught by Lee, provide a plurality of sub-pixels in the active area AA with the supply voltage, data voltage, gate voltage, etc. through the pads(¶0054) and to connect a driver IC for processing data for displaying image and driving signals for processing the data(¶0056).
Regarding claim 10, Ju teaches the display substrate of claim 1, but is not relied on to teach at least one first voltage supply pad in a peripheral area of the display substrate;
a first corner connecting structure directly adjacent to, and connected to, the at least one first voltage supply pad;
a third pad connecting line connecting the first corner connecting structure with the at least one first voltage supply pad; and
a fourth pad connecting line connecting the first corner connecting structure with the at least one first voltage supply pad.
Lee teaches a display substrate(Fig. 1) comprising at least one first voltage supply pad(pads, not illustrated, ¶0054) in a peripheral area(NA) of the display substrate(110); a first corner of connecting structures(CL of 111, ¶0070) directly adjacent to, and connected to, the at least one first voltage supply pad(pads, not illustrated, ¶0054); and
a third pad connecting line(180, ¶0053) connecting the first corner connecting structure(CL of 111, ¶0070) with the at least one first voltage supply pad(pads, not illustrated, ¶0054) and a fourth pad connecting line(180, ¶0053) connecting the first corner connecting structure(CL of 111, ¶0070) with the at least one first voltage supply pad(pads, not illustrated, ¶0054). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the device of Ju, to include at least one first voltage supply pad in a peripheral area of the display substrate;
a first corner connecting structure directly adjacent to, and connected to, the at least one first voltage supply pad; a third pad connecting line connecting the first corner connecting structure with the at least one first voltage supply pad; and a fourth pad connecting line connecting the first corner connecting structure with the at least one first voltage supply pad, as taught by Lee, provide a plurality of sub-pixels in the active area AA with the supply voltage, data voltage, gate voltage, etc. through the pads(¶0054) and to connect a driver IC for processing data for displaying image and driving signals for processing the data(¶0056).
Regarding claim 16, Ju teaches the display substrate of claim 11, but is not relied on to teach at least one second voltage supply pad in a peripheral area of the display substrate;
a second row of connecting structures directly adjacent to, and connected to, the at least one second voltage supply pad;
a fifth pad connecting line connecting a respective second row connecting structure in the second row of connecting structures with the at least one second voltage supply pad; and
a sixth pad connecting line connecting a respective second row connecting structure in the second row of connecting structures with the at least one second voltage supply pad.
Lee teaches a display substrate(Fig. 1) comprising at least one second voltage supply pad(pads, not illustrated, ¶0054) in a peripheral area(NA) of the display substrate(110); a second row of connecting structures(CL of 111, ¶0070) directly adjacent to, and connected to, the at least one second voltage supply pad(pads, not illustrated, ¶0054); and
a fifth pad connecting line(180, ¶0053) connecting a respective second row connecting structure(CL of 111, ¶0070) in the second row of connecting structures(CL of 111, ¶0070) with the at least one second voltage supply pad(pads, not illustrated, ¶0054). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the device of Ju, to include at least one second voltage supply pad in a peripheral area of the display substrate; a second row of connecting structures directly adjacent to, and connected to, the at least one second voltage supply pad; a fifth pad connecting line connecting a respective second row connecting structure in the second row of connecting structures with the at least one second voltage supply pad; and a sixth pad connecting line connecting a respective second row connecting structure in the second row of connecting structures with the at least one second voltage supply pad, as taught by Lee, provide a plurality of sub-pixels in the active area AA with the supply voltage, data voltage, gate voltage, etc. through the pads(¶0054) and to connect a driver IC for processing data for displaying image and driving signals for processing the data(¶0056).
Regarding claim 17, Ju teaches the display substrate of claim 11, but is not relied on to teach at least one second voltage supply pad in a peripheral area of the display substrate;
a second corner connecting structure directly adjacent to, and connected to, the at least one second voltage supply pad;
a seventh pad connecting line connecting the second corner connecting structure with the at least one second voltage supply pad; and
an eighth pad connecting line connecting the second corner connecting structure with the at least one second voltage supply pad.
Lee teaches a display substrate(Fig. 1) comprising at least one second voltage supply pad(pads, not illustrated, ¶0054) in a peripheral area(NA) of the display substrate(110); a second corner of connecting structures(CL of 111, ¶0070) directly adjacent to, and connected to, the at least one second voltage supply pad(pads, not illustrated, ¶0054); and
a seventh pad connecting line(180, ¶0053) connecting the second corner connecting structure(CL of 111, ¶0070) with the at least one second voltage supply pad(pads, not illustrated, ¶0054) and a eighth pad connecting line(180, ¶0053) connecting the second corner connecting structure(CL of 111, ¶0070) with the at least one second voltage supply pad(pads, not illustrated, ¶0054). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the device of Ju, to include at least one second voltage supply pad in a peripheral area of the display substrate; a second corner connecting structure directly adjacent to, and connected to, the at least one second voltage supply pad;
a seventh pad connecting line connecting the second corner connecting structure with the at least one second voltage supply pad; and an eighth pad connecting line connecting the second corner connecting structure with the at least one second voltage supply pad, as taught by Lee, provide a plurality of sub-pixels in the active area AA with the supply voltage, data voltage, gate voltage, etc. through the pads(¶0054) and to connect a driver IC for processing data for displaying image and driving signals for processing the data(¶0056).
Regarding claim 20, Ju teaches a display apparatus(Fig. 1), comprising the display substrate of claim 1(please see claim 1, above),
Ju is not relied on to teach one or more integrated circuits connected to the display substrate.
Lee teaches a display substrate(Fig. 1) one or more integrated circuits(132, ¶0056) connected to the display substrate(110). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the device of Ju, to include one or more integrated circuits connected to the display substrate, as taught by Lee, for processing data for displaying image and driving signals for processing the data(¶0056) and to provide a plurality of sub-pixels in the active area AA with the supply voltage, data voltage, gate voltage, etc. through the pads(¶0054).
Claims 18-19 are rejected under 35 U.S.C. 103 as being unpatentable over Ju (US 2021/0134197 A1) and Lee et al. (US 2020/0133343 A1) as applied to claim 11 above, further in view of Chen et al. (US 2012/0056859 A1).
Regarding claim 18, Ju, in view of Lee, teaches the display substrate of claim 11, but is not relied on to teach at least one first voltage supply pad in a peripheral area of the display substrate;
wherein the at least one first voltage supply pad substantially surrounds the display area; and
the first voltage supply network(ELVDDL, ¶0123) is connected to the at least one first voltage supply pad on all sides of the display area.
Lee teaches a display substrate(Fig. 1) comprising one first voltage supply pad(pads, not illustrated, ¶0054) in a peripheral area(NA) of the display substrate(110); wherein the at least one first voltage supply pad(pads, not illustrated, ¶0054) substantially surrounds the display area(AA); and the first voltage supply network(CL, ¶0070) is connected to the at least one first voltage supply pad(pads, not illustrated, ¶0054) on two sides of the display area(Fig. 1). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the device of Ju, to include one first voltage supply pad in a peripheral area of the display substrate; wherein the at least one first voltage supply pad substantially surrounds the display area; and the first voltage supply network is connected to the at least one first voltage supply pad on two sides of the display area, as taught by Lee, provide a plurality of sub-pixels in the active area AA with the supply voltage, data voltage, gate voltage, etc. through the pads(¶0054) and to connect a driver IC for processing data for displaying image and driving signals for processing the data(¶0056).
Ju and Lee are not relied on to teach the first voltage supply network(ELVDDL, ¶0123) is connected to the at least one first voltage supply pad on all sides of the display area. Lee teaches the first voltage supply pad(pads, not illustrated, ¶0054) in a peripheral area(NA) are used to attached driver IC’s(132, ¶0054) on two sides of the display area(Fig. 1).
Chen teaches a display device(Fig. 5) wherein driver IC(¶0053) are disposed on all sides of the display area(510). Modifying the device of Ju, to disposed the driver IC of Lee on all sides of the display area would result in the first voltage supply network is connected to the at least one first voltage supply pad on all sides of the display area. It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the device of Ju, so that the first voltage supply network is connected to the at least one first voltage supply pad on all sides of the display area, as taught by Chen, in order to improve the driving ability and operation frequency or to satisfy other design requirements(¶0051).
Regarding claim 19, Ju teaches the display substrate of claim 11, but is not relied on to teach at least one second voltage supply pad in a peripheral area of the display substrate wherein the at least one second voltage supply pad comprises two portions on two opposite sides of the display area, the two portions configured to receive a second voltage supply signal;
the second voltage supply network(ELVSSL, ¶0124, please see examiner annotated Fig. 12) is connected to the two portions of the at least one second voltage supply pad on two opposite sides of the display area.
Lee teaches a display substrate(Fig. 1) comprising at least one second voltage supply pad(pads, not illustrated, ¶0054) in a peripheral area(NA) of the display substrate(110); wherein the at least one second voltage supply pad(pads, not illustrated, ¶0054) comprises two portions on two sides of the display area, the two portions configured to receive a second voltage supply signal(¶0054); the second voltage supply network(CL, ¶0070) is connected to the two portions of the at least one second voltage supply pad(pads, not illustrated, ¶0054) on two sides of the display area. It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the device of Ju, to include at least one second voltage supply pad in a peripheral area of the display substrate wherein the at least one second voltage supply pad comprises two portions on two sides of the display area, the two portions configured to receive a second voltage supply signal; the second voltage supply network is connected to the two portions of the at least one second voltage supply pad on two sides of the display area, as taught by Lee, provide a plurality of sub-pixels in the active area AA with the supply voltage, data voltage, gate voltage, etc. through the pads(¶0054) and to connect a driver IC for processing data for displaying image and driving signals for processing the data(¶0056).
Ju and Lee are not relied on to teach at least one second voltage supply pad comprises two portions on two opposite sides of the display area, the second voltage supply network(ELVSSL, ¶0124, please see examiner annotated Fig. 12) is connected to the two portions of the at least one second voltage supply pad on two opposite sides of the display area.
Lee teaches the first voltage supply pad(pads, not illustrated, ¶0054) in a peripheral area(NA) are used to attached driver IC’s(132, ¶0054) on two sides of the display area(Fig. 1).
Chen teaches a display device(Fig. 5) wherein driver IC(¶0053) are disposed on all sides of the display area(510). Modifying the device of Ju, to disposed the driver IC of Lee on all sides of the display area would result in at least one second voltage supply pad comprises two portions on two opposite sides of the display area, the second voltage supply network is connected to the two portions of the at least one second voltage supply pad on two opposite sides of the display area. It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the device of Ju, so that at least one second voltage supply pad comprises two portions on two opposite sides of the display area, the second voltage supply network is connected to the two portions of the at least one second voltage supply pad on two opposite sides of the display area, as taught by Chen, in order to improve the driving ability and operation frequency or to satisfy other design requirements(¶0051).
Allowable Subject Matter
Claims 6-7 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is a statement of reasons for the indication of allowable subject matter:
Regarding dependent claim 6, the prior art of record neither anticipates nor renders obvious the claimed subject matter of the instant application as a whole either taken alone or in combination, in particular, prior art of record does not teach “the one or more connecting lines includes a fourth connecting line connecting the first connecting line and the second connecting line together; the first connecting line and the second connecting line are in a conductive layer; and the fourth connecting line is in a signal line layer”.
Regarding dependent claim 6, the prior art of record neither anticipates nor renders obvious the claimed subject matter of the instant application as a whole either taken alone or in combination, in particular, prior art of record does not teach “ the one or more connecting lines includes a cathode connecting line and a cathode connecting pad connecting the first connecting line and the second connecting line together; and at least one of the cathode connecting line and the cathode connecting pad is further connected to a cathode.”
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Cho et al. (US 2023/0232678 A1).
Any inquiry concerning this communication or earlier communications from the examiner should be directed to LAURA DYKES whose telephone number is (571)270-3161. The examiner can normally be reached M-F 9:30 am-5 pm.
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/LAURA M DYKES/Examiner, Art Unit 2892