DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Amendment
This Office Action is in response to Applicant's amendments filed June 30, 2026. Claims 1 and 10 have been amended. Claim 21 has been added. Claim 8 has been canceled. Claims 17-20 stand withdrawn. Currently, claims 1-7, 9-16, and 21 are pending.
Response to Arguments
Applicant’s arguments with respect to claims 1 and 10 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-2, 6-7, 9-11, and 15-16 are rejected under 35 U.S.C. 103 as being unpatentable over Nagano et al. (US 20140327100 A1) herein after “Nagano” in view of Tanaka et al. (US 20190103426 A1) herein after “Tanaka”.
Regarding claim 1, Fig. 2 of Nagano discloses an imaging device (Fig. 2, light detection device, ¶ [0038]) comprising:
a substrate (Fig. 2, semiconductor substrate 1N, glass substrate 30, ¶ [0065]);
a pixel circuit (Fig. 2, electrode E3, signal lines TL, ¶ [0069]) provided on the substrate (1N, 30);
a through silicon via (Fig. 2, through-hole electrodes TE, ¶ [0050]) that penetrates the substrate (1N, 30) and is electrically connected to the pixel circuit (Fig. 2, “The through-hole electrode TE has one end connected to the electrode E3”, ¶ [0051]); and
a passivation film (Fig. 2, passivation films PF, ¶ [0064]) that covers the through silicon via (TE), wherein the passivation film (PF) contains at least silicon (“The passivation films PF are comprised, for example, of SiN”, ¶ [0064]),
wherein the through silicon via (TE) has a tapered shape with an opening at an upper surface of the substrate (1N) and a bottom closer to the pixel circuit (E3, TL).
Nagano fails to disclose wherein the opening has a smaller width than the bottom, and
wherein the through silicon via gradually widens from the opening toward the pixel circuit.
In the similar field of endeavor of solid-state imaging apparatuses, Tanaka discloses wherein the opening has a smaller width than the bottom (“In the first embodiment, the through via 88 has a reversely tapered shape in which the plane area of the wiring layer 83 side is smaller than that of the external terminal 14 side, but on the contrary, may have a forwardly tapered shape in which the plane area of the external terminal 14 side is smaller”, ¶ [0327]), and
wherein the through silicon via (Fig. 23, through via (through silicon via (TSV)) 88, ¶ [0327]) gradually widens from the opening toward the pixel circuit (Fig. 23, multilayered wiring layer 102, ¶ [0217]).
It would have been obvious to one of ordinary skill in the art before the time of the effective filling date of the invention to modify the passivation layer of Nagano with the tapered shape as disclosed by Tanaka as a matter of design choice (see Tanaka, ¶ [0327]) and/or because changes in size and shape are prima facie obvious absent persuasive evidence that the particular configuration is significant (MPEP 2144.04(IV)).
Regarding claim 2, Nagano and Tanaka together disclose the imaging device according to claim 1 as applied above, and further discloses wherein the passivation film (PF) contains silicon oxide (SiO2), silicon nitride (SiN), or silicon carbonitride (SiCN) (“The passivation films PF are comprised, for example, of SiN”, ¶ [0064]).
Regarding claim 6, Nagano and Tanaka together disclose the imaging device according to claim 1 as applied above, and further discloses wherein the substrate (1N, 30) includes a first substrate (30) and a second substrate (1N) stacked on the first substrate (30), the pixel circuit (TL, E3) is provided on the first substrate (30), and
the through silicon via (TE) is provided on the second substrate (1N).
Regarding claim 7, Nagano and Tanaka together disclose the imaging device according to claim 6 as applied above, and further discloses wherein the through silicon via (TE) has a recessed shape recessed toward the first substrate (30).
Regarding claim 9, Nagano and Tanaka together disclose the imaging device according to claim 6 as applied above, and further discloses comprising:
a connection terminal (Fig. 2, UBM (Under Bump Metal) 40, ¶ [0062]) that protrudes from the second substrate (1N) and is electrically connected to the through silicon via (TE), wherein the passivation film (PF) covers a side surface of the connection terminal (40).
Regarding claim 10, Fig. 2 of Nagano discloses an imaging device (Fig. 2, light detection device, ¶ [0038]) comprising:
a substrate (1N, 30);
a pixel circuit (TL, E3) provided on the substrate (1N, 30);
a connection terminal (40) that protrudes from the substrate (1N, 30);
a through silicon via (TE) that penetrates the substrate (1N, 30) and is electrically connected to the connection terminal (40); and
a passivation film (PF) that covers a side surface of the connection terminal (40), wherein the passivation film (PF) contains at least silicon (“The passivation films PF are comprised, for example, of SiN”, ¶ [0064]),
wherein the through silicon via (TE) has a tapered shape with an opening at an upper surface of the substrate (1N) and a bottom closer to the pixel circuit (E3, TL).
Nagano fails to disclose wherein the opening has a smaller width than the bottom, and
wherein the through silicon via gradually widens from the opening toward the pixel circuit.
In the similar field of endeavor of solid-state imaging apparatuses, Tanaka discloses wherein the opening has a smaller width than the bottom (“the through via 88… may have a forwardly tapered shape in which the plane area of the external terminal 14 side is smaller”, ¶ [0327]), and
wherein the through silicon via (88) gradually widens from the opening toward the pixel circuit (102).
It would have been obvious to one of ordinary skill in the art before the time of the effective filling date of the invention to modify the passivation layer of Nagano with the tapered shape as disclosed by Tanaka as a matter of design choice (see Tanaka, ¶ [0327]) and/or because changes in size and shape are prima facie obvious absent persuasive evidence that the particular configuration is significant (MPEP 2144.04(IV)).
Regarding claim 11, Nagano and Tanaka together disclose the imaging device according to claim 10 as applied above, and further discloses wherein the passivation film (PF) contains silicon oxide (SiO2), silicon nitride (SiN), or silicon carbonitride (SiCN) (“The passivation films PF are comprised, for example, of SiN”, ¶ [0064]).
Regarding claim 15, Nagano and Tanaka together disclose the imaging device according to claim 10 as applied above, and further discloses wherein the substrate (1N, 30) includes a first substrate (30) and a second substrate (1N) stacked on the first substrate (30), the pixel circuit (TL, E3) is provided on the first substrate (30), and
the connection terminal (40) is provided on the second substrate (1N).
regarding claim 16, Nagano and Tanaka together disclose the imaging device according to claim 15 as applied above, and further discloses wherein the connection terminal (40) includes a recess, and a solder ball (Fig. 2, bump electrodes BE are comprised, for example, of solder, ¶ [0062]) is welded to the recess.
Regarding claim 21, Nagano and Tanaka together disclose the imaging device according to claim 10 as applied above, and further discloses wherein the through silicon via (TE) has a recessed shape recessed toward the first substrate (30).
Claims 3-4, and 12-13 are rejected under 35 U.S.C. 103 as being unpatentable over Nagano (US 20140327100 A1) and Tanaka (US 20190103426 A1) in further view of Mitsuhashi et al. (US 20130020468 A1) herein after “Mitsuhashi”.
Regarding claim 3, Nagano and Tanaka together disclose the imaging device according to claim 1 as applied above, but the combination fails to disclose wherein the passivation film contains a porous low-k material.
In the similar field of endeavor of imaging devices, Mitsuhashi discloses wherein the passivation film contains a porous low-k material (“said passivation film is formed by forming an insulating film of one of… SiOC, or SiOF”, claim 15).
It would have been obvious to one of ordinary skill in the art before the time of the effective filling date of the invention to modify the passivation layer of Nagano with the materials as disclosed by Mitsuhashi, to improve device reliability (see Mitsuhashi, ¶ [0363]) and/or because the use of conventional materials to perform their known function is prima-facie obvious (MPEP 2144.07).
Regarding claim 4, Nagano, Tanaka and Mitsuhashi together disclose the imaging device according to claim 3 as applied above, but Nagano and Tanaka fail to disclose wherein the porous low-k material is fluorine-doped silicon oxide (SiOF) or carbon-doped silicon oxide (SiOC).
In the similar field of endeavor of imaging devices, Mitsuhashi discloses wherein the porous low-k material is fluorine-doped silicon oxide (SiOF) or carbon-doped silicon oxide (SiOC) (“said passivation film is formed by forming an insulating film of one of… SiOC, or SiOF”, claim 15).
It would have been obvious to one of ordinary skill in the art before the time of the effective filling date of the invention to modify the passivation layer of Nagano with the materials as disclosed by Mitsuhashi, to improve device reliability (see Mitsuhashi, ¶ [0363]) and/or because the use of conventional materials to perform their known function is prima-facie obvious (MPEP 2144.07).
Regarding claim 12, Nagano and Tanaka together disclose the imaging device according to claim 10 as applied above, but the combination fails to disclose wherein the passivation film contains a porous low-k material.
In the similar field of endeavor of imaging devices, Mitsuhashi discloses wherein the passivation film contains a porous low-k material (“said passivation film is formed by forming an insulating film of one of… SiOC, or SiOF”, claim 15).
It would have been obvious to one of ordinary skill in the art before the time of the effective filling date of the invention to modify the passivation layer of Nagano with the materials as disclosed by Mitsuhashi, to improve device reliability (see Mitsuhashi, ¶ [0363]) and/or because the use of conventional materials to perform their known function is prima-facie obvious (MPEP 2144.07).
Regarding claim 13, Nagano, Tanaka and Mitsuhashi together disclose the imaging device according to claim 12 as applied above, but Nagano and Tanaka fail to disclose wherein the porous low-k material is fluorine-doped silicon oxide (SiOF) or carbon-doped silicon oxide (SiOC).
In the similar field of endeavor of imaging devices, Mitsuhashi discloses wherein the porous low-k material is fluorine-doped silicon oxide (SiOF) or carbon-doped silicon oxide (SiOC) (“said passivation film is formed by forming an insulating film of one of… SiOC, or SiOF”, claim 15).
It would have been obvious to one of ordinary skill in the art before the time of the effective filling date of the invention to modify the passivation layer of Nagano with the materials as disclosed by Mitsuhashi, to improve device reliability (see Mitsuhashi, ¶ [0363]) and/or because the use of conventional materials to perform their known function is prima-facie obvious (MPEP 2144.07).
Claims 5 and 14 are rejected under 35 U.S.C. 103 as being unpatentable over Nagano (US 20140327100 A1) and Tanaka (US 20190103426 A1) in further view of Tomiyasu et al. (US 20170236856 A1) herein after “Tomiyasu”.
Regarding claim 5, Nagano and Tanaka together disclose the imaging device according to claim 1 as applied above, but the combination fails to disclose wherein a thickness of the passivation film is 30 nm to 50 nm.
In the similar field of endeavor of imaging devices, Tomiyasu discloses wherein a thickness of the passivation film is 30 nm to 50 nm (“The first passivation film 42 is typically 10 to 400 nm thick”, ¶ [0059]).
It would have been obvious to one of ordinary skill in the art before the time of the effective filling date of the invention to modify the passivation layer of Nagano with the thickness as disclosed by Tomiyasu, to reduce capacitance and optimize production yield (see Tomiyasu, ¶ [0007-0009]) and/or because it has been held that “where the general conditions of a claim are disclosed in the prior art, it is not inventive to discover the optimum or workable ranges by routine experimentation” (MPEP 2144.05).
Regarding claim 14, Nagano and Tanaka together disclose the imaging device according to claim 10 as applied above, but the combination fails to disclose wherein a thickness of the passivation film is 30 nm to 50 nm.
In the similar field of endeavor of imaging devices, Tomiyasu discloses wherein a thickness of the passivation film is 30 nm to 50 nm (“The first passivation film 42 is typically 10 to 400 nm thick”, ¶ [0059]).
It would have been obvious to one of ordinary skill in the art before the time of the effective filling date of the invention to modify the passivation layer of Nagano with the thickness as disclosed by Tomiyasu, to reduce capacitance and optimize production yield (see Tomiyasu, ¶ [0007-0009]) and/or because it has been held that “where the general conditions of a claim are disclosed in the prior art, it is not inventive to discover the optimum or workable ranges by routine experimentation” (MPEP 2144.05).
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
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/C.A.N./Examiner, Art Unit 2893
/YARA B GREEN/Supervisor Patent Examiner, Art Unit 2893
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